Electronic Packaging

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PDT 264

ELECTRONIC MATERIALS

Overview on IC Packaging
Dr. Khor Chu Yee
Office: S4-L2-64-30
Email: [email protected]
H/P: 019-5637283

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Chapter Objectives
•To define the electronic packaging.
•To overview the packaging technology
and assembly flow process.

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What is electronic packaging?
Electronic Packaging:
Define as an electronic structure that serves to protect an
electronic/electrical element from its environment and the environment
from electronic/ electrical element.
or
Housing and interconnection of integrated circuits to
form electronic systems. Method of closing, protecting or providing
physical structure to either electronic components, assemblies of
components or finished electronic devices

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Functions of electronic packaging
Electronic packaging must provide:
- Signal distribution

- Heat dissipation

- Power distribution

- Circuit protection

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Signal distribution Power distribution

Heat dissipation (cooling) Protection (mechanical,


chemical, electromagnetic)

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IC PACKAGING
TECHNOLOGY

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Electronic Packaging Technology Trends

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1. Through-hole Mounting

Pins of the
components go
through the
drilled printed
circuit board
(PCB) holes

Note:
DIP: dual in-line package

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Printed circuit board

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Application of Through-hole Mounting
Blank PCB

Calculator PCB

Radio/Television

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Application of Through-hole Mounting

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2. Surface-Mount Technology (SMT)

The pins of the


devices are
mounted directly
onto the surface
of the PCB

Note:
PLCC: Plastic leaded chip carrier
BGA: Ball Grid Array
SOIC: Small Outline Integrated Circuit

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Surface Mount Capacitor
Surface Mount Device

Through-hole Resistor

Surface Mount Resistor


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Application of Surface Mount Technology

USB Thumb drive/ Pen drive

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LED Television PCB
3. Chip Scale Packages (CSP)

CSP is single-die, direct surface mountable package


Is an evolution of surface mount device (SMD)
CSP come in many forms –flip chip, wire-bonded, ball
grid array, leaded, etc.
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Wire-bonded

Reduce in IC package size

Flip chip

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Note: 1 mil = 0.0254 mm
Note:
DIP: Dual-in-line package
TSOP: Thin Small Outline Package
WLP: Wafer level package

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Recent IC Packaging Technology – 3D IC with TSV

*Wire bonding *Through Silicon Via


*Flip chip bump: *Micro bump:
Diameter: ~100 μ meter Diameter: ~10 μ meter
Pitch: ~100 μ meter Pitch: ~10 μ meter
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Things you should know !

PCB
Solder Bump / Solder Ball

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Wire Bonding VS Through Silicon Via

Wire Bonding Through Silicon Via

Samsung 16 Gb memory21
ASSEMBLY PROCESS
FLOW

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Wafer ?

Silicon Wafer
A wafer, also called a slice or
substrate, is a thin slice of
semiconductor material, such as a
crystalline silicon, used in electronics
for the fabrication of integrated
circuits.
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1. Wafer Preparation

Silicon wafer are


mounted on a
laminating tape that
adheres to the back of
the wafer
The laminating tape
holds the wafer
throughout the dicing
and the die attaching
process
Silicon Wafer
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2. Dicing

Die-sawing machine using a


diamond saw blade cuts
the wafer into individual
die/pellet
CO2 gas bubbles are
dispensed on the wafer to
remove silicon dust/debris
& lubricating and cooling
down the blade

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3. Die Attach
The die attach
machine will pick up
the die and deposit it
on the lead frame.
It may utilize the
wafer mapping
method to pick up
only good die.

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4. Wire Bonding
Either Au or Al wires are
used depending on
application.
Bonded one at a time, the
wire is fed through a
ceramic capillary.
With a good combination
of temperature and
ultrasonic energy, a good
metalized wire bond is
formed

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Wire-bonding

Bonding
pad

Gold or
aluminum
or copper
wire

IC chip

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5. Moulding
The moulding process
aims to encapsulate
the whole wire bonded
die against exposure to
contamination and
other physical
damages.
The lead frames that
hold the dies are
placed in individual
cavities which are filled
with liquid resin.

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6. Solder Plating
This step provides a
layer of Tin Lead solder
on the lead frame for
making easier the PCB
assembly process.
Lead free finishing with
Tin Bismuth plating or
Tin Copper dipping can
also be used.

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7. Marking

Marking is the coding process that writes customer's


corporate and product identification code on a
packaged device.
It commonly uses a laser-based machine
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8. Lead Trim/ Form

The final process is to


trim away the leads of the
packaged device from the
frame strip.
The leads are cut and
formed mechanically to
the specified shape

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MATERIALS USED IN
ELECTRONIC
PACKAGING

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Leaded VS Lead-Free Solder

Leaded Solder: Lead-Free Solder:


-Tin-lead (Sn63Pb37) -Tin-Silver-Copper
-melting point ~183 °C (SnAgCu)
-shiny & smooth surface -melting range of 217–
220˚C
-slightly grainy surface
Others: SnCu

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Why do polymers is the main materials
in IC packaging?

wide range of material families


many recipes inside same material family
large processing choice
wide range of end product properties
possibilities of customization
cheap materials for common applications

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CHARACTERISTIC OF
A PACKAGE

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Chapter Review
• Electronic Packaging - an electronic structure that serves to protect
an electronic/electrical element from hazardous environments, such
as moisture, mechanical vibration, thermal loading, electrostatic
discharge and chemical corrosion.
• Overview the packaging technology and assembly flow process:
(1) Wafer preparation
(2) Dicing
(3) Die Attach
(4) Wire Bonding
(5) Moulding / IC Encapsulation
(6) Solder Plating
(7) Marking, and
(8) Lead trimming/forming
• Materials used in Electronic Packaging (1) Semiconductors, (2)
Metals, (3) Ceramics, (4) Polymers and (5) Glasses

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