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Shreyas M S 20MVD0136: Digital Assignment - Dicd

1. Varying the beta ratio (βn/βp) of an inverter impacts the transfer characteristics and noise margins. For βn=βp, the switching point is at VDD/2 with symmetric noise margins. For βn>βp, the switching point is less than VDD/2 with larger high noise margin. For βn<βp, the switching point is greater than VDD/2 with larger low noise margin. 2. Applying a body bias (VSB) to an NMOS transistor changes its threshold voltage (Vt). Positive VSB increases Vt, while negative VSB decreases Vt. Vt varies according to the square root of VSB.

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36 views

Shreyas M S 20MVD0136: Digital Assignment - Dicd

1. Varying the beta ratio (βn/βp) of an inverter impacts the transfer characteristics and noise margins. For βn=βp, the switching point is at VDD/2 with symmetric noise margins. For βn>βp, the switching point is less than VDD/2 with larger high noise margin. For βn<βp, the switching point is greater than VDD/2 with larger low noise margin. 2. Applying a body bias (VSB) to an NMOS transistor changes its threshold voltage (Vt). Positive VSB increases Vt, while negative VSB decreases Vt. Vt varies according to the square root of VSB.

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Shreyas Rao
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DIGITAL ASSIGNMENT – DICD

SHREYAS M S
20MVD0136
1. Discuss the effect of beta variation in an inverter transfer characteristics and its
corresponding noise margin
Solution:
Beta ratio in an inverter is given by the formula β n/ β p
For ideal inverter β n/ β p =1 making it symmetric wrt 0 and 1 switching
Steps:
 Value of µnCox of the NMOS and PMOS is initially determined by plotting a
graph of Id vs Vgs.
 Value of Id is noted for particular Vgs, substituting in current equation of
MOSFET, for the chosen w/l(here 10u/1u) ,µnCox is obtained.
 The obtained values for NMOS=80x10−6 A/V 2
 The obtained values for PMOS=29x10−6 A/V 2
For β n= β p
 Fixing w/l of NMOS as 10u/1u, for PMOS we get w/l as 19u/0.6u.
 Designing with above values, varying input from 0 to VDD(5V), we get
switching point at 2.5V
 NMh=VDD-Vih=5-2.58=2.416V
 NMl=Vil=2.38V
For β n/ β p=10 or β n> β p
 Fixing w/l of NMOS as 100u/1u, for PMOS w/l as 19u/0.6u.
 Designing with above values, varying input from 0 to VDD(5V), we get
switching point at 1.4V
 NMh=VDD-Vih=5-1.5=3.5V
 NMl=Vil=1V

For β n/ β p=0.1 or β n< β p


 Fixing w/l of NMOS as 10u/1u, for PMOS w/l as 190u/0.6u.
 Designing with above values, varying input from 0 to VDD(5V), we get
switching point at 3.6V
 NMh=VDD-Vih=5-3.8=1.2V
 NMl=Vil=3.5V

Conclusion:
 Beta value of the transistor denotes the gain of the transistor.
 It is the value equal to unCox (w/l).
 Value of beta(nmos)=2.7beta(pmos), thus for providing same current pmos width is always
greater than nmos.
 Adjusting the value of (w/l) of transistor one can model the gain of transistor.
 During the transition region a large value of beta is observed.
 For β n= β p the transition point lies exactly at Vdd/2
 For β n> β p(Good NMOS, bad PMOS), the transition point is less than vdd/2 -here 1.4V
 For β n< β p(Good PMOS, bad NMOS), he transition point is greater than vdd/2- here 3.6V
2. Conduct an experiment on a NMOS so as to study the impact of body bias on
threshold voltage?
Solution:
For an NMOS transistor the body/substrate is connected to lowest possible potential of
the circuit(generally-gnd)
Whenever an additional potential VSB is applied to the body, it is observed that threshold
voltage changes.

VSB=0V, Vt=0.619V
VSB= -30mV, Vt=0.604V

VSB=0.5V, Vt=0.824V
For positive VSB(Vt increases with VSB)
Sl. No VSB Vt Id
1 0V 0.619V(Vt0) 840nA
2 30mV 0.633V 842nA
3 50mV 0.643V 843nA
4 0.1V 0.666V 842nA
5 0.5V 0.824V 842nA
For negative VSB(Vt decreases with VSB)
Sl. No VSB Vt Id
1 0V 0.619V(Vt0) 840nA
2 -30mV 0.604V 842nA
3 -50mV 0.594V 843nA
4 -0.1V 0.568V 842nA
5 -0.5V 0.256V 842nA

Vt=Vt0+ˠ(√ VSB+2 ȹf − √2 φf )
Substituting we get ˠ = 0.757V 1 /2(with ȹf=0.3V)

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