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A 5 A4 A 3 A 2 A 1 A0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1

The document describes the addressing of multiple RAM and ROM chips. It shows the starting and ending addresses of RAM1 from 0000H to 0FFFH, ROM from 1000H to 2FFFH, and RAM2 from 3000H to DFFFH. The address lines for selecting each device are also specified. A13, A12, and A11 can be used as decoder selection lines to activate the appropriate output for each memory chip.

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Tsy Less Dahal
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137 views5 pages

A 5 A4 A 3 A 2 A 1 A0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1

The document describes the addressing of multiple RAM and ROM chips. It shows the starting and ending addresses of RAM1 from 0000H to 0FFFH, ROM from 1000H to 2FFFH, and RAM2 from 3000H to DFFFH. The address lines for selecting each device are also specified. A13, A12, and A11 can be used as decoder selection lines to activate the appropriate output for each memory chip.

Uploaded by

Tsy Less Dahal
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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A1 A1 A1 A1 A1 A1 A A8 A A A A4 A A A A0

5 4 3 2 1 0 9 7 6 5 3 2 1
RAM Starting 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0
1 Add=2200H
1 1 1 1 1 1
Ending 0 0 1 0 0 0 1 0 0 0 1 1 1 1 1 1
Add=
223FH
RAM Starting 0 0 1 1 0 0 1 1 0 0 0 0 0 0 0 0
2 Add=
3300H
1 1 1 1 1 1
Ending 0 0 1 1 0 0 1 1 0 0 1 1 1 1 1 1
Add=
333FH

Similar address lines:

1s: A13, A9

0s: A15, A14, A11, A10, A7, A6

Different address lines: A12, A8

Decoder Selection Lines

VCC A12 A8

1 0 0 RAM1 Selection= activate output O4

1 1 1 RAM2 Selection= activate output O7

NOTE:

IF Addresses are not given:

 Start from 0000H


 For the starting address of next device, add 1 to the ending address of previous device.
Interface one RAM and one ROM chips of 4KB each at address 0000H and F000H.

4KB=212=12 address lines

Solution:

A1 A1 A1 A1 A1 A1 A A8 A A A A4 A A A A0
5 4 3 2 1 0 9 7 6 5 3 2 1
RAM Starting 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Add=0000H
1 1 1 1 1 1 1 1 1 1 1 1
Ending Add= 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1
0FFFH
ROM Starting 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0
Add= F000H
1 1 1 1 1 1 1 1 1 1 1 1
Ending Add= 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
FFFFH

8085

0000H===16 0S

FFFFH===16 1S

8086

00000H===20 0S

FFfFFH===20 1S

ADD B,C

A1 A1 A1 A1 A1 A1 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
5 4 3 2 1 0
RAM1 Starting 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
32KB Add=0000
H
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Ending 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Add=
7FFFH
ROM Starting 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
2 Add=
16KB RAM1
EA+1H
1 1 1 1 1 1 1 1 1 1 1 1 1 1
Ending 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Add=
BFFFH
RAM3 Starting 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
8KB Add=
ROM2
EA+1H=
C000H
1 1 1 1 1 1 1 1 1 1 1 1 1
Ending 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1
Add=
DFFFH

A15 A1 A1 A1 A1 A1 A A A A A A A A A A0
4 3 2 1 0 9 8 7 6 5 4 3 2 1
RAM1 Starting 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
32KB Add=0000
H
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Ending (1) 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1
Add= H 0
ROM Starting 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
2 Add=
16KB RAM1
EA+1H
1 1 1 1 1 1 1 1 1 1 1 1 1 1
Ending 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Add=
BFFFH
RAM3 Starting 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
8KB Add=
ROM2
EA+1H=
C000H
1 1 1 1 1 1 1 1 1 1 1 1 1
Ending 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1
Add=
DFFFH
Interface 4K*8 ROM and 8K*8 RAM with interface starting address 1000H.

A15 A1 A1 A1 A1 A1 A A A A A A A A A A0
4 3 2 1 0 9 8 7 6 5 4 3 2 1

ROM Starting 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
4K Add=1000
H
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Ending (1) 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1
Add= H 0
ROM Starting 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
2 Add=
16KB RAM1
EA+1H
1 1 1 1 1 1 1 1 1 1 1 1 1 1
Ending 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Add=
BFFFH
RAM3 Starting 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
8KB Add=
ROM2
EA+1H=
C000H
1 1 1 1 1 1 1 1 1 1 1 1 1
Ending 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1
Add=
DFFFH

Design an address circuit to interface 4K*8 RAM and 8K*8 ROM and 16K*8 RAM with interface starting
address 0000H.

A1 A1 A1 A1 A1 A1 A A A A A A A A A A0
5 4 3 2 1 0 9 8 7 6 5 4 3 2 1

RAM Starting 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
4K Add=0000H
1 1 1 1 1 1 1 1 1 1 1 1
Ending Add= 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1
0FFFH
ROM Starting Add= 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
8KB RAM1
EA+1H=1000
H
1 1 1 1 1 1 1 1 1 1 1 1 1
Ending Add= 0 0 1 0 1 1 1 1 1 1 1 1 1 1 1 1
2FFFH
RAM Starting Add= 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0
2 ROM2
16KB EA+1H=
3000H
1 1 1 1 1 1 1 1 1 1 1 1 1
Ending Add= 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1
DFFFH

A1 A1 A1 A1 A1 A1 A A8 A7 A A5 A4 A A2 A1 A0
5 4 3 2 1 0 9 6 3

RAM Starting 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
4K Add=0000H
ROM Starting Add= 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
8KB RAM1
EA+1H=1000
H
RAM Starting Add= 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0
2 ROM2
16KB EA+1H=
3000H

A13 A12 A11 Selection


0 0 0 O0
0 1 0 O2
1 1 0 O6

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