A Reversible Ternary Adder for Quantum Computation

Takahiko Satoh1 ∗ Shota Nagayama 2 † Rodney Van Meter 1 ‡

1
Faculty of Environment and Information Studies, Keio University
5322 Endo, Fujisawa, Kanagawa, 252-8520, Japan
2
Faculty of Policy Management Studies, Keio University
5322 Endo, Fujisawa, Kanagawa, 252-8520, Japan
Abstract. We present the design of a reversible ternary carry-ripple adder suitable for use with qutrits. Our design
is based on the binary reversible adder of Vedral, Barenco and Ekert, and uses 3n + 1 qutrits to add two n-trit
numbers, with carry in and carry out. We assume a “rotor” gate as our basic gate.

1 Introduction We need a reversible ternary gate as our basic logic gate.

We define a gate R we call the rotor. It takes 0 → 1, 1 → 2,
Qutrits, ternary analogs to binary qubits, have been pro-
and 2 → 0. Applying this gate three times to any trit will bring
posed for quantum communication, including quantum key
its state back to its original position. The unitary transform
distribution (QKD), and have been recognized as giving good
and graphical symbol for R are shown in Figure 1.
spatial density for information storage [1, 2, 3]. Qutrits are
We also need a two-qutrit gate. The C-R gate, or control-R
three-state elementary quantum systems, defined by a basis
gate, rotates the second qutrit (the target qutrit) only if the first
set of three vectors. Much as qubits are defined using a basis
qutrit (the control qutrit) is 2, as shown in Figure 2. Similarly,
set commonly written as |0i and |1i, we define the basis set
the C-C-R gate rotates the third qutrit (the target qutrit) only
for ternary arithmetic to be |0i, |1i, and |2i.
if both of the control qutrits are 2.
For any sort of complex computation on qutrits, we ex-
pect arithmetic subroutines to be an important component. 2.1 SUM gate
Building blocks, including a full adder, have been defined [4],
but larger, more complete circuits are also necessary. There- The purpose of the ternary SUM gate, or block of gates, is
the same as the purpose of the VBE binary SUM gate. This
fore, we have designed a reversible ternary adder, based on
gate takes (aj , bj , cj → (a, cj + aj + bj , cj ). aj and cj are
the structure of the VBE carry-ripple adder circuit by Vedral,
Barenco and Ekert [5]. Our circuit involves no uniquely quan- undisturbed, while bj becomes the sum of the three, modulo 3.
cj will be used as the carry from qutrit to qutrit in our overall
tum operations, and would be usable in a classical ternary
circuit. The circuit for SUM is shown in Figure 3.
logic context, which has a long if not exactly mainstream his-
tory [6, 7].
1 0 0 0 0 0 0 0 0
2 Concepts and Building Blocks 0 1 0 0 0 0 0 0 0
0 0 1 0 0 0 0 0 0
Our goal is to make a circuit that takes two n-qutrit numbers 0 0 0 1 0 0 0 0 0
a and b and outputs a and a + b. In the following, we write the 0 0 0 0 1 0 0 0 0
state of an n-qutrit register as a = an−1 3n−1 + an−2 3n−2 + 0 0 0 0 0 1 0 0 0
... + a1 3 + a0 . Here, a0 is the lowest-order qutrit, and an−1 0 0 0 0 0 0 0 1 0
is the highest-order qutrit. Because our work is independent 0 0 0 0 0 0 0 0 1 R
of the quantum nature of the trits, we dispense with the ket 0 0 0 0 0 0 1 0 0
notation for the rest of this paper.
C−R gate matrix C−R gate figure
∗[email protected]
† [email protected]
‡ [email protected]
Figure 2: The control-rotor gate.

0 1 0
cj R R R
57/
S U M

0 0 1 aj R R R
R
bj R R R R R R

1 0 0

R matrix R figure
Figure 3: The SUM gate.

Figure 1: The rotor gate.

 cj R R R

CARRY

aj R R R

bj R R R R R R R
;

c j+1 R R R R R R

Figure 4: The CARRY gate.

c 0 =0 C 0 =0

SUM
CARRY
CARRY

a0

b0

c 1 =0 C 1 =0

SUM
CARRY
CARRY

a0 a1 a0

a1 b1 a1

c 2 =0 C 2 =0 a a

SUM
CARRY
CARRY

a2

ADDER
an b2 an

b1 b1

b2 b2

c P=0 C n−1=0 a+b a+b

SUM
CARRY
CARRY

a P

bn bP bn

c P=0 C n =0
SUM
CARRY

a P R R R

b P R R R R R

b P =0

Figure 5: The complete ternary carry-ripple adder.

2.2 CARRY gate ical Review Letters, 92(9):097901, 2004.

The purpose of the ternary CARRY gate is also the same as [2] Carlton M. Caves and Gerard J. Milburn. Optics Commu-
the purpose of the binary CARRY gate. CARRY outputs the nications, 179(1):439–446, 2000.
carry cj+1 which is calculated when cj , aj and bj are added.
[3] S.J. Devitt, A.D. Greentree, and L.C.L. Hollenberg.
3 The Reversible Ternary Adder Quantum Information Processing, 2007. Arxiv preprint
quant-ph/0511084; to appear.
Our complete adder involves two n-qutrit registers, a and
b, and n ancillae c, used to hold the intermediate carry values [4] D. M. Miller, G. W. Dueck, and D. Maslov. Proceed-
during the computation, and an additional qutrit bn+1 which ings of 34th International Symposium on Multiple-Valued
holds the carry out, or new high digit of the b register. The Logic, pages 74–80, 2004.
adder leaves a undisturbed and takes b → a+b. The c ancillae
must be returned to their original zero state. As in the original [5] Vlatko Vedral, Adriano Barenco, and Artur Ekert. Phys.
VBE adder, the registers are interleaved, and the CARRY and Rev. A, 54:147–153, 1996.
SUM are arranged so that the carry qutrits are calculated in
[6] Brian Hayes. American Scientist, 89(6):490–495, 2001.
ascending order, a structure known as a carry-ripple adder.
The depth and total complexity of our circuit are both O(n). [7] Roy D. Merrill Jr. In DAC ’65: Proceedings of the SHARE
Both the CARRY and SUM blocks for ternary logic are substan- design automation project, pages 6.1–6.17, New York,
tially longer than their binary equivalents. The exact perfor- NY, USA, 1965. ACM Press.
mance will depend on the construction of three-qutrit gates.

References
[1] Andrew D. Greentree, S. G. Schirmer, F. Green, Lloyd
C. L. Hollenberg, A. R. Hamilton, and R. G. Clark. Phys-