UNIT - III

 BEHAVIORAL MODELING:
• Introduction
• BEHAVIORAL MODELING
Operations and Assignments
• Functional Bifurcation
• Initial Construct, Always Construct
• Assignments with Delays Wait Construct
• Multiple Always Blocks
• Designs at Behavioral Level
• Blocking and Non-Blocking Assignments
• The case statement
• Simulation Flow
• if and if-else constructs
• assign–deassign construct, repeat construct, for loop, the disable construct,
while loop, forever loop, parallel blocks, force-release construct, Event.
BEHAVIORAL MODELING

BEHAVIORAL MODELING
 Behavioral level modeling constitutes design
description at an abstract level.

 One can visualize the circuit in terms of its key

modular functions and their behavior; it can be
described at a functional level itself instead of
getting bogged down with implementation details.
OPERATIONS AND ASSIGNMENTS

 The design description at the behavioral level is done

BEHAVIORAL MODELING
through a sequence of assignments.

 These are called ‘procedural assignments’ – in contrast to

the continuous assignments at the data flow level.

 All the procedural assignments are executed sequentially

in the same order as they appear in the design
description.
FUNCTIONAL BIFURCATION
• Design description at the behavioral level is done in
terms of procedures of two types;
•
BEHAVIORAL MODELING
one involves functional description and interlinks of
functional units. It is carried out through a series of
blocks under an “always”.
• The second concerns simulation – its starting point,
steering the simulation flow, observing the process
variables, and stopping of the simulation process; all
these can be carried out under the “always” banner, an
“initial” banner, or their combinations.
procedure-block structure
 A procedure-block of either type – initial or always
– can have a structure shown in Figure
BEGIN – END CONSTRUCT
 If a procedural block has only one assignment to be
carried out, it can be specified
BEHAVIORAL MODELING
 as initial #2 a=0;
 More than one procedural assignment is to be carried out
in an initial block. All such
 assignments are grouped together between “begin” and
“end” declarations.
 Every begin declaration must have its associated end
declaration.
 begin – end constructs can be nested as many times as
desired.
NESTED BEGIN – END BLOCKS
INITIAL CONSTRUCT
• A set of procedural assignments within an initial construct are

BEHAVIORAL
executed only Once
MODELING
• In any assignment statement the left-hand side has to be a storage
type of element (and not a net). It can be a reg, integer, or real type
of variable. The right-hand side can be a storage type of variable or
a net.
 initial
 begin
 a = 1'b0;
 b = 1'b0;
 #2 a = 1'b1;
 #3 b = 1'b1;
 #100$stop;
 end
MULTIPLE INITIAL BLOCKS
 modulenil1;

BEHAVIORAL MODELING
initial
 reg a, b;
 begin
 a = 1'b0; b = 1'b0;
 $display ($time, "display : a = %b, b = %b", a, b);
 #2 a = 1'b1;
 end
 initial #100$stop;
 initial
 begin #2 b = 1'b1;
 end
 endmodule
ALWAYS CONSTRUCT
 The always process signifies activities to be executed on
an “always basis.”
BEHAVIORAL MODELING
 Its essential characteristics are:
• Any behavioral level design description is done using an
always block.
• The process has to be flagged off by an event or a
change in a net or a reg. Otherwise it ends in a stalemate.
• The process can have one assignment statement or
multiple assignment statements.
• Normally the statements are executed sequentially in the
order they appear.
EVENT CONTROL
 The always block is executed repeatedly and endlessly. It
is necessary to specify a condition or a set of conditions,
BEHAVIORAL MODELING
which will steer the system to the execution of the block.
Alternately such a flagging-off can be done by
specifying an event preceded by the symbol “@”.
 @(negedge clk) :executes the following block at the negative edge of clk.
 @(posedge clk) : executes the following block at the positive edge of the
clk.
 @clk : executes the following block at both the edges of clk.
 @(prt or clr) :
 @(posedge clk1 or negedge clk2) :
 @ (a or b or c) can also write as @ (a or b or c) @ (a, b, c) @ (a, b or
c)
EXAMPLE COUNTER

 module counterup(a,clk,N);
BEHAVIORAL
input clk;
MODELING
input[3:0]N;

output[3:0]a;

reg[3:0]a;

initial a=4'b0000;

always@(negedge clk) a=(a==N)?4'b0000:a+1'b1;

 endmodule
ASSIGNMENTS WITH DELAYS
 always #3 b = a;
 Values of a at the 3rd, 6th, 9th, etc., ns are sampled and assigned to
BEHAVIORAL
b. MODELING
 Initial
 begin
 a = 1’b1;
 b = 1’b0;
 #1 a = 1’b0;
 #3 a = 1’b1;
 #1 a = 1’b0;
 #2 a = 1’b1;
 #3 a = 1’b0;
 end
INTRA-ASSIGNMENT DELAYS
 The “intra-assignment” delay carries out the assignment
in two parts.
BEHAVIORAL MODELING
 An assignment with an intra-assignment has the form
 A = # dl expression;
 Here the expression is scheduled to be evaluated as soon
as it is encountered.
 However, the result of the evaluation is assigned to the
right-hand side quantity a after a delay specified by dl.
 dl can be an integer or a constant expression
 always #2 a = a + 1;
 always #b a = a + 1;
 always #(b + c) a = a + 1;
ZERO DELAY
 A delay of 0 ns does not really cause any delay.
BEHAVIORAL MODELING
 However, it ensures that the assignment following is
executed last in the concerned time slot.

 always
 begin a = 1;
 #0 a = 0;
 end
WAIT CONSTRUCT
 The wait construct makes the simulator wait for the
specified expression to be true before proceeding with
BEHAVIORAL MODELING
the following assignment or group of assignments.
 Its syntax has the form
 wait (alpha) assignment1;
 alpha can be a variable, the value on a net, or an
expression involving them.
 @clk a = b; assigns the value of b to a when clk changes;
 wait (clk) #2 a = b; the simulator waits for the clock to
be high and then assigns b to a
BLOCKING AND NONBLOCKING ASSIGNMENTS

 All assignment within an initial or an always block done

BEHAVIORAL
through an equality (“=”) MODELING
operator. These are executed
sequentially. Such assignments block the execution of the
following lot of assignments at any time step. Hence they are
called “blocking assignments”.

 If the assignments are to be effected concurrently A facility

called the “nonblocking assignment” is available for such
situations. The symbol “<=” signifies a non-blocking
assignment. The main characteristic of a nonblocking
assignment is that its execution is concurrent
CONT…

 For all the non-blocking assignments in a block, the

right-hand sides are evaluated first. Subsequently the
BEHAVIORAL MODELING
specified assignments are scheduled.

 What will happen if the following statements are

executed
 A <= B; // A, B will swapped
 B <= A ;

 And
A=B;
B=A; // A, B will have same value
NONBLOCKING ASSIGNMENTS AND DELAYS
 The principle of Delays of the intra-assignment type operation is
similar to that with blocking assignments.


BEHAVIORAL
always @(a or b)
#3 c1 = a&b;
MODELING
 which has a delay of 3 ns for the blocking assignment to c1. If a or b
changes, the always block is activated. Three ns later, (a&b) is
evaluated and assigned to c1. The event “(a or b)” will be checked
for change or trigger again. If a or b changes, all the activities are
frozen for 3 ns. If a or b changes in the interim period, the block is
not activated. Hence the module does not depict the desired output.
 always @(a or b)
 c2 = #3 a&b;
 The always block is activated if a or b changes. (a & b) is evaluated
immediately but assigned to c2 only after 3 ns. Only after the
delayed assignment to c2, the event (a or b) checked for change. If a
or b changes in the interim period, the block is not activated.
 always @(a or b)
 #3 c3 <= a&b;
 BEHAVIORAL MODELING
The block is entered if the value of a or b changes but the
evaluation of a&b and the assignment to c3 take place with a
time delay of 3ns. If a or b changes in the interim period, the
block is not activated.

 always @(a or b)
 c4 <= #3 a&b;
 represents the best alternative with time delay. The always block is activated if a or b
changes. (a&b) is evaluated immediately and scheduled for assignment to c4 with a
delay of 3 ns. Without waiting for the assignment to take effect (i.e., at the same time
step as the entry to the block), control is returned to the event control operator.
Further changes to a or b – if any – are again taken cognizance of.
THE CASE STATEMENT
 simple construct for multiple branching in a module. The
keywords case, endcase, and default are associated with
BEHAVIORAL MODELING
the case construct.
 Format of the case construct is
 Case (expression)
 Ref1 : statement1;
 Ref2 : statement2;
 Ref3 : statement3;
 .. .
 ...
 default: statementd;
 endcase
EXAMPLE
 moduledec2_4beh(o,i);

BEHAVIORAL MODELING
output[3:0]o;
 input[1:0]i;
 reg[3:0]o;
 always@(i)
 begin
 case(i)
 2'b00:o=4'h0;
 2'b01:o=4'h1;
 2'b10:o=4'h2;
 2'b11:o=4'h4;
 default: begin $display ("error");
 o=4'h0;
CASEX AND CASEZ

 The case statement executes a multiway branching where

BEHAVIORAL MODELING
every bit of the case expression contributes to the
branching decision. The statement has two variants
where some of the bits of the case expression can be
selectively treated as don’t cares – that is, ignored.

 Casez allows z to be treated as a don’t care. “?” character

also can be used in place of z.

 casex treats x or z as a don’t care.

SIMULATION FLOW
 In Verilog the parallel processing is structured through
the following [IEEE]:

BEHAVIORAL MODELING
Simulation time: Simulation is carried out in simulation time.
 At every simulation step a number of active events are sequentially carried
out.
 The simulator maintains an event queue – called the “Stratified Event
Queue” – with an active segment at its top. The top most event in the active
segment of the queue is taken up for execution next.
 The active event can be of an update type or evaluation type. The evaluation
event can be for evaluation of variables, values on nets, expressions, etc.
Refreshing the queue and rearranging it constitutes the update event.
 Any updating can call for a subsequent evaluation and vice versa.
 Only after all the active events in a time step are executed, the simulation
advances to the next time step.
 Completion of the sequence of operations above at any time step signifies
the parallel nature of the HDL.
STRATIFIED EVENT QUEUE
 The events being carried out at any instant give rise to other events –
inherent in
 BEHAVIORAL MODELING
the execution process. All such events can be grouped into the following 5
types:
 􀁸 Active events –
 􀁸 Inactive events – The inactive events are the events lined up for
execution immediately after the execution of the active events. Events
specified with zero delay are all inactive events.
 􀁸 Blocking Assignment Events – Operations and processes carried out at
previous time steps with results to be updated at the current time step are of
this category.
 􀁸 Monitor Events – The Monitor events at the current time step –
$monitor and $strobe – are to be processed after the processing of the active
events, inactive events, and nonblocking assignment events.
 􀁸 Future events – Events scheduled to occur at some future simulation
time are the future events.
FLOWCHART FOR THE SIMULATION FLOW.
IF AND IF-ELSE CONSTRUCTS
 The if construct checks a specific condition and decides
execution based on the result.
 BEHAVIORAL
assignment1; MODELING
 if (condition) assignment2;
 assignment3;

 Use of the if–else construct.

 assignment1;
 if(condition)
 begin // Alternative 1
 assignment2;
 end
 else
 begin //alternative 2
 assignment3;
 end
 assignment4;
EXAMPLE
 moduledemux(a,b,s);

BEHAVIORAL MODELING
output [3:0]a;
 input b, [1:0]s;
 reg[3:0]a;
 always@(b or s)
 begin if(s==2'b00)
 begin a[2'b0]=b;
a[3:1]=3'bZZZ; end
 else if(s==2'b01)
 begin a[2'd1]=b;
{a[3],a[2],a[0]}=3'bZZZ; end
 else if(s==2'b10)
 begin a[2'd2]=b;
ASSIGN–DEASSIGN CONSTRUCT
 The assign – deassign constructs allow continuous assignments
within a behavioral block.
 BEHAVIORAL MODELING
always@(posedge clk) a = b;
 At the positive edge of clk the value of b is assigned to a, and a
remains frozen at that value until the next positive edge of clk.
Changes in b in the interval are ignored.

 As an alternative, consider the block

 always@(posedge clk) assign c = d;
 Here at the positive edge of clk, c is assigned the value of d in a
continuous manner; subsequent changes in d are directly reflected as
changes in variable c:
 Always
 Begin

BEHAVIORAL MODELING
@(posedge clk) assign c = d;
 @(negedge clk) deassign c;
 end
 The above block signifies two activities:
 1. At the positive edge of clk, c is assigned the value of d in a
continuous manner.
 2. At the following negative edge of clk, the continuous assignment
to c is removed; subsequent changes to d are not passed on to c; it is
as though c is electrically disconnected from d.
REPEAT CONSTRUCT
 The repeat construct is used to repeat a specified block a specified
number of times.
 BEHAVIORAL MODELING
…
 repeat (a)
 begin
 assignment1;
 assignment2;
 …
 end
…
 The quantity a can be a number or an expression evaluated to a
number.
 The following block is executed “a” times. If “a” evaluates to 0 or x
or z, the block is not executed.
FOR LOOP
 The for loop in Verilog is quite similar to the for loop in C
 It has four parts; the sequence of execution is as follows:
BEHAVIORAL MODELING
 1. Execute assignment1.
 2. Evaluate expression.
 3. If the expression evaluates to the true state (1), carry out
statement. Go to step 5.
 4. If expression evaluates to the false state (0), exit the loop.
 5. Execute assignment2. Go to step 2
 ....
 for(assignment1; expression; assignment 2)
 statement;
 ...
THE DISABLE CONSTRUCT
 To break out of a block or loop. The disable statement
terminates a named block or task. Control is transferred
BEHAVIORAL MODELING
to the statement immediately following the block
 The disable construct is functionally similar to the break in
C
 always@(posedge en)
 begin:OR_gate
 b=1'b0;
 for(i=0;i<=3;i=i+1)
 if(a[i]==1'b1)
 begin b=1'b1;
 disable OR_gate;
 end
 end
WHILE LOOP
 The Boolean expression is evaluated. If it is true, the
statement s are executed and expression evaluated and
BEHAVIORAL MODELING
checked. If the expression evaluates to false, the loop is
terminated and the following statement is taken for
execution
 while(|a)
 begin
 b=1'b1;
 @(posedge clk)
 a=a-1'b1;
 end
 b=1'b0;
FOREVER LOOP
 Repeated execution of a block in an endless manner is
best done with the forever loop (compare with repeat
BEHAVIORAL MODELING
where the repetition is for a fixed number of times).

 always @(posedge en)

 forever#2 clk=~clk;
PARALLEL BLOCKS
 All the procedural assignments within a begin–end block are
executed sequentially. The fork–join block is an alternate one where
BEHAVIORAL MODELING
all the assignments are carried out concurrently (The non-blocking
assignments too can be used for the purpose.). One can use a fork-
join block within a begin–end block or vice versa.
FORCE–RELEASE CONSTRUCT
 When debugging a design with a number of instantiations, one may
be stuck with an unexpected behavior in a localized area. Tracing
BEHAVIORAL MODELING
the paths of individual signals and debugging the design may prove
to be too tedious or difficult.
 In such cases suspect blocks may be isolated, tested, and debugged
and status quo ante established. The force–release construct is for
such a localized isolation for a limited period.
 force a = 1'b0;
 forces the variable a to take the value 0.
 force b = c&d;
 forces the variable b to the value obtained by evaluating the expression
c&d.
EVENT
 The keyword event allows an abstract event to be declared. The
event is not a data type with any specific values; it is not a variable
BEHAVIORAL MODELING
(reg) or a net. It signifies a change that can be used as a trigger to
communicate between modules or to synchronize events in different
modules.
 The operator “” signifies the triggering. Subsequently, another
activity can be started in the module by the event change.
 ...
 event change;
 ...
 always
 ...
 . . .  change;
 ...
 .always@change