YAC - Yet Another CORDIC Core

Christian Haettich [[email protected]]

March 30, 2014

IP core and C-model documentation

Contents

1 Organization and Introduction 3

1.1 History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Folder and Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3 License . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.4 The CORDIC algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2 IP-Core Description 5
2.1 Port Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2 Parameter Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.3 Mode description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Data Range and Limitations . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4.1 Circular Vectoring Mode . . . . . . . . . . . . . . . . . . . . . . . 8
2.4.2 Circular Rotation Mode . . . . . . . . . . . . . . . . . . . . . . . 8
2.4.3 Linear Vectoring Mode . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4.4 Linear Rotation Mode . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4.5 Hyperbolic Vectoring Mode . . . . . . . . . . . . . . . . . . . . . 8
2.4.6 Hyperbolic Rotation Mode . . . . . . . . . . . . . . . . . . . . . . 9
2.5 Internal Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.5.1 Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.5.2 Rotation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.6 Testbench . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3 Using the C-Model with Octave or Matlab 12

3.1 Guard-Bits – Input and output sizes . . . . . . . . . . . . . . . . . . . . 12
3.1.1 Input data width versus iterations . . . . . . . . . . . . . . . . . . 12

4 Performance 14

5 Open issues and future work 15

5.1 Next steps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.2 Future plans . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2
Chapter 1

Organization and Introduction

1.1 History

Version Date Description Author

0.01 4th March 2014 Initial document Christian Haettich

Table 1.1: History

1.2 Folder and Files

/
c octave
cordic iterative.c ......................... C-code for bit accurate model
cordic iterative code.m........Script to auto-generate VHDL and C-code
cordic iterative test.m ................. YAC performance analysis script
doc.................................Contains files to create this documentation
licenses
lgpl-3.0.txt ............................................... LGPL license
README.txt...............................................A short read-me file
rtl
vhdl
cordic iterative int.vhd.........................Top-level VHDL file
cordic iterative pkg.vhd .......................... VHDL package file
cordic iterative tb.vhd ............................. VHDL testbench

1.3 License
Copyright (c) 2014, Christian Haettich, All rights reserved.

YAC is free software; you can redistribute it and/or modify it under the terms of the
GNU Lesser General Public License as published by the Free Software Foundation; either

3
version 3.0 of the License, or (at your option) any later version.

YAC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PAR-
TICULAR PURPOSE. See the GNU Lesser General Public License for more details.

You should have received a copy of the GNU Lesser General Public License along with
this library. If not, download it from http://www.gnu.org/licenses/lgpl

1.4 The CORDIC algorithm

The CORDIC algorithm is used to do trigonometric, hyperbolic, multiplication and di-
vision calculations in a hardware-efficient way. This means, that only bit-shift, addition
and subtraction operations in combination with a lookup-table is required.
Good introductions are available in [1][2][4]. A description on wikibook.org [3] is also
useful. For this reason, no more introduction is given here and the following chapters
assume, that the reader is familiar with the CORDIC algorithm.

4
Chapter 2

IP-Core Description

The two files cordic iterative int.vhd and cordic iterative pkg.vhd implements an
iterative CORDIC algorithm in fixed-point format. Iterative means, that the IP-core is
started with a set of input data and after a specific amount of clock cycles, the result is
available. No parallel data can be processed. The following six modes are supported:

• trigonometric rotation

• trigonometric vectoring

• linear rotation

• linear vectoring

• hyperbolic rotation

• hyperbolic vectoring

2.1 Port Description

Table 2.1 and Figure 2.1 gives an overview of the YAC ports. The three input ports
start, done and mode and are used to interact with an external state machine or with a
software driver. After setting start to high, the YAC starts processing. If all necessary
rotations are done, the done output is set to high for one clock cycle. When starting
the YAC, all other inputs must contain valid data. The mode input is used to select
the CORDIC mode. Table 2.1 shows all input and output ports and Figure 2.1 shows a
CORDIC block symbol: xi , yi , ai , xo , yo , ao are data ports whereas start, done and mode
are configuration signals.

2.2 Parameter Description

Table 2.2 shows the four parameter, which can be used to parameterize the YAC.

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Name Type Direction Size Description
clk std logic input 1 clock
rst std logic input 1 synchronous reset
en std logic input 1 clock-enable
start std logic input 1 start trigger
done std logic output 1 done indicator
mode std logic vector input 4 mode configuration
xi std logic vector input XY WIDTH X input vector
yi std logic vector input XY WIDTH Y input vector
ai std logic vector input A WIDTH + 2 angular input vector
xo std logic vector input XY WIDTH + GUARD BITS X output vector
yo std logic vector input XY WIDTH + GUARD BITS Y output vector
ao std logic vector input A WIDTH + 2 angular output vector

Table 2.1: Port description

mode
done
start

x_i x_o
CORDIC

y_i y_o

a_i a_o
clk

rst

Figure 2.1: YAC block symbol

6
Name type size Description
XY WIDTH natural defines the size of x and y input and output vectors
A WIDTH natural defines the size of the angular input and output vectors
GUARD BITS natural defines the number of guard bits
RM GAIN natural defines the precision of the CORDIC gain removal

Table 2.2: Parameter description

2.3 Mode description

With the mode-input, it is possible to select between circular, linear and hyperbolic
operation as well as between rotation and vectoring operations:
• mode(1:0) = ”00” selects circular operation
• mode(1:0) = ”01” selects linear operation
• mode(1:0) = ”10” selects hyperbolic operation
• mode(1:0) = ”11” is reserved
• mode(3) = ’0’ selects rotation
• mode(3) = ’1’ selects vectoring
The package cordic iterative int.vhd contains the following defines to setup the mode:
• VAL MODE CIRC = ”00”
• VAL MODE LIN = ”01”
• VAL MODE HYP = ”10”
• I FLAG VEC ROT = 3 (bit index)
For example if a hyperbolic rotation mode is required, the mode input is ”0010”, and for
the linear vector operation, the mode input is ”1001”. Please note, that bit number 2 is
reserved for future implementations.
Table 2.3 defines the behaviour of the YAC for different mode configurations.

2.4 Data Range and Limitations

Both, the xi and yi inputs are defined with a size of XY W IDT H and therefore, the
maximum positive value in the two’s complement format is

α = 2XY W IDT H−1

−1 (2.1)

The angle input ai is defined with a size of A W IDT H + 2. The value β is defined with

β = 2A W IDT H−1
−1 (2.2)

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 Setup Description
ao = atan2(y i , xi ) · β,
mode =( FLAG VEC ROT = 1, VAL MODE CIR ) p
xo = xi + yi2
2

xo = cos(ai /β) · α
mode =( FLAG VEC ROT = 0, VAL MODE CIR )
yo = sin(ai /β) · α
mode =( FLAG VEC ROT = 1, VAL MODE LIN ) ao = z + y/x
mode =( FLAG VEC ROT = 0, VAL MODE LIN ) ao = y + x · z
ao = tanh(yi /xi ) · β,
mode =( FLAG VEC ROT = 1, VAL MODE HYP ) p
xo = x2i − yi2
xo = cosh(ai /β) · α
mode =( FLAG VEC ROT = 0, VAL MODE HYP )
yo = sinh(ai /β) · α

Table 2.3: Mode description (see equation 2.1 and 2.2 for α and β)

2.4.1 Circular Vectoring Mode

The valid input range for xi and yi is −α... + α. The angular input ai is ignored.

2.4.2 Circular Rotation Mode

The valid input range for xi and yi is −α... + α. For the angular input ai , values between
−βπ and +βπ are valid. For calculating a complex rotation of a complex vector, all three
inputs are required. For calculating sin and cos, xi is set to α and yi to 0, the angle input
ai gets the angle.

2.4.3 Linear Vectoring Mode

The linear vectoring mode is used to calculate yi /xi . The limitation of this operation is
the following:
yi
≤2 (2.3)
xi
The valid input values for xi and yi are −α... + α.

2.4.4 Linear Rotation Mode

The two inputs xi and yi have a valid data range between −α and +α.

2.4.5 Hyperbolic Vectoring Mode

The data-range for xi and yi is −0.79 · α to 0.79 · α.

2.4.6 Hyperbolic Rotation Mode

The data-range for ai is −β...β. Typically, xi is set to α and yi to 0.

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2.5 Internal Operation
Five states are used do to the CORDIC algorithm. The five states are visualized in a state
diagram in Figure 2.2. After reset, the YAC goes into the ST IDLE state. Only in this
state, the start signal is accepted. After starting the YAC, the state switches from the
ST IDLE state to the ST INIT state. The init state does some initial rotations/flipping.
After initialization, the main rotation starts with the ST ROTATION state (there are a few
cases, where no further rotations are required, see next sections). Every rotation step
is done within two clock cycles: in the first cycle, the angular value is loaded from the
lookup-table and shifted. In addition, the x and y values are shifted. In the second
clock cycle, the results are added according to the CORDIC algorithm. After all required
iterations are done, the state switches to the RM GAIN state, where the CORDIC gain is
removed (depending on the mode). The last state ST DONE is only used to set the done
flag to ’1’ for one clock cycle. After this, the YAC returns to the ST IDLE state.

2.5.1 Initialization
During the initialization state ST INIT, pre-rotations are done, depending on the selected
mode.

Circular Vectoring Mode

Because we support atan2 and not atan, we do the following pre-rotations. Some specific
input values don’t need a further processing, for example atan(0, 0).

Input Description
xi = 0, yi = 0 Fixed result: xo = 0, ao = 0, to support cartesian to polar coordinate
transformations, further processing is skipped
xi = 0, yi > 0 Fixed result: xo = yi , ao = π/2, further processing is skipped
xi = 0, yi < 0 Fixed result: xo = −yi , ao = −π/2, further processing is skipped
xi < 0, yi < 0 Pre-rotation from the third to the first quadrant, the angular register is
initialized with −π and the sign of the x and y register is flipped.
xi < 0, yi ≥ 0 Pre-rotation from the second to the fourth quadrant, the angular register
is initialized with π and the sign of the x and y register is flipped.
√
xi = +α, yi = +α Fixed result: xo = 2 · α, ao = π4 · β , further processing is skipped
√
xi = +α, yi = −α Fixed result: xo = 2 · α, ao = − π4 · β, further processing is skipped
√
xi = −α, yi = +α Fixed result: xo = 2 · α, ao = 3π 4
· β, further processing is skipped
√
xi = −α, yi = −α Fixed result: xo = 2 · α, ao = − 3π 4
· β , further processing is skipped

Circular Rotation Mode

The following pre-rotations are done:

9
Input Description
ai < − π2 Pre-rotation from the third to the first quadrant, the sign of the x and y
register is flipped, the angular register is initialized with π
π
ai > 2
Pre-rotation from the second to the fourth quadrant, the sign of the x and
y register is flipped, the angular register is initialized with −π

Linear Vectoring Mode

The following pre-rotations are done:

Input Description
xi < 0 Pre-rotation from the left half to the right half, thus the sign of the x and
y register is flipped

2.5.2 Rotation
Hyperbolic Repetitions
The following iteration steps are repeated for convergence of the hyperbolic mode:

4, 13, 40, 121, ..., 3i + 1 (2.4)

2.6 Testbench
A VHDL testbench (cordic iterative tb.vhd) is available which reads from an input file
data. This data is fed into the YAC. In addition, the input file must provide the output
data, which is expected from the YAC processing. The following format is used in the
testbench input-file:

x_i y_i a_i x_o y_o a_o mode

1234 1234 1234 1234 1234 1234 111 \

2345 2345 2345 2345 2345 2345 222 | 7 columns:
3456 3456 3456 3456 3456 3456 333 | 3 input, 3 output and one mode
... ... |
... |
...

The data must be in the two’s complement with a base of 10. After processing all lines,
the testbench prints some info, how much tests failed.
For generating the test-patterns, the C-model with octave is used. By running the script
cordic iterative test.m, an entry in the testbech data file is done for every cordic
calculation.

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 '1' INIT
rt=
sta

ROTATE
ues

IDLE
val
put
l in
cia
spe
for

DONE
done='1' RM_GAIN

Figure 2.2: State diagram

11
Chapter 3

Using the C-Model with Octave or

Matlab

For using the C-model, open octave or Matlab and compile the C-Model with
mex cordic iterative.c Afterwards, the C-model can be used in Octave/Matlab with the
function call
[ x o, y o, a o, it ] = cordic iterative( x i, y i, a i, mode, XY WIDTH, ANGLE WIDTH,
GUARD BITS, RM GAIN ).
The input and output arguments reflect almost the ports and parameters of the VHDL
toplevel implementation, except that there is no done, start clk and rst port in the C-
model. In addition, the last argument provides the number of iterations, which are done.

The input arguments x i, y i, and a i can be 1xN vectors with N elements. In this
case, this three input arguments must have the same size. All output arguments will also
have the same size 1xN.

3.1 Guard-Bits – Input and output sizes

It is possible to define MSB guard bits. The need of MSB guard bits have several reasons.
On the one hand, they are required to handle the data growth of the cordic gain within
the rotation state. (which is compensated later). A nother reason is the data growth
caused by the choise of input data. For example
√ √
α2 + α2 = 2α (3.1)
√
and therefore, a growth by the factor 2 happens, if an absolute calculation of the two
maximum input values is processed.

Another point is the input and output size of the angular values (ai and ao ) Because
within this YAC, β represents the angle 1, the input and output with of ai and ao is
A WIDTH+2, which allows to process angle values within −π...π

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3.1.1 Input data width versus iterations
The number of iterations depends on the width of the input data. Input data with X
bit require X + 1 rotations [4]. This requires, that the number of iterations are adapted.
One solution might be to detect the size of the input data and use this information for
the CORDIC processing. In YAC, a different sheme was chosen: the rotations are done
until

• the angular register is 0 or doesn’t change (in case of the rotation mode)

• the y register is 0 or doesn’t change (in case of the vecotring mode).

This results in a dynamic iterations adaption, depending the the input data width.

13
Chapter 4

Performance

The performance is evaluated through the matlab script cordic iterative test.m.

14
Chapter 5

Open issues and future work

5.1 Next steps

• Add YAC to a FPGA based System-on-Chip to prove FPGA feasibility

• Performance optimization

• circuit optimizations

• numerical optimizations

5.2 Future plans

• Hyperbolic range extension

• Floating point CORDIC

15
Bibliography

[1] Andraka, Ray; A survey of CORDIC algorithms for FPGA based computers

[2] Hu, Yu Hen; CORDIC-Based VLSI Architectures for Digital Signal Processing

[3] CORDIC on wikibook: http://en.wikibooks.org/wiki/Digital_Circuits/

CORDIC

[4] David, Herbert; Meyr, Heinricht; CORDIC Algorithms and Architectures

http://www.eecs.berkeley.edu/newton/Classes/EE290sp99/lectures/
ee290aSp996_1/cordic_chap24.pdf

16