AVCOE Sangamner Power Electronics

Unit 05:
Single phase DC-AC Converter (Transistor based)
Full bridge Voltage Source Converter
The converters which converts the power into ac power popularly known as the inverters,. The
application areas for the inverters include the uninterrupted power supply (UPS), the ac motor
speed controllers, etc.

Fig. Block diagram of an inverter.

The inverters can be classified based on a number of factors like, the nature of output waveform
(sine, square, quasi square, PWM etc), the power devices being used (thyristor transistor,
MOSFETs IGBTs), the configuration being used, (series. parallel, half bridge, Full bridge), the
type of commutation circuit that is being employed and Voltage source and current source
inverters.

The thyristorised inverters use SCRs as power switches. Because the input source of power is
pure de in nature, forced commutation circuit is an essential part of thyristorised inverters. The
commutation circuits must be carefully designed to ensure a successful commutation of SCRs.
The addition of the commutation circuit makes the thyristorised inverters bulky and costly. The
size and the cost of the circuit can be reduced to some extent if the operating frequency is
increased but then the inverter grade thyristors which are special thyristors manufactured to
operate at a higher frequency must be used, which are costly.

Typical applications

Un-interruptible power supply (UPS), Industrial (induction motor) drives, Traction, HVDC.

Classification of Inverters

There are different basis of classification of inverters. Inverters are broadly classified as current
source inverter and voltage source inverters. Moreover it can be classified on the basis of devices
used (SCR or gate commutation devices), circuit configuration (half bridge or full bridge), nature

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of output voltage (square, quasi square or sine wave), type of circuit (switched mode PWM or
resonant converters) etc.

Single Phase Bridge Inverter

A single phase bridge inverter is shown in Fig. . It consists of four transistors. These transistors
are turned on and off in pairs of Q1, Q2 and Q3 Q4. In order to develop a positive voltage + V
across the load, the transistors Q1, and O2 are turned on simultaneously whereas to have a
negative voltage - V across the load we need to turn on the devices Q3 and Q4. Diodes D1, D2,
D3, and D4 are known as the feedback diodes, because energy feedback takes place through
these diodes when the load is inductive.

Fig.: single phase full bridge inverter

Operation with resistive load

With the purely resistive load the bridge inverter operates in two different intervals In one cycle
of the output.
Mode I (0 - T0/2):
The transistors 01 and O2 conduct simultaneously in this mode. The load voltage is + V and
load current flows from A to B. The equivalent circuit for mode 1 is as shown in Fig. (A). At t =
To/2 , 0, and Q2 are turned off and Q3 and Q4 are turned on.

At t = T0/2, Q3 and Q4 are turned on and Q1 and Q2 are turned off. The load voltage is –V

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and load current flows from B to A. The equivalent circuit for mode II is as shown in Fig. At t = To,
Q3 and Q4 are turned off and Q1 and Q2 are turned on again.
• As the load is resistive it does not store any energy. Therefore the feedback diodes are not effective
here.
• The voltage and current waveforms with resistive load are as shown in Fig.

Fig.:Voltage and current waveforms with resistive load

The important observations from the waveforms of Fig. are as follows:

(i) The load current is in phase with the load voltage
(ii) The conduction period for each transistor is 1t radians or 1800
(iii) Peak current through each transistor = V/R.
(iv) Average current through each transistor = V/2R
(v) Peak forward voltage across each transistor = V volts.

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Single Phase Bridge Inverter with RL Load

The operation of the circuit can be divided into four intervals or modes. The waveforms are as
shown in Fig. .
Interval I (t1 – t2):
At instant tl, the pair of transistors Q1 and Q2 is turned on. The transistors are assumed to be
ideal switches. Therefore point A gets connected to positive point of dc source V through Q, and
point B gets connected to negative point of input supply.
The output voltage Vo == + V as shown in Fig 8.11(a). The load current starts increasing
exponentially due to the inductive nature of the load.
The instantaneous current through Q1 and Q2 is equal to the instantaneous load current. The
energy is stored into the inductive load during this interval of operation

Interval II (t2 - t3) :

• At instant t2 both the transistors Q1 and Q2 are turned off. But the load current does not reduce
to 0 instantaneously, due to its inductive nature.
• So in order to maintain the flow of current in the same direction there is a self induced voltage
across the load. The polarity of this voltage is exactly opposite to that in the previous mode.
• Thus output voltage becomes negative equal to - V. But the load current continues to now in
the same direction, through D3 andD4 as shown in Fig. .
• Thus the stored energy in the load inductance is returned back to the source in this mode. The
diodes D1 to D4 are therefore known as the feedback diodes.
• The load current decreases exponentially and goes to 0 at instant t3 when all the energy stored
ill the load is returned back to supply. D3 and D4 are turned off at t3·

Interval III (t3 – t4)

• At instant t3 ' Q3 and Q4 are turned on simultaneously. The load voltage remains negative
equal to - V but the direction of load current will reverse and become negative.
• The current increases exponentially in the negative direction. And the load again stores energy)
in this mode of operation. This is as shown in Fig .

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Interval IV ( t4 to t5) or (t0 to t1)

• At instant t4 or to the transistors Q3 and Q4 are turned off. The load inductance tries to
maintain the load current in the same direction, by inducing a positive load voltage.
• This will forward bias the diodes D) and D2. The load stored energy is returned back to the
input dc supply. The load voltage Vo = + V but the load current remains negative and decrease
exponentially towards 0. This is as shown in Fig. 8.12(b).
• At t5 or t1 the load current goes to zero and transistors Q1 and Q2 can be turned on again.

Conduction period of devices:

• The conduction period with a very highly inductive load, will be T014 or 90 0 for all the
transistors as well as the diodes.
• The conduction period of transistors will increase towards To/2.or 1800 with increase in th1
load power factor. (i.e., as the load becomes more and more resistive).

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Fig.. voltage and current waveforms for single phase bridge inverter with RL load.

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Current Source Converter with ideal Switches :

The circuit diagram of current source inverter is shown in Fig.. The variable dc voltage source is
converted into variable current source by using inductance L.

Fig. CSI using Thyristor

The current IL supplied to the single phase transistorised inverter is adjusted by the combination
of variable dc voltage and inductance L.
The waveforms of base currents and output current io are as shown in Fig. 8.15. When transistors
Q1 and Q2 conduct simultaneously, the output current is positive and equal to + IL. When
transistors Q3 and Q4 conduct simultaneously the output current io = - IL.
But io = 0 when the transistors from same arm i.e. Q( Q4 or Q2 Q3 conduct simultaneously

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Fig.: Waveforms for single phase current source

The output current waveform of Fig. is a quasi-square waveform. But it is possible to Obtain a
square wave load current by changing the pattern of base driving signals. Such waveforms are
shown in Fig.

Fig. Waveforms

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Load Voltage:
• The load current waveform in CSI has a defined shape, as it is a square waveform in this case.
But the load voltage waveform will be dependent entirely on the nature of the load.
• The load voltage with the resistive load will be a square wave, whereas with a highly inductive
load it will be a triangular waveform. The load voltage will contain frequency components at the
inverter frequency f, equal to l/T and other components at multiples of inverter frequency.
• The load voltage waveforms for different types of loads are shown in Fig.

Fig. Load voltage waveforms for different types of loads

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Pulse Width Modulation (PWM) techniques:

Advantages of Pulse Width Modulation techniques
 There are no necessary of any extra components to control output voltage of inverter.
th
 As the low order harmonics ( 3rd, 5th ) reduces whereas higher order harmonics ( 7 ,
9th and 11th ) are filter out, less requirement of filter.

Disadvantages of Pulse Width Modulation techniques

 As the switching semiconductor device requires low turn on and turn off time, cost of
semiconductor device increases.
Methods of PWM Control
Single Pulse Width Modulation ( SPWM )
 As the semiconductor device receives only one pulse during one half cycle, one
semiconductor device is switched on.
 The output voltage of the inverter can be controlled by controlling width of pulse.
 Figure A shows the gate signal and output voltage waveform for single phase full bridge
inverter.
 The gate signal is generated by comparing VR amplitude reference signal and
VC amplitude control signal.
o o
 The width of gate pulse can be varies from 0 to 180 by controlling the reference signal
from 0 to VR.
 This will control the output voltage of the inverter.
 The frequency of the output voltage depends upon frequency of reference signal.
 The amplitude modulation M is ratio of reference signal ( V R ) and carrier signal ( VC ).
 M = V R / VC
 The analysis of waveform shown in the figure A is done by fourier series.
 The output voltage becomes maximum when the width of pulse becomes π radian.

VL = 4VDC / π ............................................(1)
RMS output voltage
VRMS = VDC √ d / π....................................(2)
And maximum value of nth harmonic
VLn = 4VDC / nπ ( Sin nd / 2 ) ..................(3)
From equation (1) and (3)
VLn / VL = Sin ( nd / 2) / n ......................(4)
 The graphical representation of pulse width in degree ( x – axis ) and n = 1, 3, 5 and 7 ( y
– axis ) is shown in the figure .
 When a value of the fundamental component becomes equal to 0.143, the third, fifth
and seventh harmonics becomes equal.
 This will conclude the higher harmonics remains present when the output voltage is low.

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Waveform Y - axis X – axis

Fundamental n=1 Sin ( d / 2 )
3rd harmonic n=3 Sin ( 3d / 2 ) / 3 Pulse width in degree
5th harmonic n=5 Sin ( 5d / 2 ) / 5
7th harmonic n=7 Sin ( 7d / 2 ) / 7

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Multiple pulse width modulation ( MPWM )

 There are more than one pulse per half cycle in the MPWM.
 These gate pulses are used to control output voltage of inverter as well as reduce
harmonics.
 The magnitude and width of the pulses are equal in this method.
 The reference signal and higher frequencies carrier signals are compared in this method
in order to generate more than one gatting pulses.
 The number of gate pulses depends upon carrier frequencies whereas the output voltage
depend frequencies of reference signal.
From figure J,
 Carrier frequency = fC in Hz
 Reference frequency = fR in Hz

1 / fC = π / 3..................................................(5)
OR
TC = π / 3
Similarly
1 / 2fR = 1 / π .............................................(6)

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OR
TR = π / 2
Number of pulses per half cycle ( NP ) = Length of half cycle reference signal / Length
of one cycle triangular waveform
= ( f R / 2 ) / ( 1 / fC )
NP = fC / 2 fR
Number of generated pulses NP = ( 3 / π ) × π [ from equation (5) and (6) ]
=3


The RMS voltage when pulse width is equal to d

VRMS = VDC √ ( NP × d / π )
 As the number of pulses increases in the each half cycle, lower order harmonics reduces
but higher order harmonics increases.
 The higher order harmonics are reduced by using filter.
 It is to be noted that the switching losses of the semiconductor devices increases as there
are more number of pulses per half cycle.

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 This modulation technique is also called as symmetrical modulation control.

Sinusoidal Pulse width Modulation ( SINPWM )
 The reference signal is taken as sinusoidal waveform whereas the carrier signal is taken
as triangular waveform in this method.
 The width of pulse in the SINPWM is not equal due to reference signal is taken as
sinusoidal waveform.
 The amplitude of sinusoidal waveform is also not constant.
 The width of gate pulse is determined by intersect point of the sinusoidal waveform and
triangular waveform.
 The frequency of inverter output voltage depends upon frequency of reference signal
fR and amplitude of reference signal VR controls the modulation index ( M ).
 The number of pulses per half cycle when the amplitude of triangular waveform becomes
maximum and sinusoidal waveform becomes zero.
NP = fC / 2 fR
Where
fC = Carrier wave frequency = 3 / π
fR = Reference wave frequency = 1 / 2π
Therefore
NP = ( 3 / π ) × ( 2π / 2 )
=3
 The number of pulses per half cycle when the amplitude of triangular
waveform and sinusoidal becomes zero at same time.
NP = ( fC / 2 fR – 1 )
=2
The modulation index = VR / VC
 The analysis of harmonics is done in the sinusoidal PWM control is below.
 When the value of modulation index is less than one, the maximum harmonic number in
the output voltage is
fC / f R ± 1
OR
2NP ± 1
Where NP = Number of pulses per half cycle
 As the number of pulses per half cycle increases, the higher order harmonics also
increases.
th
 Let NP = 4, it will generates 7 harmonic and 9thharmonic but higher order harmonics are
easily filtered out.
 As the number of pulses increases per half cycle, the switching losses also increase and it
will affect the efficiency of inverter.
 When the modulation index is greater than one, lower order harmonics induces in the
output of the inverter.

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