2 Marks: Question Bank Unit - Ii Datapath Design
2 Marks: Question Bank Unit - Ii Datapath Design
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Question Bank
UNIT –II
DATAPATH DESIGN
2 Marks
1.Draw the full adder circuit (NOV/DEC 2007)
2.Define Spatial expansion. (APRIL/MAY 2008)
3.Define Temporal expansion. (APRIL/MAY 2008)
4.Define underflow and overflow. (APRIL/MAY 2008)
5.What are the disadvantages in using a ripple carry adder? (NOV/DEC 2006)
6.What is pipelining and what are the advantages of pipelining?
7.What is carry look ahead adder?
8.What is an ALU expansion? List out its types.
9.What is ripple-carry adder?
10.what is coprocessor?
11.What is modified Booth algorithm?
8 or 16 Marks
1. Illustrate Booth Algorithm with an example.
2. Design a 4-bit Carry-Look ahead Adder and explain its operation with an example.
(APRIL/MAY 2008) & (NOV/DEC 2007)
3. Draw the diagram of a carry look ahead adder and explain the carry look ahead
adder principle. (NOV/DEC 2006)
4. Design a 4-bit binary adder/ subtractor and explain its functions.
(APRIL/MAY 2008)
5. Give the algorithm for multiplication of signed 2’s complement numbers and
illustrate with an example. (APRIL/MAY 2008)
6. Write the algorithm for division of floating point numbers and illustrate with an
example. (APRIL/MAY 2008)
7. Explain the working of a floating point adder/ subtractor.Explain how floating point
additional/ subtraction is performed. (MAY/JUNE 2006) & (NOV/DEC 2006)
8. Give the IEEE standard double precision floating point format.
(NOV/DEC 2006)
9. Explain the representation of floating point numbers in detail.(MAY/JUNE 2007)
10. Design a 4-stage instruction pipeline and show how its performance is improved
over sequential execution.
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