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FPGA and IP EnclustraCatalogue PDF

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0% found this document useful (0 votes)
621 views68 pages

FPGA and IP EnclustraCatalogue PDF

Uploaded by

Sergey
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Catalogue Spring 2020

SoC and FPGA Modules

Mercury+ XU9. Unprecedented


performance, with Zynq® UltraScale+™.

Everything FPGA.
Everything FPGA.

At Enclustra, everything is FPGA.

Our products are used by more than 1200 customers in over 50 countries, and our
customer base is growing quickly. We don’t develop hardware and IP products only
– we do customer design projects too; every stage of development, from conception
through to bring-up at the customer site. We have more than 15 years of FPGA system
design under our belt; break it down a little further and our team of engineers has far
in excess of 250 person years of FPGA experience.

Our expertise enables us to create the best experience for our customers. We pride
ourselves on the quickest, highest possible quality of service and delivery from the
moment you get in touch, to the moment your system starts up in the field for the first
time.

Our off-the-shelf SoC & FPGA modules are developed with the aim of simplifying the
overall design of your FPGA-based system, thus significantly reducing the time and cost
to market.

As with our product range and our customer base, our list of completed projects
is growing – to keep up with developments, and not miss any of our upcoming
innovations, subscribe to our newsletter at www.enclustra.com/subscribe

This catalogue presents our current product and services; if anything piques
your interest, don’t hesitate to get in touch.

Thanks!

The Enclustra Team.


»   Co n ten ts

Hardware Products Our Hardware Products  4
Modules Module Overview  5
Mercury+ XU1  6
Mercury XU5  7
Mercury+ XU6  8
Mercury+ XU7/ XU8  9
Mercury+ XU9  10
Mercury ZX1  11
Mercury ZX5  12
Mercury+ ZX6  13
Mercury+ KX2  14
Mars AX3  15
Mars ZX2/ ZX3  16
Mars XU3  17
Andromeda XZU90  18
Andromeda XVA80  19
Mars MA3  20
Mercury+ AA1  21
Mercury+ SA2  22
Mercury SA1  23
Andromeda MPS70  24
Selection Guides Xilinx Mars and Mercury FPGA Modules Selection Guide  26
Xilinx Mars SoC Modules Selection Guide  30
Xilinx Mercury SoC Modules Selection Guide  32
Intel Mercury and Mars SoC Modules Selection Guide  42
Intel Mercury SoC Modules Selection Guide  44
Base Boards & Other Mercury+ PE1  46
Mercury+ PE3  47
Mercury+ ST1  48
Mars ST3  49
Mars EB1  50
Mars PM3  51
Support
Tools & Design Support Linux Build Environment  52
Module Configuration Toolkit  53
Design Support  54
IP Solutions
Solutions Our IP Solutions  55
Universal Drive Controller  56
FPGA Manager  58
Stream Buffer Controller  60
Display Controller  61
UDP/IP Ethernet  62
Further Information  63
Enclustra hardware
Delivered fast; made to last

Our modules all come with a minimum expected


lifetime of 10+ years; seeing as we also design our
hardware with forward-looking availability and
performance in mind, this means you can depend
on our products to deliver over the long term.

Our modules belonging to the same form factor are


largely pin-compatible, meaning you can also plan
a clear upgrade path. A full selection guide and
roadmap can be found after the individual module
info pages.

FPGA Solution Center


4
»  Mo d u l e Overv i ew

Mars Form Factor Mercury Form Factor Mercury+ Form Factor


200 Pin SO-DIMM High Performance High I/O Count & Performance

Mars XU3 Mercury XU5 Mercury+ XU8


Xilinx Zynq UltraScale+ MPSoC Xilinx Zynq UltraScale+ MPSoC Xilinx Zynq UltraScale+ MPSoC

Mars ZX3 Mercury ZX1 Mercury+ XU1


Xilinx Zynq-7000 SoC Xilinx Zynq-7000 SoC Xilinx Zynq UltraScale+ MPSoC

Mars ZX2 Mercury ZX5 Mercury+ XU7


Xilinx Zynq-7000 SoC Xilinx Zynq-7000 SoC Xilinx Zynq UltraScale+ MPSoC

Mars AX3 Mercury+ XU9


Xilinx Artix-7 Xilinx Zynq UltraScale+ MPSoC

Mercury+ KX2
Xilinx Kintex-7

Mars MA3 Mercury SA1 Mercury+ AA1


Intel Cyclone V SoC Intel Cyclone V SoC Intel Arria 10 SoC

Mercury+ SA2
Intel Cyclone V SoC

FPGA SOLUTION Center


MERCURY+ XU1
Zynq® UltraScale+™ SoC Module

ƒ Xilinx® Zynq UltraScale+ MPSoC


ƒ ZU6CG/ZU6EG/ZU9EG/ZU15EG devices
ƒ Dual-/Quad-core ARM® Cortex™-A53
ƒ Dual-core ARM Cortex-R5
ƒ Up to 8 GB DDR4 ECC SDRAM (PS side)
ƒ 64 MB QSPI flash
ƒ 16 GB eMMC flash
ƒ PCIe® Gen2 ×4
ƒ Up to 20 × 6/12.5/15 Gbps MGT
ƒ 2 × Gigabit Ethernet
ƒ 2 × USB 2.0/3.0
ƒ Up to 747,000 system logic cells
ƒ 294 user I/Os
ƒ 5–15 V supply
ƒ 74 × 54 mm

OS support:

Module Connector B

4 Channels: 4 MGTs 72 I/Os


Mercury+ XU1
PCIe Gen2 ×4 (1.8V)
USB 3.0 ×2
Display Port ×2
SATA ×2
DDR4 SGMII ×4
ECC
SDRAM 72-bit
PS PL PL
Gigabit
PS | PL PS
Ethernet
PHY (x2)
8-bit
eMMC Flash
Module Connector C

PS
PS

8 MGTs
PL
ZYNQ UltraSCALE+
®
PS
USB PHY (x2)
76 I/Os (1.8V)
or 56 I/Os (1.8V) and 4 MGTs PL
4 MGTs1
PL

1.8V 1.8V
3.3V 3.3V PL PS
Power Supply 2.5V
Quad SPI Flash

5-15V 52 I/Os 14 I/Os I2C | JTAG |


(3.3V) (3.3V) Configuration

Module Connector A

1: G1 assembly variant available starting with revision 3.


6 1: G1 assembly variant available starting with revision 3.
MERCURY XU5
Zynq® UltraScale+™ SoC Module

ƒ Xilinx® Zynq UltraScale+ MPSoC


ƒ ZU2CG/ZU2EG/ZU3EG/ZU4CG/ZU4EV/ZU5EV devices
ƒ Dual-/Quad-core ARM® Cortex™-A53
ƒ Dual-core ARM Cortex-R5
ƒ H.264 / H.265 Video Codec (EV only)
ƒ Up to 8 GB DDR4 ECC SDRAM (PS side)
ƒ U p to 2 GB DDR4 SDRAM (PL side)
ƒ 1 6 GB eMMC flash
ƒ 6 4 MB QSPI flash
ƒ PCIe Gen2 ×4
ƒ PCIe Gen3 ×4 (only devices larger than ZU3)
ƒ U p to 8 × 6/12.5 Gbit/sec MGT
ƒ 2 × Gigabit Ethernet
ƒ 2 × USB 2.0/3.0
ƒ U p to 256,000 system logic cells
ƒ 1 78 user I/Os
ƒ 5 –15 V supply
ƒ 5 6 × 54 mm

OS support:

Module Connector B

4 Channels1: 4 MGTs2 72 I/Os3


Mercury XU5 PCIe Gen2 ×4 (PCIe Gen3 ×4) (1.8V)
USB 3.0 ×2 or
Display Port ×2 20 I/Os
SATA ×2 (1.8V)
SGMII ×4

PS PL PL Gigabit
16-bit Ethernet
DDR4 SDRAM PL
PL
PHY

DDR4 Gigabit
72-bit
ECC
ZYNQ
PS | PL PS
Ethernet
SDRAM ® PHY
UltraSCALE+

8-bit
eMMC Flash PS PS
USB PHY (x2)

1.8V
3.3V PL PS
Power Supply 2.5V
Quad SPI Flash

5-15V 52 I/Os4 14 I/Os5 I2C | JTAG |


(3.3V) (3.3V) Configuration

Module Connector A

G1 Variants: 1.) 0 Channels, 2.) 4 MGTs only, 3.) 92 I/Os, 4.) 54 I/Os, 5.) 12 I/Os
G1 Variants: 1.) 0 Channels, 2.) 4 MGTs only, 3.) 92 I/Os, 4.) 54 I/Os, 5.) 12 I/Os 7
MERCURY+ XU6
Zynq® UltraScale+™ SoC Module

ƒ Xilinx® Zynq UltraScale+ MPSoC


ƒ ZU2CG/ZU2EG/ZU3EG/ZU4CG/ZU4EV/ZU5EV devices
ƒ Dual-/Quad-core ARM® Cortex™-A53
ƒ Dual-core ARM Cortex-R5
ƒ H.264 / H.265 Video Codec (EV only)
ƒ Up to 8 GB DDR4 SDRAM (PS side)
ƒ 16 GB eMMC flash
ƒ 64 MB QSPI flash
ƒ Up to 8 × 6/12.5 Gbps MGT
ƒ PCIe Gen2 ×4
ƒ PCIe® Gen3 ×4 (only devices larger than ZU3)
ƒ Gigabit Ethernet
ƒ 2 × USB 2.0/3.0
ƒ Up to 256,000 system logic cells
ƒ Up to 294 user I/Os
ƒ 5–15 V supply
ƒ 65 × 54 mm

OS support:

Module Connector B

4 MGTs 72 I/Os 4 Channels:


Mercury+ XU6
(PCIe Gen3 x4)1 (1.8V) PCIe Gen2 ×4
USB 3.0 ×2
Display Port ×2
SATA ×2
SGMII ×4

PL PL PS DDR4 ECC
72-bit
SDRAM
PS | PL

Gigabit
Module Connector C

PS
Ethernet
PHY
72 I/Os (1.8V)
PL
ZYNQ UltraSCALE+
®

PS
USB
USB PHY
PHY(x2)
(x2)
44 I/Os (3.3V)
8-bit
PL
PS
eMMC Flash
1.8V 1.8V
3.3V 3.3V PL PS
Power Supply 2.5V
Quad SPI Flash

5-15V 52 I/Os 14 I/Os I2C | JTAG |


(3.3V) (3.3V) Configuration

Module Connector A

1: MGTs and PCIe support only for FPGA devices larger then ZU3
8 1: MGTs and PCIeIn support
developmentonly
- pleasefor FPGA
contact us fordevices
availability. larger than ZU3
In development – please contact us for availability.
MERCURY+ XU7/ XU8
Zynq® UltraScale+™ SoC Module

ƒ Xilinx® Zynq UltraScale+ MPSoC


ƒ XU7: ZU6EG/ZU9EG/ZU15EG devices
ƒ XU8: ZU4CG/ZU5EV/ZU7EV devices
ƒ Dual-/Quad-core ARM® Cortex™-A53
ƒ Dual-core ARM Cortex-R5
ƒ H.264 / H.265 Video Codec (XU8 EV only)
ƒ U p to 8 GB DDR4 ECC SDRAM (PS side)
ƒ U p to 4 GB DDR4 SDRAM (PL side)
ƒ 1 6 GB eMMC flash
ƒ 6 4 MB QSPI flash
ƒ PCIe® Gen3 ×16 (XU8) and PCIe Gen2 ×4
ƒ 2 0 × 6/12.5/15 Gbps MGT
ƒ 2 × Gigabit Ethernet
ƒ 2 × USB 2.0/3.0
ƒ U p to 747,000 system logic cells
ƒ 2 36 user I/Os
ƒ 5 –15 V supply
ƒ 7 4 × 54 mm

OS support:

Module Connector B

4 Channels: 4 MGTs 50 I/Os


Mercury+ XU8
PCIe Gen2 ×4 (PCIe Gen3 ×4)1 (1.8V)
USB 3.0 ×2
Display Port ×2
DDR4 SATA ×2
SDRAM SGMII ×4

PS PL PL
Gigabit
32-bit
DDR4 PS
Ethernet
ECC PL
PHY (x2)
72-bit
SDRAM
PS | PL
Module Connector C

PS

ZYNQ
8-bit
eMMC Flash PS
USB PHY (x2)
®

UltraSCALE+ PS

12 MGTs (PCIe Gen3 ×8 and ×4)1


PL
20 I/Os (1.2V)
PL
1.8V 1.8V
3.3V 3.3V PL PS
Power Supply 2.5V
Quad SPI Flash

5-15V 52 I/Os 14 I/Os I2C | JTAG |


(3.3V) (3.3V) Configuration

Module Connector A

1: PCIe Gen3 x16 available at the system level by merging the MGTs from connectors B and C
1: PCIe Gen3 ×16 available at the system level by merging the MGTs from connectors B and C 9
Mercury+ XU7 features the same characteristics, except for PCIe support on PL side.
MERCURY+ XU9
Zynq® UltraScale+™ SoC Module

ƒ Xilinx® Zynq UltraScale+ MPSoC


ƒ ZU4CG/ZU5EV/ZU7EV devices
ƒ Dual-/Quad-core ARM® Cortex™-A53
ƒ Dual-core ARM Cortex-R5
ƒ H.264 / H.265 Video Codec
ƒ Up to 8 GB DDR4 ECC SDRAM (PS side)
ƒ Up to 8 GB DDR4 SDRAM (PL side)
ƒ 16 GB eMMC flash
ƒ 64 MB QSPI flash
ƒ 20 × 6/12.5/15 Gbps MGT
ƒ PCIe® Gen3 ×16 and PCIe Gen2 ×4
ƒ 2 × Gigabit Ethernet
ƒ 2 × USB 2.0/3.0
ƒ Up to 504,000 system logic cells
ƒ 192 user I/Os
ƒ 5–15 V supply
ƒ 74 × 54 mm

OS support:

Module Connector B

4 Channels: 4 MGTs
Mercury+ XU9
PCIe Gen2 ×4 (PCIe Gen3 ×4)1
USB 3.0 ×2
Display Port ×2
SATA ×2
SGMII ×4

DDR4
PS PL
Gigabit
64-bit
SDRAM PS
Ethernet
PL
PHY (x2)
DDR4 72-bit
Module Connector C

ECC SDRAM PS | PL
PS

eMMC Flash
8-bit
PS
ZYNQ UltraSCALE+
®
PS
USB PHY (x2)

12 MGTs (PCIe Gen3 ×8 and ×4)1


PL
26 I/Os (1.2V)

1.8V 1.8V PL

3.3V 3.3V PL PS
Power Supply 2.5V
Quad SPI Flash

5-15V 52 I/Os 14 I/Os I2C | JTAG |


(3.3V) (3.3V) Configuration

Module Connector A

1: PCIe Gen3 x16 available at the system level by merging the MGTs from connectors B and C
10 1: PCIe Gen3 ×16 available at the system level by merging the MGTs from connectors B and C.
MERCURY ZX1
Zynq®-7030/7035/7045 SoC Module

ƒ Xilinx® Zynq-7030/7035/7045 SoC FPGA


ƒ Dual-core ARM® Cortex™-A9
ƒ 1 GB + 256 MB DDR3L SDRAM
ƒ 64 MB QSPI flash
ƒ 512 MB NAND flash
ƒ PCIe® Gen2 ×4/×8
ƒ Up to 8 × 6.6/10.3125 Gbps MGT
ƒ Gigabit Ethernet
ƒ 2 × Fast Ethernet
ƒ USB 2.0 OTG
ƒ Up to 350,000 system logic cells
ƒ Up to 178 user I/Os
ƒ 5–15 V supply
ƒ 64 × 54 mm

OS support:

Module Connector B

Mercury ZX1

8/4 MGTs 84/72 I/Os


Real-time (PCIe Gen2 ×8/×4) (1.8V)
Clock
Gigabit
DDR3 PL PL PS Ethernet PHY
32-bit
SDRAM PS | PL
Fast Ethernet
DDR3 16-bit
PS | PL PHY (x2)
SDRAM PL

33 MHz ZYNQ ®
PS
USB 2.0 PHY

SDRAM
NAND Flash
200 MHz
SDRAM PS

PL PS|PL
1.8V Quad SPI Flash
3.3V
Power Supply 2.5V

54 I/Os 12 I/Os I2C | JTAG |


5-15V (3.3V) (3.3V) Configuration

Module Connector A

11
MERCURY ZX5
Zynq®-7015/7030 SoC Module

ƒ Xilinx® Zynq-7015/7030 SoC FPGA


ƒ Dual-core ARM® Cortex™-A9
ƒ 1 GB DDR3L SDRAM
ƒ 64 MB QSPI flash
ƒ 512 MB NAND flash
ƒ PCIe® Gen2 ×4
ƒ 4 × 6.25/6.6 Gbps MGT
ƒ Gigabit Ethernet
ƒ USB 2.0 OTG
ƒ Up to 125,000 system logic cells
ƒ 178 user I/Os
ƒ 5–15 V supply
ƒ 56 × 54 mm

OS support:

Module Connector B

Mercury ZX5

4 MGTs 92 I/Os
(PCIe Gen2 ×4) (1.8V/3.3V)

PL PL
Gigabit
DDR3L 32-bit
Ethernet
SDRAM PS | PL PS
PHY

33 MHz Clock
ZYNQ ®
PS
USB 2.0 PHY

Real-time
NAND Flash
Clock
PS
1.8V
3.3V PL PS
Power Supply 2.5V
Quad SPI Flash

5-15V 54 I/Os 12 I/Os I2C | JTAG |


(3.3V) (3.3V) Configuration

Module Connector A

12
MERCURY+ ZX6
Zynq®-7014S/7020 SoC Module

ƒ Xilinx® Zynq-7014S/7020 SoC FPGA


ƒ Single-/Dual-core ARM Cortex-A9
ƒ Up to 1 GB DDR3L SDRAM
ƒ 16 GB eMMC flash
ƒ 64 MB QSPI flash
ƒ Gigabit Ethernet
ƒ USB 2.0 OTG
ƒ Up to 85,000 system logic cells
ƒ 208 user I/Os
ƒ 5–15 V supply
ƒ 65 × 54 mm

OS support:

Module Connector B

Mercury+ ZX6

112 I/Os
(3.3V)

PL
Gigabit
DDR3L
Ethernet
SDRAM PS
32-bit PHY
PS | PL
Module Connector C

30 I/Os (3.3V)
PL
ZYNQ ®
PS
USB 2.0 PHY
33 MHz Clock
4-bit
PS eMMC Flash
Real-time
Clock
PL PS
1.8V 1.8V Quad SPI Flash
3.3V 3.3V
Power Supply 2.5V

5-15V 54 I/Os 12 I/Os I2C | JTAG |


(3.3V) (3.3V) Configuration

Module Connector A

Advance – we are actively looking for customers interested in this or a similar module. 13
Please contact us with your detailed requirements.
MERCURY+ KX2
Kintex®-7 FPGA Module

ƒ Xilinx® Kintex-7 FPGA


ƒ Up to 4 GB DDR3L SDRAM
ƒ 64 MB QSPI flash
ƒ PCIe® Gen2 ×8
ƒ 8 × 6.6/10.3125 Gbps MGT
ƒ USB 2.0 device controller
ƒ 2 × Gigabit Ethernet
ƒ Up to 407,000 system logic cells
ƒ 256 user I/Os
ƒ 5-15 V single supply
ƒ 74 × 54 mm

Module Connector B

Mercury+ KX2

8 MGTs 72 I/Os
(PCIe Gen2 ×8) (3.3V)

Gigabit
DDR3 64-bit
Ethernet
SDRAM
PHY (x2)
Module Connector C

200 MHz Clock


KINTEX 7 ®

8-bit
78 I/Os (3.3V) FTDI USB 2.0

1.8V
3.3V 3.3V
2.5V
Power Supply 2.5V
Quad SPI Flash

5-15V 66 I/Os I2C | JTAG |


(3.3V) Configuration

Module Connector A

14
MARS AX3
Artix®-7 FPGA Module

ƒ Xilinx® Artix-7 FPGA


ƒ Up to 512 MB DDR3L SDRAM
ƒ 64 MB QSPI flash
ƒ Gigabit Ethernet
ƒ Up to 101,440 system logic cells
ƒ 108 user I/Os
ƒ 3.3 V single supply
ƒ 67.6 × 30 mm SO-DIMM

Mars AX3

4 LEDs
Gigabit
Ethernet
PHY

ARTIX 7
16-bit
DDR3 SDRAM
®
50 MHz Clock
Quad SPI Flash

Power Supply

3.3V 1.8V 108 I/Os I2C | JTAG |


(3.3V) Configuration

15
MARS ZX2/ ZX3
Zynq®-7010/7020 SoC Module

ƒ X ilinx® Zynq-7010/7020 SoC FPGA


ƒ Dual-core ARM® Cortex™-A9
ƒ U p to 1 GB DDR3L SDRAM
ƒ 6 4 MB QSPI flash
ƒ 5 12 MB NAND flash (ZX3)
ƒ U SB 2.0 OTG
ƒ G igabit Ethernet
ƒ U p to 85,000 system logic cells
ƒ 1 08 user I/Os
ƒ 3 .3 V single supply
ƒ 67.6 × 30 mm SO-DIMM

OS support:

Mars ZX3

4 LEDs Gigabit
PS | PL
Ethernet
32-bit
DDR3 SDRAM PS | PL
PHY
Real-time
Clock

ZYNQ ®
NAND Flash

33 MHz Clock PS
USB 2.0
PHY PS
Quad SPI Flash
Power Supply
PL PS|PL

3.3V 1.8V 96 I/Os 12 I/Os I2C | JTAG |


(3.3V) (3.3V) Configuration

16 NAND flash not available on ZX2. DDR3 SDRAM width on ZX2 is 16 bit.
MARS XU3
Zynq® UltraScale+™ SoC Module

ƒ Xilinx® Zynq UltraScale+ MPSoC


ƒ ZU2CG/ZU2EG/ZU3EG devices
ƒ Dual-/Quad-core ARM® Cortex™-A53
ƒ Up to 4 GB DDR4 SDRAM
ƒ 16 GB eMMC flash
ƒ 64 MB QSPI flash
ƒ PCIe® Gen2 ×4
ƒ 4 × 5 Gbps MGT
ƒ Gigabit Ethernet
ƒ USB 3.0
ƒ USB 2.0 OTG
ƒ Up to 154,000 system logic cells
ƒ 108 user I/Os
ƒ 67.6 × 30 mm SO-DIMM

OS support:

Mars XU3

Gigabit
32-bit PS
Ethernet
DDR4 SDRAM PS | PL PHY

8-bit
ZYNQ UltraSCALE+
®
PS
USB PHY

eMMC Flash PS

4 Channels:
Quad SPI Flash
PCIe Gen2 ×4 PS
Power Supply USB 3.0 ×2
Display Port ×2 PL PL PS
SATA ×2
3.3V 1.8V SGMII ×4 24 I/Os 52 I/Os 12 I/Os I2C | JTAG |
(3.3V) (1.8V) (3.3V) Configuration

17
ANDROMEDA XZU90
Zynq® UltraScale+™ SoC Module

ƒ Xilinx® Zynq UltraScale+ MPSoC


ƒ ZU17EG/ZU19EG devices
ƒ Quad-core ARM® Cortex™-A53
ƒ Dual-core ARM Cortex-R5
ƒ Up to 8 GB DDR4 SDRAM (PS side)
ƒ 16 GB eMMC flash
ƒ 128 MB QSPI flash dual-parallel
ƒ 76 × 6/16.3/25 Gbps MGT
ƒ Up to 5 × PCIe® Gen3 ×16 and PCIe Gen2 ×4
ƒ 2 × Gigabit Ethernet
ƒ USB 2.0/3.0
ƒ Up to 1,143,000 system logic cells
ƒ 683 user I/Os
ƒ 12 V supply
ƒ 80 × 64 mm

Connector U
Andromeda XZU90

Connector V

Connector W
Dual QSPI
PL 104 I/Os PL 8 MGTs Flash
103 I/Os (1.8V)
(1.8V) PS
PL eMMC Flash
8-bit
8 MGTs
PS
PL
16 MGTs USB PHY

ZYNQ
PS
PL
DDR4 ECC 72-bit
SDRAM
®
Gigabit
PS | PL UltraSCALE+
16 MGTs
Ethernet
PS
PL
PHY
24 MGTs
PL
Gigabit
PL
52 I/Os 24 I/Os 20 I/Os Ethernet
PL PL PS PS 4 GTRs
(1.8V) (3.3V) (3.3V) PHY
Power Supply 12 V Connector X
3.3 V / 1.8 V

Connector Y

Connector Z

18 In development – please contact us for availability.


ANDROMEDA XVA80
Xilinx® Versal™ ACAP (Adaptive Compute Acceleration Platform) Module

ƒ Xilinx Versal AI Core ACAP


ƒ VC1502/VC1802/VC1902 devices
ƒ Dual-core ARM® Cortex™-A72
ƒ Dual-core ARM Cortex-R5
ƒ Up to 4 GB DDR4 ECC SDRAM
ƒ Up to 3 × 4 GB LPDDR4 SDRAM
ƒ 16 GB eMMC flash
ƒ 128 MB QSPI flash dual-parallel
ƒ 44 × 25 Gbps MGT
ƒ 4 × PCIe® Gen4 ×8
ƒ 2 × Gigabit Ethernet
ƒ USB 2.0
ƒ Up to 1,968,000 system logic cells
ƒ Up to 400 AI engines
ƒ 412 user I/Os
ƒ 12 V supply
ƒ 80 × 64 mm

Andromeda XVA80

Connector V

Connector W

56 I/Os 56 I/Os
PL PL 8 MGTs
(1.5V)
(1.5V) Dual QSPI
PL
PS
Flash
8 MGTs
DDR4 ECC PL 8-bit
eMMC Flash
72-bit
SDRAM PS

ZYNQ
VERSAL
PS | PL
3x16-bit Gigabit
LPDDR4
LPDDR4 Gigabit
LPDDR4 PS | PL
® ®

SDRAM AI Core
UltraSCALE+ Ethernet
Ethernet
SDRAM(x3)
SDRAM (x3)
(x3) 28 I/Os PS
(1.5V)
PHY
PHY (x2)
(x2)
PL
24 MGTs USB PHY
PL PS
28 I/Os 24 I/Os
PL PL PL 4 MGTs
(1.5V) (3.3V)

Power Supply 12 V Connector X


3.3 V / 1.8 V

Connector Y

Connector Z

Advance – we are actively looking for customers interested in this or a similar module. 19
Please contact us with your detailed requirements.
MARS MA3
Cyclone® V SoC Module

ƒ Intel® Cyclone V SoC


ƒ Dual-core ARM® Cortex™-A9
ƒ Up to 2 GB DDR3L SDRAM
ƒ 16 GB eMMC flash
ƒ 64 MB QSPI flash
ƒ PCIe® Gen1 ×2 (SX SoC only)
ƒ Up to 2 × 3.125 Gpbs MGT
ƒ Gigabit Ethernet, Fast Ethernet
ƒ USB 2.0 OTG
ƒ Up to 110,000 system logic elements
ƒ Up to 104 user I/Os
ƒ 3.3 V single supply
ƒ 67.6 × 30 mm SO-DIMM

OS support:

Mars MA3

8-bit
HPS
eMMC Flash
32-bit
DDR3L SDRAM FPGA | HPS

Gigabit
FPGA | HPS Ethernet PHY

Fast Ethernet USB 2.0


PHY FPGA

2 MGTs (PCIe Gen1 x2)


Cyclone® V HPS PHY
SoC
or 4 I/Os (3.3V)

Power Supply
FPGA
Quad SPI Flash
FPGA FPGA|HPS HPS

3.3V 2.5V 76 I/Os 14 I/Os 2 I/Os I2C | JTAG |


(3.3V) (3.3V) (3.3V) Configuration

20
MERCURY+ AA1
Arria® 10 SoC Module

ƒ Intel® Arria 10 SoC


ƒ Dual-core ARM® Cortex™-A9
ƒ U p to 4 GB DDR4 ECC SDRAM
ƒ 6 4 MB QSPI flash
ƒ 1 6 GB eMMC flash
ƒ PCIe® Gen3 ×8
ƒ 1 2 × 10.3125/12.5 Gbps MGT
ƒ U SB 3.0 device controller
ƒ U SB 2.0 host/device
ƒ G igabit Ethernet
ƒ U p to 480,000 system logic elements
ƒ 2 86 user I/Os
ƒ 5 –15 V supply
ƒ 7 4 × 54 mm

OS support:

Module Connector B

Mercury+ AA1

8 MGTs 72 I/Os
(PCIe Gen3 ×8) (1.8V)
Real-time
Clock
FPGA FPGA
Gigabit
DDR4 ECC 40-bit HPS
Ethernet
SDRAM FPGA | HPS PHY
Module Connector C

4 MGTs
FPGA
48 I/Os (1.8V)
FPGA HPS
USB 2.0 PHY
44 I/Os (1.8V)

Cypress FX3
FPGA
Arria® 10
FPGA • SoC eMMC Flash
USB 3.0
HPS
1.8V 1.8V
3.3V 3.3V FPGA HPS
Power Supply Quad SPI Flash

5-15V 48 I/Os 18 I/Os I2C | JTAG |


(1.8V) (1.8V) Configuration

Module Connector A

21
MERCURY+ SA2
Cyclone® V SoC Module

ƒ Intel® Cyclone V SoC


ƒ Dual-core ARM® Cortex™-A9
ƒ U p to 4 GB DDR3L SDRAM
ƒ 6 4 MB QSPI flash
ƒ 16 GB eMMC flash (starting with revision 2)
ƒ PCIe® Gen1/Gen2 ×4
ƒ 9 × 3.125/6.144 Gbps MGT
ƒ U SB 3.0 device controller
ƒ U SB 2.0 host/device
ƒ G igabit Ethernet, 2 × Fast Ethernet
ƒ U p to 110,000 system logic elements
ƒ 2 94 user I/Os
ƒ 5 –15 V supply
ƒ 7 4 × 54 mm

OS support:

Module Connector B

Mercury+ SA2

8 MGTs 74 I/Os
(PCIe Gen2 ×4) (3.3V)
Real-time
Clock Gigabit
FPGA FPGA
Ethernet
DDR3L 32-bit HPS
PHY
SDRAM FPGA | HPS

4-bit
eMMC Flash
Module Connector C

1 MGT HPS
FPGA
80 I/Os (3.3V)
Fast Ethernet
Cyclone® V
FPGA
32 I/Os (3.3V)
FPGA
FPGA PHY (x2)
SoC
Cypress FX3
USB 3.0
HPS
USB 2.0 PHY
1.8V 1.8V
3.3V 3.3V FPGA HPS
Power Supply 2.5V
Quad SPI Flash

5-15V 48 I/Os 18 I/Os I2C | JTAG |


(3.3V) (3.3V) Configuration

Module Connector A

22
MERCURY SA1
Cyclone® V SoC Module

ƒ Intel® Cyclone V SoC FPGA


ƒ Dual-core ARM® Cortex™-A9
ƒ Up to 4 GB DDR3L SDRAM
ƒ 64 MB QSPI flash
ƒ 16 GB eMMC flash (starting with revision 3)
ƒ PCIe® Gen1 ×4
ƒ 6 × 3.125 Gbps MGT
ƒ USB 2.0 OTG
ƒ Gigabit Ethernet
ƒ Up to 110,000 system logic elements
ƒ 178 user I/Os
ƒ 5–15 V supply
ƒ 56 × 54 mm

OS support:

Module Connector B

Mercury SA1

6 MGTs 84 I/Os
(PCIe Gen1 ×4) (3.3V)

32-bit
FPGA FPGA
Gigabit
DDR3L SDRAM FPGA | HPS HPS
Ethernet
PHY

USB 2.0
HPS PHY

Cyclone® V 4-bit
Real-time Clock SoC HPS eMMC Flash1

1.8V
3.3V FPGA HPS
Power Supply 2.5V
Quad SPI Flash

5-15V 50 I/Os 16 I/Os I2C | JTAG |


(3.3V) (3.3V) Configuration

Module Connector A

1: Starting with revision 3.


1: Starting with revision 3. 23
ANDROMEDA MPS70
Microchip® PolarFire™ SoC Module

ƒ Microchip PolarFire SoC


ƒ MPFS250T/MPFS460T devices
ƒ RISC-V RV64CG Quad-core
ƒ RISC-V RV64IMAC Monitor core
ƒ Crypto Co-processor
ƒ Up to 4 GB DDR4 SDRAM (MSS side)
ƒ Up to 4 GB LPDDR4 SDRAM (FPGA side)
ƒ 16 GB eMMC flash
ƒ 64 MB QSPI flash
ƒ Up to 20 × up to 12.7 Gbps MGT
ƒ 2 × Gigabit Ethernet
ƒ USB 2.0
ƒ Up to 461,000 logic elements
ƒ 408 user I/Os
ƒ 12 V supply
ƒ 68 × 52 mm

OS support:

Andromeda MPS70

Connector V

Connector W

96 I/Os 40 I/Os
FPGA (3.3V) FPGA (1.8V)
84 I/Os Quad
(3.V) MSS SPI Flash
FPGA

DDR4 ECC 8-bit


eMMC Flash
36-bit
SDRAM MSS
MSS | FPGA

LPDDR4 32-bit Gigabit


Gigabit
SDRAM FPGA PolarFire SoC ®
FPGA
Ethernet
Ethernet
PHY
PHY (x2)
(x2)
16 MGTs
SoC FPGA
FPGA
MSS
USB 2.0
PHY
FPGA 24 I/Os FPGA 48 I/Os MSS 16 I/Os FPGA 4 MGTs
(1.8V) (3.3V) (3.3V)
Power Supply 12 V
Connector X
3.3 V / 1.8 V

Connector Y

24 Advance – we are actively looking for customers interested in this or a similar module.
Please contact us with your detailed requirements.
Need some tweaks?

If you find that one of our modules almost meets


your needs, but you have different interfacing or
device needs, let us know – we frequently customize
our products to specific requirements.

25
Mars and Mercury FPGA Modules Selection Guide Spartan-6 & Kintex-7 modules

Valid as of 25th February 2020 Mars™ MX1 Mars™ MX2 Mercury™ KX1
FPGA Family Spartan®-6 LX Spartan®-6 LXT Kintex®-7
FPGA Device Name 45 45 160T 325T
FPGA Speed Grade* 2
3 3 3 1 2
XC6SLX45- XC6SLX45- XC6SLX45T- XC7K160T- XC7K325T-
FPGA Part Number* 2
3CSG324C 3CSG324I 3CSG324I 1FBG676C 2FFG676I
CPU Cores - - -
CPU Frequency @ MHz - - -
PS Cores & Peripherals - - -
PS Ethernet | USB - - -
PS SDRAM Size (MByte) - - -
PS SDRAM Type | Bandwidth (MByte/s) - - -
PL System Logic Elements 43’661 43’661 162’240 326’080
PL Block RAM (kbit) 2’088 2’088 11’700 16’020
PL DSP Systolic FIR (MMAC/s) 45 45 656 1’092
PL MGT Transceivers @ Gbps*6 - 2 @ 3.2 4 @ 6.6 4 @ 10.3125
PL Peripherals - PCIe® Gen1 x1 PCIe® Gen2 x4
PL Ethernet | USB*5 2 x 100 Mbps 1 Gbps 2 x 1 Gbps | Cypress FX3™ USB 3.0
PL SDRAM Size (MByte) 128 256 1,024 + 256 2,048 + 512
PL SDRAM Type | Bandwidth (MByte/s) DDR2 | 1,600 DDR2 | 1,600 DDR3L | 4,000 DDR3L | 8,000
Flash Memory 16M QSPI 16M QSPI 64M QSPI
Connector Pins | IO Pins 200 | 108 200 | 108 336 | 178
PL 3.3V | PL 1.8V Pins | PS Pins 108 | - | - | - 96 | - | - | - 158 | - | - | -
Module Dimensions (mm) 67.6 x 30 67.6 x 30 72 x 54
Temperature Range*2 0..+70°C -40..+85°C 40..+85°C 0..+70°C -40..+85°C
Boot Modes Slave Serial | QSPI Slave Serial | QSPI Slave Serial | QSPI | USB3
Product Status Mature Mature Mature
Estimated Product Lifetime*3 2020 2020 2025+
Preferred Configuration | MOQ* 4
Yes No | 80 No | 70 Yes Yes
MA-MX1-45- MA-MX1-45- MA-MX2-45- ME-KX1-160- ME-KX1-325-
Module Order Code
3C-D7 3I-D7 3I-D8 1C-D10 2I-D11-P

s s
te price te price
Budgetary Price 1+ (EUR)

to-da to-da
for up- for up-
Budgetary Price 30+ (EUR)
Budgetary Price 100+ (EUR)
s tra.com s tra.com
Budgetary Price 1000+ (EUR)
c k w w w.enclu c k w w w.enclu
Budgetary Price 10000+ (EUR) Che Che
* Notes • Not all features are available simultaneously. Please check the documentation to know the applicable constraints.
1. We are actively looking for interested customers in this or a similar module. Please contact us with your detailed requirements. • All specifications and release dates are subject to change without notice. Please verify component specifications with vendors' datasheets.
2. The module is also available in different speed and temperature grades. Visit the product web page for more information. • Enclustra maintains an errata and revision history document for each product. Please also check the errata of the FPGA device and other components.
3. Please contact us about production data backup and module production license options. • All prices are non-binding estimates – please use the online Enquire/Order form to get definitive pricing and lead-time information.
4. For non-preferred configurations, the minimum order quantity (MOQ) only applies if the modules are not in stock – contact us for more details. • All trademarks are the property of their respective owners. All prices do not include shipping, taxes and duties.
5. Check out our FPGA Manager IP solution for simple data streaming into Windows/Linux embedded/host PCs.
6. Please ensure that adequate signal integrity is obtained over the full signal path when using MGT's at high performance.
26 General notes 27
Mars and Mercury FPGA Modules Selection Guide Artix-7 and Kintex-7 modules

Valid as of 25th February 2020 Mars™ AX3 Mercury+™ KX2


FPGA Family Artix®-7 Kintex®-7
FPGA Device Name 35 50 100 160T 160T 325T 410T
FPGA Speed Grade* 2
1 1 2 1 2 2 2
XC7A35T- XC7A50T- XC7A100T- XC7K160T- XC7K160T- XC7K325T- XC7K410T-
FPGA Part Number*2
1CSG324I 1CSG324I 2CSG324I 1FBG676C 2FFG676I 2FFG676I 2FFG676I
CPU Cores - -
CPU Frequency @ MHz - -
PS Peripherals - -
PS Ethernet | USB - -
PS SDRAM Size (MByte) - -
PS SDRAM Type | Bandwidth (MByte/s) - -
PL System Logic Cells 33’280 52’160 101’440 162’240 326’080 406’720
PL Block RAM (kbit) 1’800 2’700 4’860 11’700 16’020 28’620
PL DSP Systolic FIR (GMAC/s) 84 111 264 656 780 1’092 2’002
PL MGT Transceivers @ Gbps*6 - 8 @ 6.6 8 @ 10.3125
PL Peripherals - PCIe® Gen2 x8
PL Ethernet | USB*5 1 Gbps 2 x 1 Gbps | FTDI USB 2.0
PL SDRAM Size (MByte) 256 1’024 2'048
PL SDRAM Type | Bandwidth (MByte/s) DDR3 | 1,600 DDR3L | 6,400 DDR3L | 12,800
Flash Memory 64M QSPI 64M QSPI
Connector Pins | IO Pins 200 | 108 504 | 256
PL 3.3V | PL 1.8V | PL 1.2V Pins | PS Pins 108 | - | - | - 216 | - | - | -
Module Dimensions (mm) 67.6 x 30 74 x 54
Temperature Range*2 -40..+85°C 0..+70°C -40..+85°C
Boot Modes Slave Serial | QSPI Slave Serial | QSPI | USB2
Product Status Mass Production Mass Production
Estimated Product Lifetime*3 2030+ 2030+
Preferred Configuration | MOQ*4 Yes No | 90 Yes No | 40 Yes No | 20 No | 20
MA-AX3-35- MA-AX3-50- MA-AX3-100- ME-KX2-160- ME-KX2-160- ME-KX2-325- ME-KX2-410-
Module Order Code
1I-D8 1I-D8 2I-D8 1C-D10 2I-D11-P 2I-D11-P 2I-D11-P

prices prices
Budgetary Price 1+ (EUR)
te te
p-to-da p-to-da
Budgetary Price 30+ (EUR)
fo r u fo r u
Budgetary Price 100+ (EUR)
lus tra .com lus tra .com
Budgetary Price 1000+ (EUR)
ec k w ww.enc ec k w ww.enc
Budgetary Price 10000+ (EUR) Ch Ch
* Notes
1. We are actively looking for interested customers in this or a similar module. Please contact us with your detailed requirements. General notes
2. The module is also available in different speed and temperature grades. Visit the product web page for more information. • Not all features are available simultaneously. Please check the documentation to know the applicable constraints.
3. Please contact us about production data backup and module production license options. • All specifications and release dates are subject to change without notice. Please verify component specifications with vendors' datasheets.
4. For non-preferred configurations, the minimum order quantity (MOQ) only applies if the modules are not in stock – contact us for more details. • Enclustra maintains an errata and revision history document for each product. Please also check the errata of the FPGA device and other components.
5. Check out our FPGA Manager IP solution for simple data streaming into Windows/Linux embedded/host PCs. • All prices are non-binding estimates – please use the online Enquire/Order form to get definitive pricing and lead-time information.
6. Please ensure that adequate signal integrity is obtained over the full signal path when using MGT's at high performance. • All trademarks are the property of their respective owners. All prices do not include shipping, taxes and duties.
28 29
Mars SoC Modules Selection Guide Zynq-7000 and Zynq Ultrascale+ modules

Valid as of 25th February 2020 Mars™ ZX2 Mars™ ZX3 Mars™ XU3
FPGA Family Zynq®-7000 Zynq®-7000 Zynq® UltraScale+™
FPGA Device Name Z-7010 Z-7020 Z-7020 ZU2CG ZU2EG ZU3EG
FPGA Speed Grade* 2
2 2 1 2 1 1 2
XC7Z010- XC7Z020- XC7Z020- XC7Z020- XCZU2CG- XCZU2EG- XCZU3EG-
FPGA Part Number*2
2CLG400I 2CLG400I 1CLG484C 2CLG484I 1SBVA484E 1SBVA484I 2SBVA484I
CPU Cores 2 x ARM® Cortex™-A9 2 x ARM® Cortex™-A9 2 x A53 | 2 x R5 4 x ARM® Cortex™-A53 | 2 x Cortex™-R5
CPU Frequency @ MHz 766 667 766 1,200 | 500 1,333 | 533
DP | PCIe® Gen2 x4 Mali™ | DisplayPort | PCIe® Gen2 x4
PS Peripherals 2 x CAN 2 x CAN
SATA | SGMII | CAN SATA | SGMII | CAN
PS Ethernet | USB 1 Gbps | USB 2.0 OTG 1 Gbps | USB 2.0 OTG 1 Gbps | USB 3.0
PS SDRAM Size (MByte) 512 512 1,024 1,024 2,048
PS SDRAM Type | Bandwidth (MByte/s) DDR3L | 2,132 DDR3L | 4,264 DDR4 | 4,264
PL System Logic Cells 28’160 85’120 85’120 103’000 154’000
PL Block RAM (kbit) 2’160 5’040 5’040 5’400 7’776
PL DSP Systolic FIR (GMAC/s) 88 242 204 242 310 558
PL MGT Transceivers @ Gbps*6 - - -
PL Peripherals - - -
PL Ethernet | USB* 5
- 1 Gbps -
PL SDRAM Size (MByte) - - -
PL SDRAM Type | Bandwidth (MByte/s) - - -
Flash Memory 64M QSPI 64M QSPI | 512M NAND 64M QSPI | 16G eMMC
Connector Pins | IO Pins 200 | 108 200 | 108 200 | 108
PL 3.3V | PL 1.8V | PL 1.2V Pins | PS Pins 96 | - | - | 12 108 | - | - | 12 108 | - | - | 12 24 | 52 | - | 12
Module Dimensions (mm) 67.6 x 30 67.6 x 30 67.6 x 30
Temperature Range*2 -40..+85°C 0..+70°C -40..+85°C 0..+85°C -40..+85°C
Boot Modes QSPI | SD Card QSPI | SD Card QSPI | SD Card | eMMC
Product Status Mass Production Mass Production Mass Production
Estimated Product Lifetime*3 2030+ 2030+ 2030+
Preferred Configuration | MOQ* 4
Yes Yes Yes Yes Yes No | 70 Yes
MA-ZX2-10- MA-ZX2-20- MA-ZX3-20- MA-ZX3-20- MA-XU3-2CG- MA-XU3-2EG- MA-XU3-3EG-
Module Order Code
2I-D9 2I-D9 1C-D9 2I-D10 1E-D10 1I-D10 2I-D11
Budgetary Price 1+ (EUR)
s s
Budgetary Price 30+ (EUR)
to-da te price to-da te price
for up- for up-
tra.com tra.com
Budgetary Price 100+ (EUR)
s s
Budgetary Price 1000+ (EUR)
c k w w w.enclu c k w w w.enclu
Budgetary Price 10000+ (EUR) Che Che
* Notes
1. We are actively looking for interested customers in this or a similar module. Please contact us with your detailed requirements. General notes
2. The module is also available in different speed and temperature grades. Visit the product web page for more information. • Not all features are available simultaneously. Please check the documentation to know the applicable constraints.
3. Please contact us about production data backup and module production license options. • All specifications and release dates are subject to change without notice. Please verify component specifications with vendors' datasheets.
4. For non-preferred configurations, the minimum order quantity (MOQ) only applies if the modules are not in stock – contact us for more details. • Enclustra maintains an errata and revision history document for each product. Please also check the errata of the FPGA device and other components.
5. Check out our FPGA Manager IP solution for simple data streaming into Windows/Linux embedded/host PCs. • All prices are non-binding estimates – please use the online Enquire/Order form to get definitive pricing and lead-time information.
6. Please ensure that adequate signal integrity is obtained over the full signal path when using MGT's at high performance. • All trademarks are the property of their respective owners. All prices do not include shipping, taxes and duties.
30 31
Mercury SoC Modules Selection Guide Zynq-7000 modules

Valid as of 25th February 2020 Mercury™ ZX1 Mercury™ ZX5 Mercury+™ ZX6
FPGA Family Zynq®-7000 Zynq®-7000 Zynq®-7000
FPGA Device Name Z-7030 Z-7035 Z-7045 Z-7015 Z-7030 Z-7014S Z-7020
FPGA Speed Grade* 2
2 1 2 2 1 3 1 2
XC7Z030- XC7Z035- XC7Z045- XC7Z015- XC7Z030- XC7Z030- XC7Z014S- XC7Z020-
FPGA Part Number*2
2FBG676I 1FBG676I 2FFG676I 2CLG485I 1SBG485I 3SBG485E 1CLG484C 2CLG484I
CPU Cores 2 x ARM® Cortex™-A9 2 x ARM® Cortex™-A9 ARM® Cortex™-A9 2 x ARM® Cortex™-A9
CPU Frequency @ MHz 800 667 800 766 667 1’000 667 766
PS Peripherals 2 x CAN 2 x CAN 2 x CAN
PS Ethernet | USB 1 Gbps | USB 2.0 OTG 1 Gbps | USB 2.0 OTG 1 Gbps | USB 2.0 OTG
PS SDRAM Size (MByte) 1,024 1,024 512 1,024
PS SDRAM Type | Bandwidth (MByte/s) DDR3L | 4,264 DDR3L | 4,264 DDR3L | 5,333 DDR3L | 4,264
PL System Logic Cells 125’000 275’000 350’000 73’920 125’000 64’960 85’120
PL Block RAM (kbit) 9’540 18’000 19’620 3’420 9’540 3’852 5’040
PL DSP Systolic FIR (GMAC/s) 520 981 1’170 176 438 593 158 242
PL MGT Transceivers @ Gbps*6 4 @ 6.6 8 @ 6.6 8 @ 10.3125 4 @ 6.25 4 @ 6.6 -
PL Peripherals PCIe® Gen2 x4 PCIe® Gen2 x8 PCIe® Gen2 x4 -
PL Ethernet | USB*5 2 x 100 Mbps - -
PL SDRAM Size (MByte) 256 - -
PL SDRAM Type | Bandwidth (MByte/s) DDR3L | 2,133 DDR3L | 1,600 DDR3L | 3,200 - -
Flash Memory 64M QSPI | 512M NAND 64M QSPI | 512M NAND 64M QSPI | 16G eMMC
Connector Pins | IO Pins 336 | 170 336 | 178 336 | 178 504 | 208
PL 3.3V | PL 1.8V | PL 1.2V Pins | PS Pins 66 | 84 | - | 12 66 | 72 | - | 12 146 | - | - | 12 54 | 92 | - | 12 196 | - | - | 12
Module Dimensions (mm) 64 x 54 56 x 54 65 x 54
Temperature Range*2 -40..+85°C -40..+85°C 0..+70°C 0..+70°C -40..+85°C
Boot Modes QSPI | SD Card | NAND QSPI | SD Card | NAND QSPI | SD Card
Product Status Mass Production Mass Production Advance*1
Estimated Product Lifetime*3 2030+ 2030+ 2030+
Preferred Configuration | MOQ*4 Yes Yes Yes Yes Yes No | 40 TBD
ME-ZX1-30- ME-ZX1-35- ME-ZX1-45- ME-ZX5-15- ME-ZX5-30- ME-ZX5-30- ME-ZX6-14S- ME-ZX6-20-
Module Order Code
2I-D10 1I-D10 2I-D10-P 2I-D10 1I-D10 3C-D10 1C-D9 2I-D10

prices prices
Budgetary Price 1+ (EUR)
te te
p-to-da p-to-da
Budgetary Price 30+ (EUR)
fo r u fo r u
Budgetary Price 100+ (EUR)
lus tra .com lus tra .com
Budgetary Price 1000+ (EUR)
ec k w ww.enc ec k w ww.enc
Budgetary Price 10000+ (EUR) Ch Ch
* Notes
1. We are actively looking for interested customers in this or a similar module. Please contact us with your detailed requirements. General notes
2. The module is also available in different speed and temperature grades. Visit the product web page for more information. • Not all features are available simultaneously. Please check the documentation to know the applicable constraints.
3. Please contact us about production data backup and module production license options. • All specifications and release dates are subject to change without notice. Please verify component specifications with vendors' datasheets.
4. For non-preferred configurations, the minimum order quantity (MOQ) only applies if the modules are not in stock – contact us for more details. • Enclustra maintains an errata and revision history document for each product. Please also check the errata of the FPGA device and other components.
5. Check out our FPGA Manager IP solution for simple data streaming into Windows/Linux embedded/host PCs. • All prices are non-binding estimates – please use the online Enquire/Order form to get definitive pricing and lead-time information.
6. Please ensure that adequate signal integrity is obtained over the full signal path when using MGT's at high performance. • All trademarks are the property of their respective owners. All prices do not include shipping, taxes and duties.
32 33
Mercury SoC Modules Selection Guide Zynq UltraScale+ modules

Valid as of 25th February 2020 Mercury+™ XU1 Mercury+™ XU1 (cont.)


FPGA Family Zynq® UltraScale+™ Zynq® UltraScale+™
FPGA Device Name ZU6CG ZU6EG ZU9EG ZU9EG ZU9EG ZU15EG ZU15EG
FPGA Speed Grade* 2
1 1 1 2 3 1 2
XCZU6CG- XCZU6EG- XCZU9EG- XCZU9EG- XCZU9EG- XCZU15EG- XCZU15EG-
FPGA Part Number*2
1FFVC900E 1FFVC900I 1FFVC900E 2FFVC900I 3FFVC900E 1FFVC900E 2FFVC900I
CPU Cores 2 x A53 | 2 x R5 4 x ARM® Cortex™-A53 | 2 x Cortex™-R5 4 x ARM® Cortex™-A53 | 2 x Cortex™-R5
CPU Frequency @ MHz 1,200 | 500 1,333 | 533 1,500 | 600 1,200 | 500 1,333 | 533
DisplayPort | PCIe® Gen2 x4 Mali™ | DisplayPort | PCIe® Gen2 x4 Mali™ | DisplayPort | PCIe® Gen2 x4
PS Peripherals
SATA | SGMII | CAN SATA | SGMII | CAN SATA | SGMII | CAN
PS Ethernet | USB 2 x 1 Gbps | 2 x USB 3.0 2 x 1 Gbps | 2 x USB 3.0
PS SDRAM Size (MByte) 2,048 + ECC 4,096 + ECC
PS SDRAM Type | Bandwidth (MByte/s) DDR4 | 19,200 DDR4 | 19,200
PL System Logic Cells 469’446 599’550 599’550 746’550
PL Block RAM (kbit) 25’704 32’832 32’832 59’040
PL DSP Systolic FIR (GMAC/s) 2’545 3’251 3’906 4’491 4’551 5’468
PL MGT Transceivers @ Gbps*6 16 @ 12.5 12 @ 12.5 16 @ 12.5 12 @ 12.5 16 @ 12.5 12 @ 15 16 @ 15 12 @ 15 16 @ 12.5 12 @ 15 16 @ 15
PL Peripherals - -
PL Ethernet | USB*5 - -
PL SDRAM Size (MByte) - -
PL SDRAM Type | Bandwidth (MByte/s) - -
Flash Memory 64M QSPI | 16G eMMC 64M QSPI | 16G eMMC
Connector Pins | IO Pins 504 | 294 504 | 294
PL 3.3V | PL 1.8V | PL 1.2V Pins | PS Pins 52 | 128 | - | 14 52 | 148 | - | 14 52 | 128 | - | 14 52 | 148 | - | 14 52 | 128 | - | 14 52 | 148 | - | 14 52 | 128 | - | 14 52 | 148 | - | 14 52 | 128 | - | 14 52 | 148 | - | 14 52 | 128 | - | 14
Module Dimensions (mm) 74 x 54 74 x 54
Temperature Range*2 0..+85°C -40..+85°C 0..+85°C -40..+85°C 0..+85°C -40..+85°C
Boot Modes QSPI | SD Card | eMMC QSPI | SD Card | eMMC
Product Status Mass Production Mass Production
Estimated Product Lifetime*3 2030+ 2030+
Preferred Configuration | MOQ* 4
Yes No | 30 No | 20 Yes No | 30 No | 20 No | 20 No | 20 Yes Yes No | 20
ME-XU1-6CG- ME-XU1-6CG- ME-XU1-6EG- ME-XU1-6EG- ME-XU1-9EG- ME-XU1-9EG- ME-XU1-9EG- ME-XU1-9EG- ME-XU1-15EG- ME-XU1-15EG- ME-XU1-15EG-
Module Order Code
1E-D11E-G1 1E-D11E 1I-D11E-G1 1I-D11E 1E-D11E-G1 2I-D12E 2I-D12E-G1 3E-D12E 1E-D12E-G1 2I-D12E 2I-D12E-G1
Budgetary Price 1+ (EUR)
s s
to-da te price to-da te price
for up- for up-
Budgetary Price 30+ (EUR)

tra.com tra.com
Budgetary Price 100+ (EUR)
s s
Budgetary Price 1000+ (EUR)
c k w w w.enclu c k w w w.enclu
Budgetary Price 10000+ (EUR) Che Che
* Notes
1. We are actively looking for interested customers in this or a similar module. Please contact us with your detailed requirements. General notes
2. The module is also available in different speed and temperature grades. Visit the product web page for more information. • Not all features are available simultaneously. Please check the documentation to know the applicable constraints.
3. Please contact us about production data backup and module production license options. • All specifications and release dates are subject to change without notice. Please verify component specifications with vendors' datasheets.
4. For non-preferred configurations, the minimum order quantity (MOQ) only applies if the modules are not in stock – contact us for more details. • Enclustra maintains an errata and revision history document for each product. Please also check the errata of the FPGA device and other components.
5. Check out our FPGA Manager IP solution for simple data streaming into Windows/Linux embedded/host PCs. • All prices are non-binding estimates – please use the online Enquire/Order form to get definitive pricing and lead-time information.
6. Please ensure that adequate signal integrity is obtained over the full signal path when using MGT's at high performance. • All trademarks are the property of their respective owners. All prices do not include shipping, taxes and duties.
34 35
Mercury SoC Modules Selection Guide Zynq UltraScale+ modules

Valid as of 25th February 2020 Mercury™ XU5 Mercury™ XU5 (cont.)


FPGA Family Zynq® UltraScale+™ Zynq® UltraScale+™
FPGA Device Name ZU2CG ZU2EG ZU3EG ZU4CG ZU4EV ZU4EV ZU5EV ZU5EV ZU5EV ZU5EV
FPGA Speed Grade*2 1 1 2 1 1 1 1 2 2 3
XCZU2CG- XCZU2EG- XCZU3EG- XCZU4CG- XCZU4EV- XCZU4EV- XCZU5EV- XCZU5EV- XCZU5EV- XCZU5EV-
FPGA Part Number* 2
1SFVC784E 1SFVC784I 2SFVC784I 1SFVC784E 1SFVC784I 1SFVC784I 1SFVC784E 2SFVC784I 2SFVC784I 3SFVC784E
2 x ARM® 2 x ARM®
4 x ARM® Cortex™-A53
CPU Cores Cortex™-A53 Cortex™-A53 4 x ARM® Cortex™-A53 | 2 x Cortex™-R5
2 x Cortex™-R5
2 x Cortex™-R5 2 x Cortex™-R5
CPU Frequency @ MHz 1,200 | 500 1,333 | 533 1,200 | 500 1,200 | 500 1,333 | 533 1,500 | 600
Mali™ | DP | PCIe® Mali™ | DP | PCIe®
DP | PCIe® Gen2 x4 Mali™ | DP | PCIe® Gen2 x4 Mali™ | DP | PCIe® Gen2 x4
PS Peripherals CAN Gen2 x4 Mali™ | CAN Mali™ | CAN Gen2 x4
SATA | SGMII | CAN SATA | SGMII | CAN SATA | SGMII | CAN
SATA | SGMII | CAN SATA | SGMII | CAN
PS Ethernet | USB 1 Gbps | 2 x USB 3.0 1 Gbps | 2 x USB 2.0 1 Gbps | 2 x USB 3.0 1 Gbps | 2 x USB 2.0 1 Gbps | 2 x USB 3.0 1 Gbps | 2 x USB 2.0 1 Gbps | 2 x USB 3.0
PS SDRAM Size (MByte) 1,024 2,048 + ECC 2,048 + ECC 4,096 + ECC 8,192 + ECC
PS SDRAM Type | Bandwidth (MByte/s) DDR4 | 9,600 DDR4 | 19,200 DDR4 | 19,200
PL System Logic Cells 103’320 154’350 192’150 192’150 256’200
PL Block RAM (kbit) 5’400 7’776 18’432 18’432 23’616
PL DSP Systolic FIR (GMAC/s) 310 558 939 939 1’610 1’934 2’224
PL MGT Transceivers @ Gbps*6 - 4 @ 12.5 4 @ 12.5
H.265 Codec
PL Peripherals - PCIe® Gen3 x4
PCIe® Gen3 x4
PL Ethernet | USB*5 1 Gbps 1 Gbps
PL SDRAM Size (MByte) 512 512 1,024 2,048
PL SDRAM Type | Bandwidth (MByte/s) DDR4 | 4,266 DDR4 | 4,800 DDR4 | 4,266 DDR4 | 4,266 DDR4 | 4,800
Flash Memory 64M QSPI | 16G eMMC 64M QSPI | 16G eMMC
Connector Pins | IO Pins 336 | 178 336 | 178
PL 3.3V | PL 1.8V | PL 1.2V Pins | PS Pins 52 | 92 | - | 14 54 | 92 | - | 12 52 | 72 | - | 14 54 | 92 | - | 12 52 | 72 | - | 14 54 | 92 | - | 12 52 | 72 | - | 14
Module Dimensions (mm) 56 x 54 56 x 54
Temperature Range*2 0..+85°C -40..+85°C 0..+85°C -40..+85°C 0..+85°C -40..+85°C 0..+85°C
Boot Modes QSPI | SD Card | eMMC QSPI | SD Card | eMMC
Product Status Mass Production Mass Production
Estimated Product Lifetime*3 2030+ 2030+
Preferred Configuration | MOQ*4 Yes Yes Yes No | 50 Yes Yes No | 30 Yes No | 30 No | 20
ME-XU5-2CG- ME-XU5-2EG- ME-XU5-3EG- ME-XU5-4CG- ME-XU5-4EV- ME-XU5-4EV- ME-XU5-5EV- ME-XU5-5EV- ME-XU5-5EV- ME-XU5-5EV-
Module Order Code
1E-D10H 1I-D11E 2I-D11E 1E-D11E-G1 1I-D11E 1I-D11E-G1 1E-D11E 2I-D12E 2I-D12E-G1 3E-D13E

s s
te price te price
Budgetary Price 1+ (EUR)
Budgetary Price 30+ (EUR)
to-da to-da
for up- for up-
tra.com tra.com
Budgetary Price 100+ (EUR)
s s
Budgetary Price 1000+ (EUR)
c k w w w.enclu c k w w w.enclu
Budgetary Price 10000+ (EUR) Che Che
* Notes
1. We are actively looking for interested customers in this or a similar module. Please contact us with your detailed requirements. General notes
2. The module is also available in different speed and temperature grades. Visit the product web page for more information. • Not all features are available simultaneously. Please check the documentation to know the applicable constraints.
3. Please contact us about production data backup and module production license options. • All specifications and release dates are subject to change without notice. Please verify component specifications with vendors' datasheets.
4. For non-preferred configurations, the minimum order quantity (MOQ) only applies if the modules are not in stock – contact us for more details. • Enclustra maintains an errata and revision history document for each product. Please also check the errata of the FPGA device and other components.
5. Check out our FPGA Manager IP solution for simple data streaming into Windows/Linux embedded/host PCs. • All prices are non-binding estimates – please use the online Enquire/Order form to get definitive pricing and lead-time information.
6. Please ensure that adequate signal integrity is obtained over the full signal path when using MGT's at high performance. • All trademarks are the property of their respective owners. All prices do not include shipping, taxes and duties.
36 37
Mercury SoC Modules Selection Guide Zynq UltraScale+ modules

Valid as of 25th February 2020 Mercury+™ XU7 Mercury+™ XU8


FPGA Family Zynq® UltraScale+™ Zynq® UltraScale+™
FPGA Device Name ZU6EG ZU9EG ZU15EG ZU4CG ZU5EV ZU7EV
FPGA Speed Grade* 2
1 2 2 1 1 1 2
XCZU6EG- XCZU9EG- XCZU15EG- XCZU4CG- XCZU5EV- XCZU7EV- XCZU7EV-
FPGA Part Number*2
1FFVC900I 2FFVC900I 2FFVC900I 1FBVB900E 1FBVB900I 1FBVB900E 2FBVB900I
CPU Cores 4 x ARM® Cortex™-A53 | 2 x Cortex™-R5 2 x A53 | 2 x R5 4 x ARM® Cortex™-A53 | 2 x Cortex™-R5
CPU Frequency @ MHz 1,200 | 500 1,333 | 533 1,200 | 500 1,333 | 533
Mali™ | DisplayPort | PCIe® Gen2 x4 DP | PCIe® Gen2 x4 Mali™ | DisplayPort | PCIe® Gen2 x4
PS Peripherals
SATA | SGMII | CAN SATA | SGMII | CAN SATA | SGMII | CAN
PS Ethernet | USB 2 x 1 Gbps | 2 x USB 3.0 2 x 1 Gbps | 2 x USB 3.0
PS SDRAM Size (MByte) 2,048 + ECC 4,096 + ECC 2,048 + ECC 4,096 + ECC 2,048 + ECC 4,096 + ECC
PS SDRAM Type | Bandwidth (MByte/s) DDR4 | 19,200 DDR4 | 19,200
PL System Logic Cells 469’446 599’550 746’550 192’150 256’200 504’000
PL Block RAM (kbit) 25’704 32’832 59’040 18’432 23’616 38’880
PL DSP Systolic FIR (GMAC/s) 2’545 3’906 5’468 939 1’610 2’229 2’678
PL MGT Transceivers @ Gbps*6 16 @ 12.5 16 @ 15 16 @ 12.5 16 @ 15
PL Peripherals - PCIe® Gen3 x16 PCIe® Gen3 x16 | H.265 Codec
PL Ethernet | USB*5 - -
PL SDRAM Size (MByte) 1’024 2’048 1’024 2’048 1’024 2’048
PL SDRAM Type | Bandwidth (MByte/s) DDR4 | 9,600 DDR4 | 9,600
Flash Memory 64M QSPI | 16G eMMC 64M QSPI | 16G eMMC
Connector Pins | IO Pins 504 | 236 504 | 236
PL 3.3V | PL 1.8V | PL 1.2V Pins | PS Pins 52 | 50 | 20 | 14 52 | 50 | 20 | 14
Module Dimensions (mm) 74 x 54 74 x 54
Temperature Range*2 -40..+85°C 0..+85°C -40..+85°C 0..+85°C -40..+85°C
Boot Modes QSPI | SD Card | eMMC QSPI | SD Card | eMMC
Product Status Mass Production Mass Production
Estimated Product Lifetime*3 2030+ 2030+
Preferred Configuration | MOQ* 4
Yes No | 20 Yes Yes No | 20 No | 20 Yes
ME-XU7-6EG- ME-XU7-9EG- ME-XU7-15EG- ME-XU8-4CG- ME-XU8-5EV- ME-XU8-7EV- ME-XU8-7EV-
Module Order Code
1I-D11E 2I-D12E 2I-D12E 1E-D11E 1I-D12E 1E-D11E 2I-D12E
Budgetary Price 1+ (EUR)
s s
Budgetary Price 30+ (EUR)
to-da te price to-da te price
for up- for up-
tra.com tra.com
Budgetary Price 100+ (EUR)
s s
Budgetary Price 1000+ (EUR)
c k w w w.enclu c k w w w.enclu
Budgetary Price 10000+ (EUR) Che Che
* Notes
1. We are actively looking for interested customers in this or a similar module. Please contact us with your detailed requirements. General notes
2. The module is also available in different speed and temperature grades. Visit the product web page for more information. • Not all features are available simultaneously. Please check the documentation to know the applicable constraints.
3. Please contact us about production data backup and module production license options. • All specifications and release dates are subject to change without notice. Please verify component specifications with vendors' datasheets.
4. For non-preferred configurations, the minimum order quantity (MOQ) only applies if the modules are not in stock – contact us for more details. • Enclustra maintains an errata and revision history document for each product. Please also check the errata of the FPGA device and other components.
5. Check out our FPGA Manager IP solution for simple data streaming into Windows/Linux embedded/host PCs. • All prices are non-binding estimates – please use the online Enquire/Order form to get definitive pricing and lead-time information.
6. Please ensure that adequate signal integrity is obtained over the full signal path when using MGT's at high performance. • All trademarks are the property of their respective owners. All prices do not include shipping, taxes and duties.
38 39
Mercury SoC Modules Selection Guide Zynq UltraScale+ modules

Valid as of 25th February 2020 Mercury+™ XU9 Mercury+™ XU6


FPGA Family Zynq® UltraScale+™ Zynq® UltraScale+™
FPGA Device Name ZU4CG ZU5EV ZU7EV ZU2CG ZU2EG ZU3EG ZU4CG ZU4EV ZU5EV
FPGA Speed Grade* 2
1 1 2 1 1 2 1 1 2
XCZU4CG- XCZU5EV- XCZU7EV- XCZU2CG- XCZU2EG- XCZU3EG- XCZU4CG- XCZU4EV- XCZU5EV-
FPGA Part Number*2
1FBVB900E 1FBVB900I 2FBVB900I 1SFVC784E 1SFVC784I 2SFVC784I 1SFVC784E 1SFVC784I 2SFVC784I
CPU Cores 2 x A53 | 2 x R5 4 x ARM® Cortex™-A53 | 2 x Cortex™-R5 2 x A53 | 2 x R5 4 x ARM® Cortex™-A53 | 2 x Cortex™-R5 2 x A53 | 2 x R5 4 x ARM® Cortex™-A53 | 2 x Cortex™-R5
CPU Frequency @ MHz 1,200 | 500 1,333 | 533 1,200 | 500 1,333 | 533 1,200 | 500 1,333 | 533
DP | PCIe® Gen2 x4 Mali™ | DisplayPort | PCIe® Gen2 x4 DP | PCIe® Gen2 x4 Mali™ | DisplayPort | PCIe® Gen2 x4 DP | PCIe® Gen2 x4 Mali™ | DisplayPort | PCIe® Gen2 x4
PS Peripherals
SATA | SGMII | CAN SATA | SGMII | CAN SATA | SGMII | CAN SATA | SGMII | CAN SATA | SGMII | CAN SATA | SGMII | CAN
PS Ethernet | USB 2 x 1 Gbps | 2 x USB 3.0 1 Gbps | USB 3.0
PS SDRAM Size (MByte) 2,048 + ECC 4,096 + ECC 1024 8,192 + ECC 2048 4096 4,096 + ECC
PS SDRAM Type | Bandwidth (MByte/s) DDR4 | 19,200 DDR4 | 9,600 DDR4 | 19,200
PL System Logic Cells 192’150 256’200 504’000 103320 154350 192150 256200
PL Block RAM (kbit) 18’432 23’616 38’880 5400 7776 18432 23616
PL DSP Systolic FIR (GMAC/s) 939 1’610 2’678 310 558 939 1934
PL MGT Transceivers @ Gbps*6 16 @ 12.5 16 @ 15 - 4 @ 12.5
PL Peripherals PCIe® Gen3 x16 PCIe® Gen3 x16 | H.265 Codec - PCIe® Gen3 x4 PCIe® Gen3 x4 | H.265 Codec
PL Ethernet | USB* 5
- -
PL SDRAM Size (MByte) 2’048 -
PL SDRAM Type | Bandwidth (MByte/s) DDR4 | 19,200 -
Flash Memory 64M QSPI | 16G eMMC 64M QSPI | 16G eMMC
Connector Pins | IO Pins 504 | 192 504 | 274 504 | 294
PL 3.3V | PL 1.8V | PL 1.2V Pins | PS Pins 52 | - | 26 | 14 96 | 144 | - | 14
Module Dimensions (mm) 74 x 54 65 x 54
Temperature Range*2 0..+85°C -40..+85°C 0..+85°C -40..+85°C 0..+85°C -40..+85°C
Boot Modes QSPI | SD Card | eMMC QSPI | SD Card | eMMC
Product Status Mass Production Preliminary
Estimated Product Lifetime*3 2030+ 2030+
Preferred Configuration | MOQ* 4
No | 30 No | 20 Yes TBD
ME-XU9-4CG- ME-XU9-5EV- ME-XU9-7EV- ME-XU6-2CG- ME-XU6-2EG- ME-XU6-3EG- ME-XU6-4CG- ME-XU6-4EV- ME-XU6-5EV-
Module Order Code
1E-D11E 1I-D12E-L11 2I-D12E-L11 1E-D10H 1I-D13E 2I-D11 1E-D12 1I-D12 2I-D12E
Budgetary Price 1+ (EUR)
s s
Budgetary Price 30+ (EUR)
to-da te price to-da te price
for up- for up-
tra.com tra.com
Budgetary Price 100+ (EUR)
s s
Budgetary Price 1000+ (EUR)
c k w w w.enclu c k w w w.enclu
Budgetary Price 10000+ (EUR) Che Che
* Notes
1. We are actively looking for interested customers in this or a similar module. Please contact us with your detailed requirements. General notes
2. The module is also available in different speed and temperature grades. Visit the product web page for more information. • Not all features are available simultaneously. Please check the documentation to know the applicable constraints.
3. Please contact us about production data backup and module production license options. • All specifications and release dates are subject to change without notice. Please verify component specifications with vendors' datasheets.
4. For non-preferred configurations, the minimum order quantity (MOQ) only applies if the modules are not in stock – contact us for more details. • Enclustra maintains an errata and revision history document for each product. Please also check the errata of the FPGA device and other components.
5. Check out our FPGA Manager IP solution for simple data streaming into Windows/Linux embedded/host PCs. • All prices are non-binding estimates – please use the online Enquire/Order form to get definitive pricing and lead-time information.
6. Please ensure that adequate signal integrity is obtained over the full signal path when using MGT's at high performance. • All trademarks are the property of their respective owners. All prices do not include shipping, taxes and duties.
40 41
Mercury and Mars SoC Modules Selection Guide Cyclone V SoC modules

Valid as of 25th February 2020 Mercury™ SA1 Mercury+™ SA2 Mars™ MA3

FPGA Family Cyclone® V SX Cyclone® V ST Cyclone® V SE Cyclone® V SX


FPGA Device Name C6 D6 A5 C6
FPGA Speed Grade* 2 7 7 7 7
5CSXFC6C6 5CSTFD6D5 5CSEBA5 5CSXFC6C6
FPGA Part Number* 2
U23I7N F31I7N U23C8N U23I7N
CPU Cores 2 x ARM® Cortex™-A9 2 x ARM® Cortex™-A9 2 x ARM® Cortex™-A9
CPU Frequency @ MHz 800 800 600 800
HPS Cores & Peripherals 2 x CAN 2 x CAN 2 x CAN
HPS Ethernet | USB 1 Gbps | USB 2.0 OTG 1 Gbps | USB 2.0 1 Gbps | USB 2.0 OTG
HPS SDRAM Size (MByte) 1,024 2,048 1,024
HPS SDRAM Type | Bandwidth (MByte/s) DDR3L | 3,200 DDR3L | 3,200 DDR3L | 3,200
FPGA System Logic Elements 110’000 110’000 85’000 110’000
FPGA Block RAM (kbit) 5’570 5’570 3’970 5’570
FPGA DSP Systolic FIR (MMAC/s) 112 112 70 112
FPGA MGT Transceivers @ Gbps* 6 6 @ 3.125 9 @ 6.144 - 2 @ 3.125
FPGA Peripherals PCIe® Gen1 x4 PCIe® Gen2 x4 - PCIe® Gen1 x2
FPGA Ethernet | USB*5 - 2 x 100 Mbps | Cypress FX3™ USB 3.0 1 Gbps + 100 Mbps
FPGA SDRAM Size (MByte) - - -
FPGA SDRAM Type | Bandwidth (MByte/s) - - -
Flash Memory 64M QSPI | 16G eMMC 64M QSPI | 16G eMMC 64M QSPI | 16G eMMC
Connector Pins | IO Pins 336 | 178 504 | 294 200 | 96 200 | 104
FPGA 3.3V | FPGA 1.8V Pins | HPS Pins 134 | - | 16 234 | - | 18 80 | - | 16 76 | - | 16
Module Dimensions (mm) 56 x 54 74 x 54 67.6 x 30
Temperature Range*2 -40..+85°C -40..+85°C 0..+70°C -40..+85°C
Boot Modes QSPI | SD Card | eMMC QSPI | SD Card | USB3 QSPI | SD Card | eMMC
Product Status Mass Production Mass Production Mass Production
Estimated Product Lifetime*3 2030+ 2030+ 2030+
Preferred Configuration | MOQ* 4 Yes Yes No | 100 Yes
ME-SA2-D6-
Module Order Code ME-SA1-C6-7I-D10 MA-MA3-A5-8C-D10 MA-MA3-C6-7I-D10
7I-D11
s s
te price te price
Budgetary Price 1+ (EUR)

to-da to-da
for up- for up-
Budgetary Price 30+ (EUR)

s tra.com s tra.com
w.enclu w.enclu
Budgetary Price 100+ (EUR)

c k w w c k w w
Che Che
Budgetary Price 1000+ (EUR)
Budgetary Price 10000+ (EUR)

* Notes General notes


1. We are actively looking for interested customers in this or a similar module. Please contact us with your detailed requirements. • Not all features are available simultaneously. Please check the documentation to know the applicable constraints.
2. The module is also available in different speed and temperature grades. Visit the product web page for more information. • All specifications and release dates are subject to change without notice. Please verify component specifications with vendors' datasheets.
3. Please contact us about production data backup and module production license options. • Enclustra maintains an errata and revision history document for each product. Please also check the errata of the FPGA device and other components.
4. For non-preferred configurations, the minimum order quantity (MOQ) only applies if the modules are not in stock – contact us for more details. • All prices are non-binding estimates – please use the online Enquire/Order form to get definitive pricing and lead-time information.
5. Check out our FPGA Manager IP solution for simple data streaming into Windows/Linux embedded/host PCs. • All trademarks are the property of their respective owners. All prices do not include shipping, taxes and duties.
6. Please ensure that adequate signal integrity is obtained over the full signal path when using MGT's at high performance.
42 43
Mercury SoC Modules Selection Guide Cyclone IV & Cyclone V SoC and Arria 10 SoC modules

Valid as of 25th February 2020 Mercury™ CA1 Mercury+™ AA1

FPGA Family Cyclone® IV E Arria® 10


FPGA Device Name 30 75 115 SX 270 SX 270 SX 480 SX 480
FPGA Speed Grade* 2
8 8 7 3 2 1 2
EP4CE30 EP4CE75 EP4CE115 10AS027E4 10AS027E2 10AS048E2 10AS048E3
FPGA Part Number* 2
F23C8N F23C8N F23I7N F29E3SG F29I2SG F29E1HG F29I2SG
CPU Cores - 2 x ARM® Cortex™-A9
CPU Frequency @ MHz - 1’000 1’200 1’500 1’200
HPS Cores & Peripherals - 3 x EMAC
HPS Ethernet | USB - 1 Gbps | USB 2.0
HPS SDRAM Size (MByte) - 2,048 + ECC 4,096 + ECC
HPS SDRAM Type | Bandwidth (MByte/s) - DDR4 | 7,464 DDR4 | 8,532 DDR4 | 9,600 DDR4 | 8,532
FPGA System Logic Elements 28’848 75’408 114’480 270’000 480’000
FPGA Block RAM (kbit) 594 2’745 3’888 15’000 28’620
FPGA DSP Systolic FIR (MMAC/s) 13 40 53 1’228 1’461 2’999 2’408
FPGA MGT Transceivers @ Gbps*6 - 12 @ 10.3125 12 @ 12.5
FPGA Peripherals - PCIe® Gen3 x8
FPGA Ethernet | USB*5 1 Gbps | FTDI USB 2.0 Cypress FX3™ USB 3.0
FPGA SDRAM Size (MByte) 128 256 2,048 + ECC 4,096 + ECC
FPGA SDRAM Type | Bandwidth (MByte/s) DDR2 | 666 DDR4 | 7,464 DDR4 | 8,532 DDR4 | 9,600 DDR4 | 8,532
Flash Memory 16M SPI 64M QSPI | 16G eMMC
Connector Pins | IO Pins 336 | 146 504 | 286
FPGA 3.3V | FPGA 1.8V Pins | HPS Pins 146 | - | - - | 212 | 18
Module Dimensions (mm) 56 x 54 74 x 54
Temperature Range*2 0..+70°C -40..+85°C 0..+85°C -40..+85°C 0..+85°C -40..+85°C
Boot Modes Passive Serial | Active Serial | USB2 QSPI | SD Card | eMMC | USB3
Product Status Mature Mass Production
Estimated Product Lifetime*3 2025+ 2030+
Preferred Configuration | MOQ* 4
No | 80 Yes No | 60 Yes No | 40 No | 30 Yes
ME-CA1-30- ME-CA1-75- ME-CA1-115- ME-AA1-270- ME-AA1-270- ME-AA1-480- ME-AA1-480-
Module Order Code
8C-D7 8C-D7 7I-D8 3E4-D11E 2I2-D11E 1E2-D12E 2I3-D12E
Budgetary Price 1+ (EUR)
s s
to-da te price to-da te price
for up- for up-
Budgetary Price 30+ (EUR)

tra.com tra.com
Budgetary Price 100+ (EUR)
s s
Budgetary Price 1000+ (EUR)
c k w w w.enclu c k w w w.enclu
Budgetary Price 10000+ (EUR) Che Che
* Notes General notes
1. We are actively looking for interested customers in this or a similar module. Please contact us with your detailed requirements. • Not all features are available simultaneously. Please check the documentation to know the applicable constraints.
2. The module is also available in different speed and temperature grades. Visit the product web page for more information. • All specifications and release dates are subject to change without notice. Please verify component specifications with vendors' datasheets.
3. Please contact us about production data backup and module production license options. • Enclustra maintains an errata and revision history document for each product. Please also check the errata of the FPGA device and other components.
4. For non-preferred configurations, the minimum order quantity (MOQ) only applies if the modules are not in stock – contact us for more details. • All prices are non-binding estimates – please use the online Enquire/Order form to get definitive pricing and lead-time information.
5. Check out our FPGA Manager IP solution for simple data streaming into Windows/Linux embedded/host PCs. • All trademarks are the property of their respective owners. All prices do not include shipping, taxes and duties.
6. Please ensure that adequate signal integrity is obtained over the full signal path when using MGT's at high performance.
44 45
MERCURY+ PE1
PCIe® Base Board

ƒ Mercury module connectors


ƒ Low-jitter clock generator
ƒ PCIe ×4 interface
ƒ USB 3.0 device
ƒ Up to 4 × USB 2.0 host
ƒ FTDI USB 2.0 High-speed device controller
ƒ 2 × Gigabit Ethernet
ƒ Up to 2 × FMC LPC/HPC connectors
ƒ mPCIe/mSATA card holder
ƒ microSD card holder
ƒ 12 V single supply
ƒ 160 × 111.2 mm (PCB only)
ƒ Standalone or PCIe operation
ƒ Available in three configurations (PE1-200/300/400)

Mercury+ PE1-300

Power DC Input
Pin Header Pin Header Micro USB
Control Connector

JTAG System Current


eMMC Flash
microSD Connector Monitor Sense
Card Holder
Module Connector C Battery Buttons &
Holder LEDs

USB 3.0 System


Device Controller

FMC HPC
LPC Connector
Module Connector A

Module Connector B

USB 2.0 USB Clock


Host (x4) Hub Generator Pin Headers

Gigabit mSATA/
SMA MGT SIM
Ethernet mPCIe
+ Clocks Card Holder
(x2) Card Holder

46
MERCURY+ PE3
PCIe® Base Board

ƒ Mercury module connectors


ƒ PCIe × 8 interface
ƒ QSFP+ slot, 4 × SFP+ slots
ƒ USB 3.0 host connector
ƒ USB-C 3.0 interface with DisplayPort support
ƒ Samtec FireFly™ connector Rendering

ƒ M.2 SATA/PCIe socket


ƒ 2 × Gigabit Ethernet
ƒ HDMI connector
ƒ FMC HPC connector
ƒ Low-jitter clock generator
ƒ microSD card holder
ƒ FTDI USB 2.0 High-Speed device controller
ƒ System controller with USB JTAG/UART
ƒ Standalone or PCIe operation
ƒ 12 V single supply or USB-C powered
ƒ 171 × 112.4 mm (PCB only)

Mercury+ PE3

JTAG Battery M.2 USB-C 3.0 System DC Input


Connector Holder SATA/PCIe slot (with DisplayPort) Monitor Connector

Power microSD
Control Holder
FMC HPC Connector
System
Micro USB
Controller
8 MGTs
Pin
Module Connector A
Module Connector B

Headers
Clock
4 MGTs Gigabit
HDMI Generator
Ethernet

SFP+ 4 MGTs
8 MGTs
USB 2.0
Slots (x4) Host
MGT
Multiplexers
4 MGTs
QSFP+ Slot 12 MGTs Module Connector C

PCIe ×8 4 MGTs
Firefly (x4)

In development – please contact us for availability. 47


Mercury+ ST1
Mercury Base Board

ƒ Mercury module connectors


ƒ USB 3.0 host connector
ƒ USB 3.0 device connector
ƒ FTDI USB 2.0 High-Speed device controller
ƒ 2 × MIPI D-PHY interfaces (CSI and DSI/CSI)
ƒ 2 × Gigabit Ethernet
ƒ HDMI connector
ƒ Mini DisplayPort connector
ƒ SFP+ connector
ƒ FMC HPC connector Rendering
ƒ Low-jitter clock generator
ƒ microSD card holder
ƒ 2 × 40-pin Anios headers
ƒ 3 × 12-pin I/O connectors
ƒ 12 V single supply
ƒ 100 × 120 mm

Mercury+ ST1

DC Input FTDI USB 2.0 Micro USB 2.0


Connector Device Connector
Controller
Power Gigabit
Gigabit
Supply USB 3.0 Ethernet (x2)
Ethernet
Device
micro SD
I/O Connector
Module Connector A
Module Connector B

Card
Connectors Holder
USB 3.0
Host
Mini I/O
Connector
DisplayPort Connectors
Clock
Anios I/O
Generator
Pin Headers

FMC HPC
Connector Module Connector C

Buttons & MIPI


MIPID-PHY
D-PHY SFP+
Connector HDMI
LEDs Connector Connector
(x2)
(x2)

48 In development – please contact us for availability.


Mars ST3
Mars Base Board

ƒ Mars module connector


ƒ FTDI USB 2.0 High-Speed device controller
ƒ USB 3.0 host connector
ƒ HDMI connector
ƒ Mini DisplayPort connector
ƒ MIPI D-PHY connector (CSI)
ƒ Gigabit Ethernet
ƒ 2 × 40-pin Anios headers
ƒ Pmod I/O headers
ƒ microSD card slot
ƒ 12 V single supply
ƒ 80 × 100 mm

Mars ST3

Micro USB 2.0


Connector
Mini USB 3.0 Gigabit
MIPI D-PHY HDMI
DisplayPort Host Ethernet FTDI USB 2.0
Connector Connector
Connector Connector Connector Device Controller

26 I/Os Anios I/O


Anios I/O 26 I/Os 200-pin Mars Module SO-DIMM Connector Pin Header
Pin Header
12 I/Os Pmod I/O
User LEDs Power Supply Pin Header
Micro SD User
Card Holder Oscillator JTAG FPGA JTAG
(optional) Fan Power Connector
Connector Connector

49
MARS EB1
Mars Base Board

ƒ Mars module connector


ƒ FTDI USB 2.0 High-Speed device
ƒ 2 × Mini Camera Link
ƒ HDMI 1.3 connector
ƒ Micro USB 2.0 device
ƒ microSD card slot
ƒ 42 user I/O pins
ƒ 40-pin Anios headers
ƒ 2 user buttons, 1 user LED
ƒ 12 V single supply
ƒ 120 × 80 mm

Mars EB1

DC Input HDMI Mini Camera Mini Camera Gigabit Ethernet USB 2.0
Micro USB
Connectors Connector Link Connector Link Connector Connector Host Connector

Power
Control

Buttons & microSD


LEDs System Card Holder
Controller

System
200-pin Mars Module SO-DIMM Connector Micro USB
Monitor

Anios™ I/O Pmod™ I/O JTAG


Pin Header Pin Headers Connector

50
MARS PM3
Mars Base Board

ƒ Mars module connector


ƒ FMC LPC connector
ƒ M ini HDMI connector
ƒ Cypress FX3 USB 3.0 device controller
ƒ U SB 2.0 UART
ƒ G igabit Ethernet
ƒ m icroSD card holder
ƒ 1 2 V single supply
ƒ p -ITX format (100 × 72 mm)

Mars PM3

USB 3.0 B USB 2.0 Micro-B


Connector (Device) Connector (Device)
USB 3.0 USB 2.0
USB 2.0 HDMI
JTAG RJ45 GigE
FX3 GPIO Cypress FX3 USB 3.0 USB 2.0 Connector Connector
Connector
Connector Device Controller UART Controller (Host) (LVDS/PCIe)
16/32-bit UART USB MDI 4 +1 pairs
FPGA JTAG JTAG
36 pairs FMC LPC
Connector 200-pin Mars Module SO-DIMM Connector
Connector

Bottons & System Extension


Power Supply
LEDs Monitor 24 I/Os Connector

User Fan Power


EEPROM Connector Connectors

51
 Linux Bu il d E nvir o n m e n t

A huge logo, for a tool that saves a huge amount of time.

Our Linux Build Environment is a free tool which users can use to build
their own Linux for Enclustra modules – at the push of a button.

Select a target module and base board, let the tool do its thing, and
all required binaries, such as the FPGA bitstream and boot loader, will be
downloaded. It also downloads and compiles software such as
U-Boot, Linux, and the BusyBox based root file system. Find out more
via our website.

FPGA SOLUTION Center


52
»  M o d u l e Co n f ig u ra t i o n To o l ki t

An application
The Module Configuration Tool (MCT) is a free application which allows
the user to configure our modules and base boards via USB, without
additional hardware. No break-out boxes, no funky connectors – all you
need is a USB cable.

A library
The library used by the MCT, MctLib, is also available free of charge in
binary form; it allows users to integrate module enumeration, FPGA and
SPI flash configuration, and I2C communication functionality in their
own applications.

MctLib is available for both Windows and Linux, and consists of a


flexible library with a C-style interface, allowing use of the library from
almost any programming language. For C++ applications, a C++ wrapper
is also provided for ease of use.

A flexible codebase
If you’d like to integrate or customize the Module Configuration Tool
to your needs, we also offer a source code license for both the GUI and
the MctLib library. Contact us for more information.

FPGA SOLUTION Center


53
»   D esig n S u p po r t

In order to make integrating our products to customer designs


as easy as possible, we provide a number of design support files to make
the process as painless as possible.

3D Models
For all of our modules and base boards, 3D models are available
to aid in the design of compatible custom hardware and enclosures.

User Manuals
Everything you always wanted to know about a module, but were afraid
to ask: an A-Z of a module’s hardware, features, and configuration options.

User Schematics
How the components on our hardware talk to each other.

Reference designs
Our reference designs are lovingly created to get your design off the ground
quickly, in both HDL and software.

Master Pinouts
Check the pinout of a module or base board, and compare it with other
pin-compatible modules, even future modules that haven’t been released yet.

Net Length Tables


High-speed design is tricky; net length tables give you exactly what you
need to best plan for signal routing and integrity.

Online Support
For anything that isn’t covered in the information above, our support staff
are always on hand to help, even before purchase.

FPGA Solution Center


54
» Ou r I P S o l u ti o n s

We offer a range of flexible IP solutions, covering a


range of applications areas; here are a couple
of things worth knowing:

They’re royalty free


After you purchase an IP license, that’s it; no recurring fees, no royalties,
nada. The IP can be used perpetually, according to the license terms.

We offer different license models


The license itself can also be tailored to your requirements. We offer project
and site-based licenses.

Evaluation is also free


You can evaluate our IP solutions, with full functionality, before committing
to buy. Just drop us a mail.

We keep you up to date


We offer maintenance agreements for our IP solutions to keep you provided
with updates, enhancements and new device support. Maintenance for the
first year is included in the license fee.

55
v

UNIVERSAL DRIVE CONTROLLER


IP Solution

High-performance FPGA/SoC motion control – without writing a line of VHDL.

A highly optimized IP solution, featuring implementations of commonly-used motor control


algorithms for position, velocity and current control, as well as all required interfaces to
the power electronics. A simple and portable C programming API allows easy access to all
features from software.

Drive Hardware
Universal Drive Controller IP Core

Encorder | Resolver
Interface

AXI
Device Driver 1 DC ENC
Interface

Controller
Device Driver 2 BLDC RES
Core

Event
Device Driver 3 Stepper
Handler

D
ADC Interface
A

Features and benefits Integration and ease of use


ƒ Control up to 8 motors simultaneously ƒ C programming API to access all features
ƒ Control loop update rates of up to 200kHz ƒ Full integration with Intel® and Xilinx® tools
ƒ Fully autonomous event handling ƒ Reference designs available for all motor types
ƒ Supports BLDC, DC and stepper motors
ƒ Features field-oriented control for BLDC motors Evaluation
ƒ A free IP evaluation license including reference
Flexibility is key design and example application is available
ƒ Full support for custom circuits for current, ƒ Start with a spinning motor using a quick-start
position and velocity measurement kit including an SoC module, base board, power
ƒ Specify which controls loops are autonomous electronics and motor. For more information
and which are implemented in software see next page.

56
UNIVERSAL DRIVE CONTROLLER
Evaluation Kit

Get started with the Universal Drive Controller, right out of the box.

The Universal Drive Controller Evaluation Kit provides an out-of-the box hardware platform
with reference design to both speed your development time and enhance your productivity.
Xilinx Kit
Intel Kit

The kit contains:


ƒ Universal Drive Controller Evaluation License, ƒ FMC-DR2 drive control card
with support for up to 2 DC, BLDC or stepper motors ƒ BLDC (Maxon), DC or stepper motor
ƒ Intel: Mercury SA1 SoC module & Mercury+ PE1-200 base board ƒ Reference design
ƒ Xilinx: Mars ZX3 SoC module & Mars PM3 base board ƒ 2 hours of support

57
FPGA MANAGER
IP Solution

One tool for all FPGA communications.

Transparently stream up to 16 data streams from FPGA


to host, and vice versa, without needing to know
the underlying protocols. PCIe® (Gen1-3, ×1-×8), USB 2.0,
USB 3.0, and 10/100/1000 Mbps Ethernet links –
all with one single API. Also supported are FPGA-in-the-
loop applications, and memory-mapped access. Matlab ®

FPGA Manager™

Host/Embedded PC FPGA

PCIe

User –or–
Application FPGA FPGA
Manager Ethernet Manager
User Logic
C | C++, Library IP Core
C# | .NET and (DLL/SO)
–or–
MATLAB®
USB 2.0 / 3.0

Software library Base license


ƒ Simple API with intuitive read/write functions ƒ PCIe, USB 3.0, USB 2.0 or Gigabit Ethernet
ƒ C | C++ | C# .NET Core and MATLAB ƒ 2 streams
ƒ Supports Windows and Linux ƒ C | C++ and C# | .NET
ƒ Windows or Linux
FPGA IP core
ƒ Supports standard bus interfaces Evaluation
ƒ Integrates into FPGA vendor tools for simple drag ƒ Quick Start Kits, including support,
and drop instantiation are available
ƒ Also available as a software implementation
for PCs (FPGA modelling) or SoC FPGAs
(co-processing)

58
FPGA MANAGER
Evaluation Kit

Get started with the FPGA Manager, right out of the box.

The FPGA Manager™ Evaluation Kit provides a full featured design platform to build
communication centric applications for PCIe®, Ethernet and USB 3.0. The kit provides an out-
of-the box hardware platform with reference design to both speed your development
time and enhance your productivity. It contains following components.

The kit contains:


ƒ FPGA Manager IP Solution, Evaluation License ƒ Mercury+ PE1-200 base board
ƒ Reference design ƒ Power supply
ƒ Mercury KX1 FPGA module ƒ 2 hours support included

59
STREAM BUFFER CONTROLLER
IP Core

Large, multi-stream FIFO handling.

A versatile IP core that implements a stream to memory mapped DMA bridge with up to
16 independent streams. The IP core allows data buffering in an external memory device to
provide virtual FIFO capability, with up to 4 GB of memory. A simple C programming API is
provided, as is the option to easily integrate with FPGA Manager™.

Stream Buffer Controller IP Core

Host/Embedded PC

Data Sources
CPU AXI | Avalon Interconnect

Config

Status | IRQ Stream Buffer


Controller
External Memory Data IP Core
Memory Controller

Data Sinks

Features and benefits Evaluation


ƒ Standalone solution A CPU can be easily replaced ƒ FIFO mode Writes and reads are done over the
by a stream configuration controller that is AXI4-Stream interfaces
provided in VHDL ƒ Write mode Writes are done over the AXI4-Stream,
ƒ Flexible data width conversion Conversion reads are done by a CPU
to/from any byte-multiple width for the write and ƒ Read mode Writes are done by a CPU, reads are
read data streams done over the AXI4-Stream interface
ƒ Highly configurable Operation mode, buffer ƒ ROM mode Reads are done over the AXI4-Stream
size and buffer address can be set independently interface (the memory must be initially written
for each stream by a CPU)
ƒ Vendor independent The core is optimized for
use in current Xilinx® FPGA architectures. Xilinx
Vivado IPI components are also provided.

60
DISPLAY CONTROLLER
IP Core

Low-resource display control, with support for different display interfaces.

The Display Controller IP Core enables the easy addition of a display to existing or future FPGA
designs, allowing the system designer to focus on the main application instead of dealing
with display control issues. In addition, there is no need for an external display controller
device that would consume precious PCB space and unnecessarily extend the project’s BOM.

With its modular design and strong scalability, the Display Controller IP Core perfectly fits
the system requirements without wasting any FPGA resources. These unique features will also
simplify the reuse of the Display Controller IP Core in future projects. Selecting our Display
Controller IP Core for the display control needs of present or future projects will significantly
reduce time to market as well as the overall system cost.

Display Controller IP Core

FPGA/SoC Device

I2C Touch
CPU
Controller
AXI | Avalon Bus

Display
Hardware
Config
LVDS | HDMI |
External Memory 2D Data Display Parallel
Memory Controller Controller
Video Data IP Core

Features and benefits


ƒ Support for parallel, LVDS and HDMI/DVI displays without external display controller device
ƒ Support for unlimited video pages
ƒ Built-in PWM generator for display brightness control
ƒ Optional 2D accelerator unit (draw/copy rectangles, supports transparent color)
ƒ AXI bus interface for both register bank and frame buffer memory access
ƒ Linux driver

61
UDP/IP ETHERNET
IP Core

Simple Ethernet communication, without a CPU.

A highly configurable IP core, optimized for use in current Xilinx® FPGA architectures. It
provides an easy-to-use interface to the user logic, and supports the common media
independent interfaces MII, RMII, GMII, RGMII and SGMII. With its 8-bit wide transmit and
receive interfaces running at 125 MHz, the IP core is able to operate at full 1 Gbit/sec wire
speed. 100 Mbit/sec and 10 Mbit/sec operation is also supported.

UDP/IP Ethernet IP Core

FPGA Device

Clock / Reset

Tx Data Interface

Tx Header Interface
User Logic Ethernet
Rx Data Interface
UDP/IP Ethernet MII Phy
IP Core RMII
Configuration Interface GMII
RGMII
SGMII

Features and benefits


ƒ Operates at full 1 GBit/sec wire speed ƒ Destination UDP port, destination IP address
ƒ Complete UDP, IPv4 and Ethernet layer processing and destination MAC address filtering
ƒ Automatic ARP reply generation ƒ UDP checksum calculation and check
ƒ Header pass-through mode ƒ Ethernet frame check
ƒ 1 Gbit/sec, 100 Mbit/sec and 10 Mbit/sec ƒ Multiple UDP ports with dedicated receive
operation and transmit interfaces for each port
ƒ MII, RMII, GMII, RGMII and SGMII media indepen- ƒ Optional receive data buffers
dent interfaces (full-duplex only) ƒ Raw Ethernet port for non-UDP communication

62
» Fu r ther I n fo rm a t i o n

Pricing
Pricing is shown for specific module configurations and quantities – for a
complete list of module configurations, and volume pricing for quantities
of 1+, 30+, 100+, 300+, 1000+, 3000+ and 10000+, visit www.enclustra.com

Custom configurations
All hardware products can be tailored to specific applications in
custom configurations (different FPGA part numbers, different memory
sizes, etc.).

Custom hardware design


We often work together with customers to develop a brand new,
application-specific hardware product. This can be a module, base
board, or entire system; development costs and production rights
may be shared, leaving both parties to benefit.

FAQ
More information and frequently asked questions can be found at
www.enclustra.com/faq

Disclaimer
All prices are non-binding estimates – please contact us for definitive
pricing and lead-time information. Information contained in this flyer is
correct as of 25th Februar 2020, but is subject to change without notice.
Trademarks used are property of their respective owners.

63
Catalogue Spring 2020

Development and Design Services

FPGA DESIGN Center


A b o u t E ncl u s t r a

The company was founded in 2004 by We currently have more than 50 people in
Martin Heimlicher, with the aim of our team, of 15 different nationalities, and
providing comprehensive FPGA solutions, we’re growing.
from design through to production.

Our headquarters are located in the thriving In addition to our main office, we have a
Binz quarter in Zürich, Switzerland – an subsidiary in China and sales and support
ideal location in one of the world’s leading offices in Germany, France, USA and Canada.
cities for technology and innovation.

Demand for our design services, FPGA modules and base


boards is growing – our current customer base stands at
over 1200 customers in over 50 countries, and continues
to expand.

2
W H A T

W E

O F F E R

Everything from the drawing board. Everything off-the-shelf.

FPGA Design Center FPGA Solution Center


Our design center offers design and We develop and sell our own FPGA and
support in all areas of FPGA-based system system-on-chip modules, based on Xilinx®
development, in a wide number of and Intel® devices, for our customers to
applications. integrate into their own systems.

High-speed hardware, HDL firmware, 20 different modules, in 2 different families,


embedded software, real-time operating compatible with 4 different base boards
systems – our expertise covers every stage – the diversity of our products allows the
of the design process, from specification up customer to select exactly the features and
to industrialization and manufacturing. they need, down to a fine grain.

We deploy leading edge technologies, and we’re design service partners of Intel®, Xilinx®,
Lattice® and Microsemi® – this close communication allows us to be forward-looking in our
design process, and remain on the cutting edge of the most advanced FPGA technology.

LEADER
Lattice Exclusive Alliance of

CERTIFIED MEMBER — BASE


Design Engineering Resources
a company 3
» Our Co re Co mp e te n c i e s

FPGA HDL Development


• Systems at the technical limits (complexity, bandwidth,
processing power, latency)
• Integration of microcontrollers and peripherals
• Thorough verification and continuous integration
• HLS or HDL design entry

FPGA Hardware Development


• Multi-layer PCB design
• Multi-gigabit serial links
• High-speed data converters
• RF front ends

Digital Signal Processing


• Bit-true MATLAB®/Simulink® to VHDL conversion
• Resource-optimized implementation
• Software defined radio (channel filtering, sample rate
conversion, modulation/demodulation, etc.)

Software Development
• Embedded software for SoC and soft core processors
• Real-time control loops
• Linux BSPs and device drivers
• Host computer software as user interface to FPGA-based systems

FPGA DESIGN Center


4
»  M a in A p p l ica tio n A r e a s

We carry out customer projects in a wide array of application


fields – below are some of the areas we’re particularly
experienced in.

Wired Networks and Switching (Ethernet)

Industrial Communication (CAN)

Wireless Communication (Software Defined Radio)

Embedded Interfaces (PCIe, USB, AXI, etc.)

Drive and Motion Control

Computer Vision and Smart Cameras

Test and Measurement / Data Acquisition

Waveform Synthesis

FPGA DESIGN Center


5
» Digita l S ig n a l Pro ce s s i n g
Manual, bit-true HDL implementation.

Do you have a MATLAB® implementation of a signal processing algorithm and need a best
performance, lowest resource usage and lowest power FPGA implementation? Our engineering
team has successfully completed a significant number of such projects with the help of our
fixed-point arithmetics library.

Our cl_fix library implements basic to medium-complexity fixed-point arithmetic functions


in MATLAB and VHDL. The implementations of the same function in MATLAB and VHDL show
exactly the same, bit-accurate behavior. The functions operate on the native data types of
the individual languages; i.e. double for MATLAB and std_logic_vector for VHDL, and are thus
easy to use. The bit-true behavior is enabled by associating a fixed-point format to every
operand and result.

We take care of the algorithm’s FPGA-optimization, and work with you to ensure that
the FPGA-optimized MATLAB algorithm still meets your requirements. After that, it’s a
straightforward path to a bit-true FPGA implementation, without any lengthy and costly
iterations back through the algorithm design and optimization phases.

Model-based design and automated HDL code generation.

If traceability or time to market is the main concern for the FPGA implementation of your
MATLAB/Simulink® signal processing algorithm, model-based design and automated HDL
code generation might also be a useful option.

We’re a member of MathWorks’ partner program, and our engineering team has the relevant
expertise to efficiently employ automated code generation tools like MathWorks® HDL
Coder™, Xilinx® System Generator (Simulink) and alike.

As an additional benefit, your application specialists – who not necessarily are FPGA experts –
are able to develop your FPGA’s signal processing units in their known environment and
programming language, while we take care of the communication infrastructure and interfaces.

FPGA DESIGN Center


6
Example project #1

» Pe rspective T h ro u g h Ste r eo

Abstract What was once only possible in crime series is now a reality (get your CSI
Miami one-liners at the ready): 3D scans of forensic evidence found at
crime scenes, recording minute details to be later analyzed from all angles.

One of the main elements of the system is an Enclustra-developed


platform which enables the projection of interference patterns and
simultaneous recording of stereo video: a compact, cost-effective Mars
AX3 module captures the images via two cameras connected to the new
Mars EB1 base board via Camera Link. The FPGA firmware running on
the Mars AX3 then streams the data to a host PC via Enclustra’s FPGA
Manager Ethernet IP solution.

The development took place as part of the 3D-Forensics project funded


by the EU’s Seventh Framework Programme for Research (FP7).

Employed Technologies Xilinx® Artix™-7 | DDR3 SDRAM | Camera Link | Gigabit Ethernet |
Xilinx MicroBlaze™ | VHDL | C | C#

Involved Enclustra Services FPGA System Design | FPGA Hardware | FPGA HDL | Embedded Software |
Host Computer Software

Involved Enclustra Products Mars AX3 | Mars EB1 | FPGA Manager™ Ethernet

FPGA DESIGN Center


7
Example project #2

» F PGA to S a tel l ite: P l e a s e Re s p o n d

Abstract A reliable data connection between satellite and ground station is


essential to the success of any satellite mission – to this end, we recently
implemented a system for a customer based on our Mercury KX1 module
and using Enclustra's FPGA Manager™ PCI Express IP solution.

The Mercury KX1, mounted on custom PCIe®-capable base board we also


developed for the application, acts as the main communication
controller for a test system that is used to verify the communication
between individual satellite components as well as the communication
between the satellite and the ground station.

The host computer software, providing a GUI for setting up, running
and analyzing communication tests, was also developed by our engineering
team.

Employed Technologies Xilinx® Kintex®-7 | WizardLink | VHDL | C# | C++

Involved Enclustra Services FPGA System Design | FPGA Hardware | FPGA HDL | Host Computer
Software

Involved Enclustra Products Mercury KX1 | FPGA Manager PCIe®

FPGA DESIGN Center


8
Example project #3

» Zynq Ult ra S ca l e+ D ro n e Co n t r o l l e r

Abstract The official term is unmanned aerial vehicle (UAV), apparently, which is
a bit of a mouthful, so we prefer to say drone. In any case, we developed a
controller for a UAV (drone) for a customer using a Xilinx Zynq UltraScale+
MPSoC, whose CPUs implement the position control as well as tracking of
the flight trajectory.

The sensors and actors are attached through the FPGA logic; the number
and type of these interfaces vary greatly with the type of controlled vehicle,
so all of these interfaces are dynamically configurable.

The controller also supports redundancy, by having two parallel flight


calculator units supervising each other. Should the currently active
calculator fail, the reserve unit takes over all tasks autonomously. Aside
flight control functions, the controller prepares and compresses a Full-HD
video signal (HD-SDI) from a camera for transmission over radio.

Employed Technologies Xilinx® Zynq® UltraScale+® | Mentor Graphics PADS® | HD-SDI | VHDL |
C | C++

Involved Enclustra Services FPGA System Design | FPGA Hardware | FPGA HDL | Embedded Software

FPGA DESIGN Center


9
Example project #4

» PCI Ex p res s to W ish bo n e B r i d ge

Abstract We were asked to migrate the SPI slave interfaces of an existing FPGA
design to PCIe® interfaces providing massively more bandwidth, while
maintaining the FPGA-internal Wishbone communication infrastructure and
as much as possible of the embedded software controlling the SPI masters.

Subsequently, we replaced the SPI slave interfaces with a multi-function


PCIe endpoint with attached Wishbone masters and mapped the new FPGA
design to an Intel® Cyclone® V GX device. In addition to the Wishbone
masters, a sophisticated DMA engine, which takes care of the higher-band-
with data transfers, was developed. On the embedded software side, the
low-level SPI driver was replaced by a tailored PCIe driver, emulating the
same behavior.

This development provides our customer with a smooth transition to the


latest FPGA technology and delivers the performance required for their
next-generation systems.

Employed Technologies Intel® Cyclone® V | PCI Express | Wishbone | DMA | VHDL

Involved Enclustra Services FPGA System Design | FPGA HDL | Embedded Software

FPGA DESIGN Center


10
Example project #5

» Signal G enera to r A fte r bur n e r

Abstract For a measurement device producer, we developed an extremely flexible


signal generator during a previous project. After seeing the power and
possibilities offered by FPGA technology, the customer came to us with
further ideas to make the generator even more adaptable.

The features to be added to the existing system are best described by


complex cyclical signal repetition and measurement of the wobble
frequency of the generated signals.

Thanks to the modular VHDL code and the already existing unit and
top-level regression tests, it was fairly simple to integrate the additional
functionality and deliver a reliable system with stunning new features.

Employed Technologies Intel® Cyclone® III | DDR SDRAM | SRAM | VHDL

Involved Enclustra Services FPGA System Design | FPGA HDL

FPGA DESIGN Center


11
Example project #6

» CP LD Rep l a ces D iscon t i n ue d I C

Abstract What to do when a chip you’re using is discontinued and you don’t want to
change your PCB layout? This tricky question is one that one of our customers
came to us with, for a keypad encoder system.

Luckily, the chip housing was the “outdated” dual in-line (DIL) package – this
allowed us to use a CPLD in a compact ball grid array package to reproduce
the same functionality, and then pack it into the same DIL form factor.

A small PCB accommodates the CPLD and DIL pin headers, and then slots
seamlessly into the mainboard – without any PCB layout changes.

Employed Technologies Intel® MAX® V | VHDL

Involved Enclustra Services FPGA System Design | FPGA Hardware | FPGA HDL

FPGA DESIGN Center


12
Example project #7

» N e u ra l N etwo rk o n SO M

Abstract FPGA technology is becoming a major player in the field of embedded AI


applications due to their ability to implement complex neural networks with
low power consumption and low latency, while simultaneously interfacing a
large number of peripherals and providing high levels of robustness, import-
ant for industrial applications.

To explore the potential of FPGAs in embedded AI applications, Enclustra


adapted an existing embedded real-time image processing application to run
on Enclustra’s own SoC Module. The application runs on Mars XU3 module,
featuring a Xilinx Zynq UltraScale+ MPSoC device, mounted on the Mars ST3
base board. The AI application supports popular neural networks resnet50
and SSD for image classification and real-time face detection, respectively.
For demonstration purposes, the images are captured with a standard USB
camera, connected to the Mars ST3 base board. For higher performance a
MIPI interface can be used, available on the Mars ST3. Moreover, adding
actuators such as BLDC or stepper motors is a straightforward task using
Enclustra’s Universal Drive Controller IP Core.

Employed Technologies Xilinx® Zynq® UltraScale+®| VHDL | Mentor Graphics ModelSim®


Xilinx DNNDK | C++ | Linux

Involved Enclustra Products Mars XU3 | Mars ST3

FPGA DESIGN Center


13
» Our D evel o p ment Pr o ce s s
Customer Enquiry

Requirements Engineering Requirements definition | Use cases

Rough concept | Feasibility evaluation | Risk analysis


Concept Engineering
Rough effort/cost estimation

Free Commercial Offer Creation Project scope | Project schedule | Binding effort/cost estimation

Purchase Order

Project Preparation Project team setup | Project management setup | Kick-off

Detailed Hardware Design


Detailed design of building blocks | Design documentation
Detailed HDL Design
Peer reviews
Detailed Software Design

Hardware Production
Implementation of building blocks | Block-level tests and
HDL Implementation System
simulation | Design documentation update | Peer reviews
Software Implementation

Hardware Bringup & Test


HDL Integration & Test Integration of building blocks | Top-level tests and simulation
Design documentation update | Peer reviews
Software Integration & Test

System integration (HW, HDL and SW) | System-level tests


System Integration & Test
Design documentation update

Release creation and delivery | Customer training


System Deployment
Customer acceptance tests

Customer Acceptance

System Maintenance Maintenance | Support | Follow-up projects

FPGA DESIGN Center


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»   Co n ta ct

Enclustra GmbH
Raeffelstrasse 28
8045 Zurich
Switzerland

+41 43 343 39 43
[email protected]
www.enclustra.com

Germany USA & Canada


Hartmut Müller Tristan Martin Kevin McCluskey
Sales Germany (c/o hema electronic) Sales Representative Support and Application Engineering
+49 7361 9495-26 +1 807 907 8169 +1 978 835 3941

France, Belgium & Quebec Asia


Aimad Rhatay 聂崇岭 | Chongling Nie
Sales Director France, Belgium, Quebec 深圳总经理 | General Manager, Shenzhen
+33 6 51 28 18 75 +86 138 1116 3451

Copyright © 2020 Enclustra GmbH. All rights reserved.


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