Fundamentals of Computer Design

Introduction:

The concept of stored program computers appeared in 1945 when John von
Neumann drafted the first version of EDVAC (Electronic Discrete Variable
Computer). Those ideas have since been the milestones of computers:
• An input device through which data and instructions can be entered.
• Storage in which data can be read/written; instructions are like data, they
reside in the same memory
• An arithmetic unit to process data.
• A control unit which fetches instructions, decode and execute them.
• Output devices for the user to access the results.

The improvements in computer technology have been tremendous since the

first machines appeared. A personal computer that can be bought today with a few
thousand dollars, has more performance (in terms of say, floating point
multiplications per second), more main memory and more disk capacity than a
machine that cost millions in the 50s-60s.

Four lines of evolution have emerged from the first computers (definitions are
very loose and in many case the borders between different classes are blurring)

1. Mainframes: large computers that can support very many users while delivering
great computing power. It is mainly in mainframes where most of the innovations
(both in architecture and in organization) have been made.

2. Minicomputers: have adopted many of the mainframe techniques, yet being

designed to sell for less, satisfying the computing needs for smaller groups of
users. It is the minicomputer group that improved at the fastest pace (since 1965

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when DEC introduced the first minicomputer, PDP-8), mainly due to the evolution
of integrated circuits technology (the first IC appeared in 1958).

3. Supercomputers: designed for scientific applications, they are the most

expensive computers (over one million dollars), processing is usually done in batch
mode, for reasons of performance.

4. Microcomputers: have appeared in the microprocessor era (the first

microprocessor, Intel 4004, was introduced in 1971). The term micro refers only to
physical dimensions, not to computing performance. A typical microcomputer
(either a PC or a workstation) nicely fits on a desk. Microcomputers are a direct
product of technological advances: faster CPUs, semiconductor memories, etc.
Over the time many of the concepts previously used in mainframes and
minicomputers have become common place in microcomputers.

For many years the evolution of computers was concerned with the problem
of object code compatibility. A new architecture had to be, at least partly,
compatible with older ones. Older programs (“the dusty deck”) had to run without
changes on the new machines. A dramatic example is the IBM-PC architecture,
launched in 1981, it proved so successful that further developments had to conform
with the first release, despite the flaws which became apparent in a couple of years
thereafter. The assembly language is no longer the language in which new
applications are written, although the most sensitive parts continue to be written in
assembly language, and this is due to advances in languages and compiler
technology.

The obsolescence of assembly language programming, as well as the

creation of portable operating systems (like UNIX), have reduced the risks of
introducing new architectures. New families of computers are emerging, many of

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them hybrids of “classical” families: graphical supercomputers, multiprocessors,
MPP (Massively Parallel Processors), mini supercomputers, etc.

Functional Units:

A computer consists of five functionally independent main parts: input,

memory, arithmetic and logic, output, and control units, as shown in Figure.

The input unit accepts coded information from human operators using
devices such as keyboards, or from other computers over digital communication
lines. The information received is stored in the computer’s memory, either for later
use or to be processed immediately by the arithmetic and logic unit. The
processing steps are specified by a program that is also stored in the memory.
Finally, the results are sent back to the outside world through the output unit. All of
these actions are coordinated by the control unit. An interconnection network
provides the means for the functional units to exchange information and coordinate
their actions. The arithmetic and logic circuits, in conjunction with the main

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control circuits, is the processor. Input and output equipment is often collectively
referred to as the input-output (I/O) unit.

A program is a list of instructions which performs a task. Programs are

stored in the memory. The processor fetches the program instructions from the
memory, one after another, and performs the desired operations. The computer is
controlled by the stored program, except for possible external interruption by an
operator or by I/O devices connected to it. Data are numbers and characters that are
used as operands by the instructions. Data are also stored in the memory. The
instructions and data handled by a computer must be encoded in a suitable format.
Each instruction, number, or character is encoded as a string of binary digits called
bits, each having one of two possible values, 0 or 1, represented by the two stable
states.

1) Input Unit

Computers accept coded information through input units. The most common
input device is the keyboard. Whenever a key is pressed, the corresponding letter
or digit is automatically translated into its corresponding binary code and
transmitted to the processor. Many other kinds of input devices for human-
computer interaction are available, including the touchpad, mouse, joystick, and
trackball. These are often used as graphic input devices in conjunction with
displays. Microphones can be used to capture audio input which is then sampled
and converted into digital codes for storage and processing. Similarly, cameras can
be used to capture video input. Digital communication facilities, such as the
Internet, can also provide input to a computer from other computers and database
servers.

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2) Memory Unit:

The function of the memory unit is to store programs and data. There are
two classes of storage, called primary and secondary.

Primary Memory:

Primary memory, also called main memory, is a fast memory that operates at
electronic speeds. Programs must be stored in this memory while they are being
executed. The memory consists of a large number of semiconductor storage cells,
each capable of storing one bit of information. These cells are rarely read or
written individually. Instead, they are handled in groups of fixed size called words.
The memory is organized so that one word can be stored or retrieved in one basic
operation. The number of bits in each word is referred to as the word length of the
computer, typically 16, 32, or 64 bits. To provide easy access to any word in the
memory, a distinct address is associated with each word location. Addresses are
consecutive numbers, starting from 0, that identify successive locations.
Instructions and data can be written into or read from the memory under the
control of the processor. A memory in which any location can be accessed in a
short and fixed amount of time after specifying its address is called a random-
access memory (RAM). The time required to access one word is called the
memory access time. This time is independent of the location of the word being
accessed. It typically ranges from a few nanoseconds (ns) to about 100 ns for
current RAM units.

Cache Memory:

As an adjunct to the main memory, a smaller, faster RAM unit, called a

cache, is used to hold sections of a program that are currently being executed,
along with any associated data. The cache is tightly coupled with the processor and
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is usually contained on the same integrated-circuit chip. The purpose of the cache
is to facilitate high instruction execution rates. At the start of program execution,
the cache is empty. As execution proceeds, instructions are fetched into the
processor chip, and a copy of each is placed in the cache. When the execution of an
instruction requires data, located in the main memory, the data are fetched and
copies are also placed in the cache. If these instructions are available in the cache,
they can be fetched quickly during the period of repeated use.

Secondary Storage:

Although primary memory is essential, it tends to be expensive and does not

retain information when power is turned off. Thus additional, less expensive,
permanent secondary storage is used when large amounts of data and many
programs have to be stored, particularly for information that is accessed
infrequently. Access times for secondary storage are longer than for primary
memory. The devices available are including magnetic disks, optical disks (DVD
and CD), and flash memory devices.

3) Arithmetic and Logic Unit

Most computer operations are executed in the arithmetic and logic unit
(ALU) of the processor. Any arithmetic or logic operation, such as addition,
subtraction, multiplication division, or comparison of numbers, is initiated by
bringing the required operands into the processor, where the operation is
performed by the ALU. When operands are brought into the processor, they are
stored in high-speed storage elements called registers. Each register can store one
word of data. Access times to registers are even shorter than access times to the
cache unit on the processor chip.

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4) Output Unit

Output unit function is to send processed results to the outside world. A

familiar example of such a device is a printer. Most printers employ either
photocopying techniques, as in laser printers, or ink jet streams. Such printers may
generate output at speeds of 20 or more pages per minute. However, printers are
mechanical devices, and as such are quite slow compared to the electronic speed of
a processor. Some units, such as graphic displays, provide both an output function,
showing text and graphics, and an input function, through touchscreen capability.
The dual role of such units is the reason for using the single name input/output
(I/O) unit in many cases.

5) Control Unit

The memory, arithmetic and logic, and I/O units store and process
information and perform input and output operations. The operation of these units
must be coordinated in some way. This is the responsibility of the control unit. The
control unit is effectively the nerve center that sends control signals to other units
and senses their states. I/O transfers, consisting of input and output operations, are
controlled by program instructions that identify the devices involved and the
information to be transferred. Control circuits are responsible for generating the
timing signals that govern the transfers. They determine when a given action is to
take place. Data transfers between the processor and the memory are also managed
by the control unit through timing signals. A large set of control lines (wires)
carries the signals used for timing and synchronization of events in all units.

The operation of a computer can be summarized as follows:

• The computer accepts information in the form of programs and data through an
input unit and stores it in the memory.
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• Information stored in the memory is fetched under program control into an
arithmetic and logic unit, where it is processed.

• Processed information leaves the computer through an output unit.

• All activities in the computer are directed by the control unit

Connection between the Processor and the Memory:

Registers

 Instruction register (IR)

 Program counter (PC)
 General-purpose register (R0 – Rn-1)
 Memory address register (MAR)
 Memory data register (MDR)
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Two steps of Instructions Cycle:

1) Fetch 2)Execute

Fetch Cycle

 Program Counter (PC) holds address of next instruction to fetch

 Processor fetches instruction from memory location pointed to by PC
 Increment PC
Unless told otherwise
 Instruction loaded into Instruction Register (IR).

Execute Cycle
 Processor interprets instruction and performs required actions, such as:
 Processor – memory
 data transfer between CPU and main memory
 Processor - I/O
 Data transfer between CPU and I/O module
 Data processing
 Some arithmetic or logical operation on data
 Control
 Alteration of sequence of operations
 e.g. jump
 Combination of above.

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Addressing Modes:

The term addressing modes refers to the way in which the operand of an
instruction is specified. The addressing mode specifies a rule for interpreting or
modifying the address field of the instruction before the operand is actually
executed.
1. Immediate Addressing Mode
2. Register Addressing Mode
3. Register Indirect Addressing Mode
4. Direct Addressing Mode
5. Indirect Addressing Mode
6. Implied Addressing Mode
7. Relative Addressing Mode
8. Indexed Addressing Mode
9. Base Register Addressing Mode
10.Autoincrement or Autodecrement Addressing Mode

1) Immediate addressing mode: In this mode data is present in address field

of instruction. Designed like one address instruction format.
Note: Limitation in the immediate mode is that the range of constants are
restricted by size of address field.

Move Immediate:
MVI A, 15h A← 15h Here 15h is the immediate operand

Add Immediate:
ADI 3Eh A ← A + 3Eh Here 3Eh is the immediate operand

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2) Register mode: In register addressing the operand is placed in one of 8 bit
or 16 bit general purpose registers. The data is in the register that is specified
by the instruction.
Here one register reference is required to access the data.
Move:
MOV C , A C ← A Here A is the operand specified in register
Add:
ADD B A ← A + B Here B is the operand specified in register

3) Register Indirect mode:

In this addressing the operand’s offset is placed in any one of the
registers BX,BP,SI,DI as specified in the instruction. The effective address
of the data is in the base register or an index register that is specified by the
instruction. Here two register reference is required to access the data.
Move:
MOV A , M A ← [[H][L]]
It moves the data from memory location specified by HL register pair to A.

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4) Direct addressing/ Absolute addressing Mode:
The operand’s offset is given in the instruction as an 8 bit or 16 bit
displacement element. In this addressing mode the 16 bit effective address of
the data is the part of the instruction. Here only one memory reference
operation is required to access the data.
• Load Accumulator
LDA 2805h A ← [2805]
It loads the data from memory location 2805 to A.
• Store Accumulator
STA 2803h [2803] ← A
It stores the data from A to memory location 2803.

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5) Indirect addressing Mode:
In this mode address field of instruction contains the address of
effective address. Here two references are required.
1st reference to get effective address.
2nd reference to access the data.
Based on the availability of Effective address, indirect mode is of two kind:

Register Indirect: In this mode effective address is in the register, and

corresponding register name will be maintained in the address field of an
instruction. Here one register reference, one memory reference is required to
access the data.
Memory Indirect: In this mode effective address is in the memory, and
corresponding memory address will be maintained in the address field of an
instruction.
Here two memory reference is required to access the data.
Move:
MOV A, 2802h A ← [[2802]]
It moves the data from memory location specified by the location 2802 to A.

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6) Implied Addressing Mode
• It is also called inherent addressing mode.
• The operand is implied by the instruction.
• The operand is hidden/fixed inside the instruction.
• Complement Accumulator CMA
(Here accumulator A is implied by the instruction)
• Complement Carry Flag CMC
(Here Flags register is implied by the instruction)
• Set Carry Flag STC
(Here Flags register is implied by the instruction)

7) Relative Addressing Mode

In relative addressing mode, contents of Program Counter PC is added
to address part of instruction to obtain effective address. The address part of
the instruction is called as offset and it can +ve or –ve. (in 2’s compliments
mode). When the offset is added to the PC the resultant number is the
memory location where the operand will be placed.

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8) Indexed Addressing Mode
In index addressing mode, contents of Index register is added to
address part of instruction to obtain effective address. The address part of
instruction holds the beginning/base address and is called as base. The index
register hold the index value, which is +ve. Base remains same, the index
changes. When the base is added to the index register the resultant number is
the memory location where the operand will be placed.

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9) Base Register Addressing Mode
In base register addressing mode, contents of base register is added to
address part of instruction to obtain effective address. It is similar to the
indexed addressing mode except the register now is called as base instead of
index. The base register hold the beginning/base address. The address part of
instruction holds the offset. Offset remains same, the base changes. When
the offset is added to the base register the resultant number is the memory
location where the operand will be placed.

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10) Auto increment or Auto decrement Addressing Mode
Auto Indexed (increment mode):
Effective address of the operand is the contents of a register specified
in the instruction. After accessing the operand, the contents of this register
are automatically incremented to point to the next consecutive memory
location.(R1)+.
Here one register reference,one memory reference and one ALU operation is
required to access the data.
Auto indexed ( decrement mode): Effective address of the operand is the
contents of a register specified in the instruction. Before accessing the
operand, the contents of this register are automatically decremented to point
to the previous consecutive memory location. –(R1).
Here one register reference,one memory reference and one ALU operation is
required to access the data.

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18
Von Neumann Architecture:

Historically there have been 2 types of Computers:

1. Fixed Program Computers – Their function is very specific and they

couldn’t be programmed, e.g. Calculators.
2. Stored Program Computers – These can be programmed to carry out many
different tasks, applications are stored on them, hence the name.
The modern computers are based on a stored-program concept introduced by John
Von Neumann. In this stored-program concept, programs and data are stored in a
separate storage unit called memories and are treated the same. This novel idea
meant that a computer built with this architecture would be much easier to
reprogram. The basic structure is like,

It is also known as IAS computer and is having three basic units:

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1. The Central Processing Unit (CPU)
2. The Main Memory Unit
3. The Input/Output Device

 Control Unit:

A control unit (CU) handles all processor control signals. It directs all input
and output flow, fetches code for instructions and controlling how data moves
around the system.

 Arithmetic and Logic Unit (ALU)

The arithmetic logic unit is that part of the CPU that handles all the
calculations the CPU may need, e.g. Addition, Subtraction, Comparisons. It
performs Logical Operations, Bit Shifting Operations, and Arithmetic
Operation.

Figure – Basic CPU structure, illustrating ALU

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 Main Memory Unit (Registers) –
1. Accumulator: Stores the results of calculations made by ALU.
2. Program Counter (PC): Keeps track of the memory location of the next
instructions to be dealt with. The PC then passes this next address to
Memory Address Register (MAR).
3. Memory Address Register (MAR): It stores the memory locations of
instructions that need to be fetched from memory or stored into memory.
4. Memory Data Register (MDR): It stores instructions fetched from
memory or any data that is to be transferred to, and stored in, memory.
5. Current Instruction Register (CIR): It stores the most recently fetched
instructions while it is waiting to be coded and executed.
6. Instruction Buffer Register (IBR): The instruction that is not to be
executed immediately is placed in the instruction buffer register IBR.

 Input/Output Devices – Program or data is read into main memory from

the input device or secondary storage under the control of CPU input
instruction. Output devices are used to output the information from a
computer. If some results are evaluated by computer and it is stored in the
computer, then with the help of output devices, we can present it to the user.
 Buses – Data is transmitted from one part of a computer to another,
connecting all major internal components to the CPU and memory, by the
means of Buses. Types:
1. Data Bus: It carries data among the memory unit, the I/O devices, and
the processor.
2. Address Bus: It carries the address of data (not the actual data) between
memory and processor.

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 3. Control Bus: It carries control commands from the CPU (and status
signals from other devices) in order to control and coordinate all the
activities within the computer.

Von Neumann bottleneck:

Whatever we do to enhance performance, we cannot get away from the fact
that instructions can only be done one at a time and can only be carried out
sequentially. Both of these factors hold back the competence of the CPU. This is
commonly referred to as the ‘Von Neumann bottleneck’. We can provide a Von
Neumann processor with more cache, more RAM, or faster components but if
original gains are to be made in CPU performance then an influential inspection
needs to take place of CPU configuration.
This architecture is very important and is used in our PCs and even in Super
Computers

Interaction of a Program with Hardware:

When a Programmer wrote a program, then how it is feeded to the computer

and how it actually works? So, how the program code that we write in any text
editor is feeded to computer as we all know computer works on only two numbers
that is 0 or 1.

1. Programmer write code in text editor using any language like C++, JAVA,
and Python etc.
2. This code is given to the compiler and it actually converts it to assembly
code that is very close to machine hardware as it depend on instruction set
which is then converted to binary that is 0 and 1 which actually represent
digital voltage feeded to transistors inside the chip.

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 3. Now we have voltages which is actually required to run the hardware. These
voltages actually connect the correct circuitry inside the chip and perform that
specific task for example addition, subtraction etc .All these operations are
done by combination of little transistors if we go into low level or flip-flops
which are combination of gates and gates are combination of transistors. So, it
all started with the invention of transistors.
4. The chip has lot of circuits inside it to perform various task like arithmetic and
logical task. The computer hardware also contain RAM which is another chip
which can store data temporary and hard disk which can permanently store
data.
5. Operating system is also responsible to feed the software to the right hardware
like keyboard, mouse, screen etc.
The following picture depict the whole process:

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Simplified Instructional Computer (SIC):

Simplified Instructional Computer (SIC) is a hypothetical computer that has

hardware features which are often found in real machines. There are two versions
of this machine

1. SIC standard Model

2. SIC/XE(extra equipment or expensive)
Object program for SIC can be properly executed on SIX/XE which is known as
upward compatibility.

SIC Machine Architecture/Components:

1. Memory
 Memory is byte addressable that is words are addressed by location of
their lowest numbered byte.
 There are 2^15 bytes in computer memory (1 byte = 8 bits) 3 consecutive
byte = 1 word (24 bits = 1 word)
2. Registers
There are 5 registers in SIC. Every register has an address associated with it
known as register number. Size of each register is 3 bytes. On basis of register
size, integer size is dependent.
I. A(Accumulator-0): It is used for mathematical operations.

II. X(Index Register-1): It is used for addressing.

III. L(Linkage Register-2): It stores the return address of instruction in case of

subroutines.
IV. PC(Program Counter-8): It holds the address of next instruction to be
executed.
V. SW(Status Word-9): It contains the variety of information

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 Status Word Register:

 mode bit refers to user mode(value=0) or supervising mode(value=1). It

occupies 1 bit.[0]
 state bit refers whether process is in running state(value=0) or idle
state(value=1). It also occupies 1 bit.[1]
 id bit refers to process id(PID). It occupies 3 bits.[2-5]
 CC bit refers to condition code i.e. It tells whether device is ready or not.
It occupies 2 bits.[6-7] Mask bit refers to interrupt mask. It occupies 4
bits.[8-11]
 X refers to unused bit. It also occupies 4 bits.[12-15]
 ICode refers to interrupt code i.e. Interrupt Service Routine. It occupies
the remaining bits.[16-23]
3. Data Format
 Integers are represented by 24 bit.
 Negative numbers are represented in 2’s complement.
 Characters are represented by 8 bit ASCII value.
 No floating point representation is available.
4. Instruction Format
All instructions in SIC have 24 bit format.

 If x=0 it means direct addressing mode.

 If x=1 it means indexed addressing mode.

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 5. Instruction Set
 Load And Store Instructions: To move or store data from accumulator to
memory or vice-versa. For example LDA, STA, LDX, STX etc.
 Comparison Instructions: Used to compare data in memory by contents in
accumulator. For example COMP data.
 Arithmetic Instructions: Used to perform operations on accumulator and
memory and store result in accumulator. For example ADD, SUB, MUL,
DIV etc.
 Conditional Jump: compare the contents of accumulator and memory and
performs task based on conditions. For example JLT, JEQ, JGT
 Subroutine Linkage: Instructions related to subroutines. For example
JSUB, RSUB
6. Input and Output
It is performed by transferring 1 byte at a time from or to rightmost 8 bits of
accumulator. Each device has 8 bit unique code. There are 3 I/O instructions:
 Test Device (TD) tests whether device is ready or not. Condition code in
Status Word Register is used for this purpose.
 Read data(RD) reads a byte from device and stores in register A.
 Write data(WD) writes a byte from register A to the DEVIC.

SIC/XE Architecture:

SIC/XE stands for Simplified Instructional Computer Extra Equipment or

Extra Expensive. This computer is an advance version of SIC. Both SIC and
SIC/XE are closely related to each other that’s why they are Upward Compatible.

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SIC/XE machine architecture:
1. Memory:
Memory consists of 8 bit-bytes and the memory size is 1 megabytes (220 bytes).
Standard SIC memory size is very small. This change in the memory size leads to
change in the instruction formats as well as addressing modes. 3 consecutive bytes
form a word (24 bits) in SIC/XE architecture.
All address are byte addresses and words are addressed by the location of their
lowest numbered byte.

2. Registers:
It contain 9 registers (5 SIC registers + 4 additional registers). Four additional
registers are:

Mnemonics Use of Register

B Base register
S General working register
T General working register
F Floating-point accumulator

3. Data Formats:
 Integers are represented by Binary numbers.
 Characters are represented using ASCII codes.
 Floating points are represented using 48-bits.

4. Instruction formats:
 In SIC/XE architecture there are 4 types of formats available

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  The Bit(e) is used to distinguish between Formats 3 and Formats 4,
e=0 means Format 3 and e=1 means Format 4

Format 1(1 byte):

Format 2(2 bytes):

Format 3(3 bytes):

Format 4(4 bytes):

n=Indirect mode, i=Immediate addressing, x=Index addressing, b=Base

addressing, p= Program counter, e=Exponential addressing

5. Addressing Modes:
To use Format 3 use of Base register and Program counter is there.
Mode Indication Target Address (TA)
Base relative b=1, p=0 TA=(B) + displacement
Program-counter b=0, p=1 TA=(PC) + displacement
relative
Target address is the effective address of the instruction.

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6. Instruction Set:
 IN SIC/XE all the instructions are same as that of SIC architecture but
because of Floating point data format it provide Floating point Arithmetic
functions too.
 To perform floating-point arithmetic operations,
 ADDF = Add floating points,

 SUBF = Subtract floating points,

 MULF = Multiply floating points,

DIVF = Divide floating points

 SVC (Supervisor call) is also provided in the SIC/XE architecture to handle

Interrupts.

7. Input and Output:

SIC/XE architecture include I/O channels that allow to perform I/O
operations while CPU is executing other tasks. It will allow overlapping of
computing and I/O, which make this architecture more efficient. Instructions such
as SIO, TIO, HIO are used to start, test, and halt the operation I/O channels

RISC and CISC:

The design of the instruction set for the processor is considered as an

important aspect of computer architecture. The machine language program is
developed based on the instruction set chosen for that particular computer. Earlier,
the hardware components of the computer were expensive and to minimize this
expense, the programmers started to build simple and small instructions. With the
advent of integrated circuits, the digital hardware became cheaper and the
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computer instructions started to increase in number and complexity. Many
computers have more than 100 instruction sets. Such computers with large number
of instructions are classified as a Complex Instruction Set Computers (CISC). In
1980s, computer architects started to design computers with fewer instructions in
order to execute programs at a much faster rate within the CPU. Such computers
with less number of instructions are classified as a Reduced Instruction Set
Computer (RISC).

Complex Instruction Set Computer (CISC):

A Complex Instruction Set Computer (CISC) comprises a complex

instruction set. It incorporates variable length instruction format. Instructions that
require register operands may take only two bytes. However, the instructions that
require two memory addresses may take five bytes to include the complete
instruction code. Thus, CISC has variable length encoding of instructions and the
execution of instructions may take varying number of clock cycles. The CISC
processor provides direct manipulation of operands that are in memory.

Example: An ADD instruction will use index addressing to specify one operand in
memory and direct addressing to specify second operand in memory. This
instruction would use another memory location to store the result. Thus, this
instruction would use three memory references for execution.

Many CISC architectures read the inputs and write their outputs in the
memory system instead of a register file. As CISC architecture takes large number
of addressing modes, more hardware logic is required to implement them. This
reduces the computation speed. Basically, the CISC architecture attempts to
provide a single machine instruction for the statements that are written in a high-
level language.

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Example: The IBM 370 computer uses the CISC architecture

Reduced Instruction Set Computer (RISC):

In Reduced Instruction Set Computer (RISC) architecture, the instruction set

of the computer is simplified to reduce the execution time. RISC has a small set of
instructions, which generally include register-to-register operations. Thus, data is
stored in processor registers for computations and results of the computations are
transferred to the memory using store instructions. All operations are performed
within the registers of the CPU. In RISC, all instructions have simple register
addressing and hence use less number of addressing modes.

RISC uses relatively a simple instruction format and is easy to decode. Here,
the instruction length can be fixed and aligned on word boundaries. The RISC
processors have the ability to execute one instruction per clock cycle. This is done
using pipelining, which involves overlapping the fetch, decode, and execute phases
of two or three instructions. As RISC takes relatively a large number of registers in
the processor unit, it takes less time to execute its program when compared to
CISC.

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RISC versus CISC

There are some significant differences between RISC and CISC processors. The
comparison between the common characteristics of RISC and CISC processor is
shown in table.

CISC RISC
Many instructions Few instructions
Many addressing modes. Few addressing modes. Most instructions
have register to register addressing modes.
Includes complex instructions and takes Includes simple instructions and takes one
multiple cycles. cycle.
Most of the instructions refer to memory. Some of the instructions refer to memory.
Microprogram executes the instructions. Hardware executes the instructions.
Variable format instructions. Fixed format instructions.
Difficult to decode as instructions have Easier to decode as instructions have fixed
variable format. format.
Single register set is used. Multiple register sets are used.
CISC is not pipelined or less pipelined. RISC is highly pipelined.
Load and store functions are found in a Load and store functions are separate
single instruction. instructions.

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