www.rejinpaul.

com

LIST OF EXPERIMENTS

1. Characteristics of PN Junction Diode

2. Zener diode Characteristics & Regulator using Zener diode
3. Common Emitter input-output Characteristics

om
4. Common Base input-output Characteristics
5. FET Characteristics
6. SCR Characteristics

.c
7. Clipper and Clamper & FWR
8. Verifications of Thevenin & Norton theorem

ul
9. Verifications of KVL & KCL
10. Verifications of Super Position Theorem
pa
11. Verifications of Maximum power transfer &Reciprocity theorem
12. Determination of Resonance Frequency of Series & Parallel RLC
Circuits
jin

13. Transient analysis of RL and RC circuits

.re

BEYOND THE SYLLABUS

 Characteristics of UJT
w
w
w

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Ex.No.1

CHARACTERISTICS OF PN JUNCTION DIODE

Aim:
To determine the VI characteristics of PN Diode

Apparatus required:

om
S.No Name Range Type Qty
1 R.P.S (0-30)V 1
2 Ammeter (0-5)mA, 1
(0-25)mA 1

.c
3 Voltmeter (0-10)V 1
(0-1 )V 1
4 Connecting wires - As

ul
Required
5 Bread Board 1
6 Resistors 1KΩ 1
pa
7 Diode- PN BY127 1

THEORY:

A diode is a PN junction formed by a layer of P type and layer of N type

jin

Semiconductors. Once formed the free electrons in the N region diffuse across the junction
and combine with holes in P region and so a depletion Layer is developed. The depletion
layer consists of ions, which acts like a barrier for diffusion of charged beyond a certain
limit. The difference of potential across the depletion layer is called the barrier potential. At
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2.5degree the barrier potential approximately equal 0.7v for silicon diode and 0.3v for
germanium diode.

When the junction is forward bias, the majority carrier acquired sufficient energy to
overcome the barrier and the diode conducts. When the junction is reverse biased the
w

depletion layer widens and the barrier potential increases. Hence the Majority carrier
cannot cross the junction and the diode does not conduct. But there will be a leakage
current due to minority carrier. When diode is forward biased, resistance offered is zero,
w

and when reverse biased resistance offered is infinity. It acts as a perfect switch.

PIN DIAGRAM:
w

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CIRCUIT DIAGRAM:

FORWARD BIAS:

om
.c
REVERSE BIAS:
ul
pa
jin
.re
w
w

PROCEDURE:
w

FORWARD BIAS:

1. The connections are made as per the circuit diagram.

2. The positive terminal of power supply is connected to anode of the diode and
negative terminal to cathode of the diode.
3. Forward voltage Vf across the diode is increased in small steps and the forward
current is noted.
4. The readings are tabulated. A graph is drawn between Vf and I f.

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REVERSE BIAS :

1. The connections are made as per the circuit diagram.

2. The positive terminal of power supply is connected to cathode of the diode and
negative terminal to anode of the diode.
3. Reverse voltage Vr across the diode is increased in small steps and the Reverse
current is noted.
4. The readings are tabulated. A graph is drawn between V r and I r.

TABULATION:

om
FORWARD BIAS:

.c
Vf(volts) If(mA)

ul
pa
jin

REVERSE BIAS:
.re

Vr(volts) Ir(mA)
w
w
w

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MODEL GRAPH

om
.c
ul
PRE REQUISITE:

1. What is a semiconductor?
pa
2. Write the Diode current Equation.
3. What is the value of Vt at room temperature
4. What is meant by forward bias
5. What is meant by reverse bias?
jin

REVIEW QUESTIONS:

1. How a PN junction is formed?

2. In what way the width of depletion region can be varied?
.re

3. What is potential barrier?

4. In forward bias condition the current condition is due to______
5. What is reverse saturation current Ico?
w
w
w

RESULT:

Thus the characteristics of PN-Junction diode were drawn.

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Ex.No.2a

CHARACTERISTICS OF ZENER DIODE

Aim:
To determine the VI characteristics of Zener Diode

APPARATUS REQUIRED:

om
S.No Name Range Type Qty
1 R.P.S (0-30)V 1
2 Ammeter (0-30) mA 1
3 Voltmeter (0-10)V 1

.c
(0-1 )V 1
4 Connecting wires - As
Required

ul
5 Bread Board 1
6 Resistors 1KΩ 1
7 Diode- Zener FZ 5V6/ FZ 6V2 1
pa
THEORY:

Zener diodes have many of the same basic properties of ordinary semiconductor
jin

diodes. When forward biased, they conduct in the forward direction and have the same turn
on voltage as ordinary diodes. For silicon this is about 0.6 volts.

In the reverse direction, the operation of a Zener diode is quite different to an

.re

ordinary diode. For low voltages the diodes do not conduct as would be expected.
However, once a certain voltage is reached the diode "breaks down" and current flows.
Looking at the curves for a Zener diode, it can be seen that the voltage is almost constant
regardless of the current carried. This means that a Zener diode provides a stable and
known reference voltage. Hence they are used as Voltage regulators.
w

PIN DIAGRAM:
w
w

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CIRCUIT DIAGRAM:

FORWARD BIAS:

om
.c
ul
pa
REVERSE BIAS:
jin
.re
w
w
w

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PROCEDURE:

FORWARD BIAS:

1. The connections are made as per the circuit diagram.

2. The positive terminal of power supply is connected to anode of the diode and
negative terminal to cathode of the diode.
3. Forward voltage Vf across the diode is increased in small steps and the forward
current is noted.
4. The readings are tabulated. A graph is drawn between V f and I f.

om
REVERSE BIAS:

.c
1. The connections are made as per the circuit diagram.
2. The positive terminal of power supply is connected to cathode of the diode and
negative terminal to anode of the diode.

ul
3. Reverse voltage Vr across the diode is increased in small steps and the Reverse
current is noted.
4. The readings are tabulated. A graph is drawn between V r and I r.
pa
TABULAR COLUMN:
jin

FORWARD BIAS:

Vf(volts) If(mA)
.re
w

REVERSE BIAS:

Vr(volts) Ir(mA)
w
w

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MODEL GRAPH

om
.c
ul
PRE REQUISITE:

1. How the name of the Zener came?

pa
2. What is cause of reverse breakdown?
3. What is Zener voltage?
4. Write the Symbol for the Zener diode.
5. What are the different types of breakdowns in semiconductor junctions?
jin

REVIEW QUESTIONS:

1. What is the difference between p-n Junction diode and Zener diode
2. Can we use Zener diode as a switch?
.re

3. Explain working of a Zener Diode

4. What is the max value of voltage of Zener breakdown devices
5. What is cause of reverse breakdown
w
w
w

RESULT:

Thus the characteristics of Zener diode were drawn.

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Ex.No.2b

ZENER DIODE AS A VOLTAGE REGULATOR

Aim:
To study the Zener Diode as Voltage Regulator.

APPARATUS REQUIRED:

om
S.No Name Range Type Qty
1 R.P.S (0-30)V 1
2 Ammeter (0-30) mA 1
3 Voltmeter (0-10)V 1

.c
(0-1 )V 1
4 Connecting wires As
Required

ul
5 Bread Board 1
6 Resistors 1KΩ 1
7 Diode- Zener FZ 5V6/ FZ 6V2 1
pa
THEORY:

Zener diodes have many of the same basic properties of ordinary semiconductor
jin

diodes. When forward biased, they conduct in the forward direction and have the same turn
on voltage as ordinary diodes. For silicon this is about 0.6 volts.

In the reverse direction, the operation of a Zener diode is quite different to an

.re

ordinary diode. For low voltages the diodes do not conduct as would be expected.
However, once a certain voltage is reached the diode "breaks down" and current flows.
Looking at the curves for a Zener diode, it can be seen that the voltage is almost constant
regardless of the current carried. This means that a Zener diode provides a stable and
known reference voltage. Hence they are used as Voltage regulators.
w

PIN DIAGRAM:
w
w

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CIRCUIT DIAGRAM:

om
.c
ul
pa
PROCEDURE:
jin

1. The connections are made as per the circuit diagram.

2. Keep Load resistance RL constant.
3. Vary the Input voltage and note down the corresponding output voltage.
4. Now keep voltage constant vary the RL and note down the voltmeter
.re

corresponding reading.
5. Plot the respective regulations graph.
w

TABULAR COLUMN:

LOAD REGULATION:
w

RL (kΩ) Vout (V)

w

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LINE REGULATION:

Vin (V) Vout (V)

om
MODEL GRAPH

.c
Vout (V) Vout (V)

ul
pa
RL (kΩ) Vin (V)

LOAD REGULATION LINE REGULATION

jin

PREREQUISITE
.re

1. How Zener diode acts as a voltage regulator.

2. Explain working of a Zener Diode
3. Explain Zener Breakdown.
4. Explain avalanche breakdown.
5. Compare Zener and avalanche Breakdown.
w

REVIEW QUESTIONS:
w

1. What are the applications of Zener diode?

w

2. What is voltage regulator?

3. What is cut-in-voltage?
4. What is break down voltage?
5. Draw characteristics of Zener Diode under Forward & Reverse Bias Conditions

RESULT:

Thus the Zener diode as a Voltage Regulator were studied.

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Ex.No:3 CHARACTERISTICS OF CE CONFIGURATION

AIM:

To plot the transistor characteristics (INPUT & OUTPUT) of CE configuration.

APPARATUS REQUIRED:

om
S.No. COMPONENTS SPECIFICATION QTY
1 Transistor BC 107 Max Rating : 50V 1A, 1
3W
2 Resistors 10KΩ,100Ω 2

.c
3 Regulated power supply (0-30) V 1
4 Voltmeters Mc (0-10) V 1
Mc (0-1) V 1

ul
5 Ammeters Mc (0-30) mA 1
Mc (0-100)µA 1

6 Bread board & connecting wires As

pa
Required
jin

THEORY:

A NPN function transistor consist of a silicon (or germanium) crystal in which a

layer of p – type silicon is sandwiched between two layers of N – type silicon. The arrow
.re

on emitter lead specifies the direction of the current flow when the emitter – base function
is biased in the forward direction since the conductivity of the BJT depends on both the
majority and minority carriers it is called bipolar device. In CE configuration, Emitter is
common to both the Emitter and Base.
w

PIN DIAGRAM OF BC107

w
w

E B

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CIRCUIT DIAGRAM:

om
.c
DESCRIPTION:

ul
pa
Input Characteristics:

Voltage across Base Emitter junction VBE vs IB, where VCE constant
jin

Output Characteristics:

Voltage across Collector Emitter junction VCE vs IC where IB constant

.re

PROCEDURE:

Input Characteristics:
w

1. Connections are made as per the circuit diagram.

2. VCE is kept constant (say 2v), VBE is varied insteps of 0.1v and the corresponding
IB values are tabulated. The above procedure is repeated for 1V etc.
w

3. Graph is plotted between VBE vs IB, where VCE constant.

Output Characteristics:
w

1. Connection are made as per the circuit diagram

2. IB is kept constant, VCE is varied in step IV the corresponding IC values are
tabulated. The above procedure is repeated for different constant values.
3. Graph is plotted between VCE and Ic for a constant IB.

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TABULATION:

Input Characteristics:

VCE = V VCE = V
VBE(V) IB (µA) VBE(V) IB(µA)

om
Output characteristics:

µA µA

.c
IB = IB =
VCE(V) IC (mA) VCE(V) IC(mA)

ul
pa
MODEL GRAPH:

INPUT CHARACTERISTICS OUTPUT CHARACTERITICS

VCE=1V
jin

2V 3V I B=
30μA
IB IC 20 μA
10 μA
.re

VBE (v)
VCE
PRE REQUISITE:
w

1. List the current components of BJT in CE configuration

2. What is Early Effect?
3. Why the doping of collector is less compared to emitter?
w

4. What do you mean by “reverse active”?

5. What is the difference between CE and Emitter follower circuit?
REVIEW QUESTIONS:
w

1. Explain the operation of CE configuration

2. Determine the output resistance and input resistance
3. What is the relation between α, β and γ?
4. Define current gain in CE configuration?
5. Why CE configuration is preferred for amplification

RESULT:

Thus the input and output characteristic of BJT in Common Emitter mode is drawn.

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Ex.No:4
CHARACTERISTICS OF CB CONFIGURATION

AIM:

To plot the transistor characteristics (INPUT & OUTPUT) of CB configuration.

APPARATUS REQUIRED:

om
S.No. COMPONENTS SPECIFICATION QTY
1 Transistor BC 107 Max Rating : 50V 1A, 1
3W
2 Resistors 470Ω 2
3 Regulated power supply (0-30) V 1
4 Voltmeters Mc (0-10) V 1

.c
Mc (0-1) V 1
5 Ammeters Mc (0-30) m A 2
6 Bread board & connecting wires - 1

THEORY:

ul
pa
A NPN function transistor consist of a silicon (or germanium) crystal in which a
layer of p – type silicon is sandwiched between two layers of N – type silicon. The arrow
on emitter lead specifies the direction of the current flow when the emitter – base function
is biased in the forward direction since the conductivity of the BJT depends on both the
jin

majority and minority carriers it is called bipolar device. In CB configuration, base is

common to both the emitter and collector.

PIN DIAGRAM OF BC107

.re

E B

C
w

CIRCUIT DIAGRAM:
w

(0-25mA) (0-30mA)
470Ω BC107 470Ω
E
w

A C A
- + - +
IE IC +
VBE B
- VCB +
- + RPS
RPS
(0-30V) V (0-1V) (0-10V) V (0-30V)
+ -
+ -

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DESCRIPTION:

Input Characteristics:

Voltage across Base Emitter junction VBE vs IE, where VCB constant

Output characteristics:

Voltage across Collector Emitter junction VBC vs IC where IE constant

om
PROCEDURE:

Input Characteristics:

1. Connections are made as per the circuit diagram.

.c
2. VCB is kept constant (say 2v), VBE is varied insteps of 0.1v and the
corresponding IE values are tabulated. The above procedure is repeated for 1V
etc.

ul
3. Graph is plotted between VBE vs IE, where VCB constant.

Output Characteristics:
pa
1. Connection are made as per the circuit diagram
2. IE is kept constant, VBC is varied in step IV the corresponding IC values are
tabulated. The above procedure is repeated for different constant values.
3. Graph is plotted between VBC and Ic for a constant IE.
jin

TABULATION:
Input Characteristics:
.re

VCB = V VCB = V
VBE (V) IE (mA) VBE (V) IE (mA)
w
w

Output Characteristics:
w

IE= mA IE= mA
VBE (V) IC (mA) VBE (V) Ic (mA)

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MODEL GRAPH:

INPUT CHARACTERISTICS OUTPUT CHARACTERITICS

VCB= 3V 2V 1V IE=
3mA
IE IC 2mA
(mA) 1mA
(mA)

om
VBE (v)
VCB (V)

.c
PRE REQUISITE:

ul
1. Explain the operation of CB configuration
2. Determine the output resistance
3. Determine input resistance
pa
4. Explain input characteristics
5. Explain output characteristics

REVIEW QUESTIONS:
jin

1. Bring out the comparison of CC and CB transistor parameters

2. Give the relation of Ebers moll equation.
3. Bring out the comparison of CEand CB transistor parameters
4. Draw input and output characteristics of CB?
.re

5. Explain Gummen poll model

w
w
w

RESULT:

Thus the input and output characteristic of BJT in Common Base mode is drawn.

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EX .NO-5

CHARACTERISTICS OF JFET.

AIM:

To plot the drain and transfer characteristics of JFET & to find drain resistance,
trans conductance, amplification factor, drain saturation current IDSS and Pinch off voltage.

om
APPARATUS REQUIRED:

S.No. Components Specification Qty

1 FET BFW10 1

.c
Idss> 8 mA, Vp<8V
2 Resistors 1KΩ 1

ul
3 Regulated dual MC (0-30)V 1
power supply
4 Voltmeters MC (0-10)V 1
MC (0-25)V 1
pa
5 Ammeters MC (0-25) mA 1
6 Bread board &
connecting wires
jin

THEORY:

Field effect transistor is a semiconductor device that depends for its operation on
.re

the control of current by an electric field. It’s operation depends on the flow of majority
carriers only. It is therefore a unipolar device. It exhibits a high input resistance. An N-
channel JFET consists of a N-type bar is sandwiched between two heavily doped Persians.
Due to the concentration gradient, the depletion region formed. On both sides of the
semiconductor bar the ohmic contacts are made. One terminal is called source & other is
w

called drain. Both the p-type regions are connected together.

PIN DIAGRAM OF BFW10

w

D
w

S
G

Shield

20
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om
.c
ul
DESCRIPTION:

DRAIN CHARACTERISTICS
pa
INPUT: Drain voltage VDS is varied insteps of 1V, VGS is kept constant

OUTPUT: Drain current ID

jin

TRANSFER CHARACTERISTICS

INPUT: Gate – source voltage VGS is varied, Drain –source voltage VDS is kept constant
.re

OUTPUT: Drain current ID

PROCEDURE:
w

Drain Characteristics:
w

1. Connections are made as per the circuit diagram.

2. Gate –source voltage VGS is kept constant (say –1v), drain voltage VDS is varied
w

insteps of 1v and the corresponding drain current ID values are tabulated.

3. The above procedure is repeated for VGS= -2v, 0v.
4. The graph is plotted VDS and ID for a constant VGS.
5. The drain resistance is found from the graph

rd = ΔVDS/ Δ ID

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Transfer Characteristics:

1. Connections are made as per the circuit diagram.

2. Drain –source voltage VDS is kept constant (say 5v), the gate – source voltage VGS
is varied insteps of 1v (-VE voltage) and the corresponding drain current ID values
are tabulated.
3. The above procedure is repeated for VDS = 10v, 15v,
4. Graph is plotted between VGS and ID for a constant VDS.
5. The trans conductance is found from the graph

om
gm = Δ ID/ΔVG

TABULAR COLUMN:

Drain characteristics

.c
VGS = V VGS = V
VDS (V) ID (mA) VDS (V) ID (mA)

ul
pa
Transfer characteristics

VDS = V VDS =V
jin

VGS (V) ID (mA) VGS (V) ID (mA)

.re

MODEL GRAPH:
w

DRAIN CHARACTERISTICS TRANSFER CHARACTERISTICS

ID
VGS=-0V (mA)
w

ID ID VDS=CONST
(mA) VDSID
VGS=-2V
w

VGS

VGS (v)
VDS (v)

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CALCULATION

Transconductance gm = Δ ID/ΔVG
Drain resistance rd = Δ VDS /Δ ID
Amplification factor μ = gmrd

PRE REQUISITE:

om
1. Why it is called by name “field effect transistor”?
2. What are the advantage of FET OVER BJT?
3. What are the disadvantages of FET?
4. What is the significance of arrowhead in FET symbol?

.c
5. Why FET is called unipolar device

REVIEW QUESTIONS:

ul
pa
1. Define VVR.
2. Why MOSFET is preferred than FET?
3. What are the differences between FET & MOSFET?
jin

4. What are the applications of FET?

5. Why FET is called us voltage controlled device?
.re
w
w

RESULT:
w

Thus the drain and transfer for characteristics of JFET is drawn.

Drain resistance rd =
Trans conductance gm =
Amplification factor =

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EX NO: 6
CHARACTERISTICS OF SCR

AIM:
To construct a circuit using SCR to draw its Firing Characteristics.

APPARATUS REQUIRED:

S.No Components Specification Quantity

om
1 SCR TYN410 1
2 Dual RPS (0-30)V 1
3 Resistor 560 Ω, 470Ω 1 each
(0.5W)
4 Ammeter (0-25)mA 1
(0-100)mA 1

.c
5 Voltmeter (0-30)V 1
6 Bread board 1

THEORY:
ul
pa
The SCR consists of four layers of semiconductor material alternatively P type
and N type. It can be brought of as an ordinary rectifier with a control element .The control
element is called GATE. The gate current determines the anode to cathode voltage at which
the device starts to conduct.
jin

It means that gate terminal of the SCR is controlled by the applied voltage.
Once switched ON the gate has no further control. To switch the SCR the anode current
has to be reduced below a certain level called HOLDING CURRENT.
The SCR can be triggered ON with the gate or amplitude triggering, pulse
.re

triggering methods. The terms ON & OFF are used to represent the conduction and
blocking mode of SCR respectively open circuited with the anode to cathode voltage made
large enough .In conduction state the SCR behaves as an ordinary diode.
The anode to cathode voltage at which the SCR conducts is called BREAK
OVER VOLTAGE or FORWARD BLOCKING VOLTAGE. It has great switching speed
w

than other devices.

PIN DIAGRAM:
w
w

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CIRCUIT DIAGRAM:

470, 1/2W (0- 100) mA (0- 25) mA 560, 1/2W

+ - - +
A A
IA
+ IG (0-30) V
(0-30)V V (0-30) V A
RPS1 - RPS2
- VAK G

om
C

.c
PROCEDURE:

ul
1. Give the circuit connections as per the diagram.
2. Set VAK to 10V using RPS1
3. Increase Gate Current using RPS2till the VAK suddenly drops down. Note the gate
current at this point. This is known as firing current.
pa
4. Set the firing current in IG.
5. Increase the Anode voltage using RPS1 in steps so that both IA increases. Note down
change in VAK.
6. Note the maximum IA. This is known as Holding current (IH).
jin

7. Remove the Gate terminal (ie). Make the gate open.

8. Anode current drops now and reaches minimum which is called Latching current
(IL).

TABULAR COLUMN:
.re

VAK= v IA (mA) I G (mA)

Before Firirng
w

At Firing
w

After Firirng
w

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MODEL GRAPH:

IA

IH

om
IL

VAK
VBO

.c
ul
pa
PRE REQUISITE:

1. What is an SCR?
2. What are the methods to trigger ON SCR?
jin

3. What is meant by break over voltage of SCR?

4. What is meant by holding current and latching current in SCR?
5. SCR a unidirectional or bidirectional device.

REVIEW QUESTIONS:
.re

1. What is meant by Valley Point and Peak point

2. After triggering an SCR, the gate pulse is removed. What is the state (ON or OFF)
of the device at this condition? Justify our answer
w

3. Why is Peak Reverse Voltage Important?

4. What is asymmetrical SCR?
5. What is the difference between SCR and TRIAC?
w

RESULT:
w

Thus the characteristics of the SCR is drawn.

Forward break over voltage =

Latching Current =
Holding Current =

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Ex.No:7
CLIPPER AND CLAMPER
AIM:
To construct and study the operation of clipper and clamper circuits.

APPARATUS REQUIRED:

om
S.No COMPONENTS RANGE/SPECIFICATION QUANTITY
1. Resistor 4.7KΩ,100KΩ 1each
2. Capacitor 0.1µf 1

.c
3. Diode IN4001 1
4. AFG 1MHz 1
5. CRO 30MHz 1
6.
7.
Bread Board
Regulated power
ul (0 – 30 )V
1
1
pa
supply

THEORY:
jin

The basic action of a clipper circuit is to remove certain portions of the

waveform, above or below certain levels as per the requirements. Thus the circuits which
are used to clip off unwanted portion of the waveform, without distorting the remaining
.re

part of the waveform are called clipper circuits or Clippers. The half wave rectifier is the
best and simplest type of clipper circuit which clips off the positive/negative portion of the
input signal. The clipper circuits are also called limiters or slicers.
w

PROCEDURE
w

Clipper Circuit
w

1. Connect the components and apparatus as shown in the circuit diagram.

2. Set input, sinusoidal signal of 8Vp-p and 1 kHz frequency and the reference voltage as
2V using RPS.
3. Observe the output across the diode using CRO.
4. Plot the input and output signal in a linear graph.

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NEGATIVE PEAK CLIPPER

om
MODEL GRAPH

.c
ul
pa
jin
.re
w
w

Theoretical calculations:

Vr=2v, Vγ=0.6v
w

When the diode is forward biased Vo =-(Vr+ Vγ) = -(2v+0.6v )= -2.6v

When the diode is reverse biased the Vo=Vi

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PROCEDURE

Clamper Circuit

1. Connect the components and apparatus as shown in the circuit diagram.

2. Set input, sinusoidal signal of 8Vp-p and 1kHz frequency
3. Observe the output across the load resistance using CRO.
4. Plot the input and output signal in a linear graph.

om
CIRCUIT DIAGRAM

POSITIVE CLAMPER

.c
ul
pa
jin
.re
w
w
w

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CIRCUIT DIAGRAM

NEGATIVECLAMPER

om
.c
ul
pa
jin
.re
w
w
w

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PRE REQUISITE

1. What is clipper?
2. What is clamper?
3. Difference between clipper and clamper?
4. What are different types of clampers?
5. Positive base and negative base clippers means

REVIEW QUESTIONS:

om
1. How does a clamper circuit add a dc level to the output voltage?
2. What I do you mean by biased and combinational clipper?
3. What are the classifications of a clipper circuit?
4. Why capacitors are used in clampers?

.c
5. What happens in the output waveform if the polarity of capacitor is changed in the
clampers

ul
pa
jin
.re
w
w
w

RESULT:

Thus the clipper and clamper circuits are designed and the output waveforms are
observed.

31
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Ex.No:8

VERIFICATION OF THEVENIN’S & NORTON’STHEOREM

AIM:
a. To verify the Thevenin’s theorem for the given electric circuit.
b. To verify the Norton’s theorem for the given circuit.

THEVENIN’S THEOREM

om
STATEMENT:

A one port linear, active, resistive network which contains one or more voltage or
current sources can be replaced by a single voltage source Vth in series with a single
resistance Rth. Vth is equal to the open circuit voltage across the port terminals of the

.c
network & the resistance Rth is measured between the port terminals with all the energy
sources replaced by their internal resistance. Rth
A

ul
A
COMPLEX
ACTIVE  Vth
NETWORK
pa
B

Where, B
Rth - Thevenin’s resistance. Vth -Thevenin’s voltage.
jin

APPARATUS REQUIRED:

S.No Name Range Qty

.re

1 R.P.S (0-30) V 1
2 Ammeter 0-50 mA 2
3 Voltmeter 0 – 25V 2
4 Connecting wires
5 Resistors 1K, 2.2K3.3K,4.7K,6.8K,10K Each 2
w

6 Breadboard 1

PROCEDURE:
w

1. To Find Vth :( Under open circuit the load resistance)

w

a) Connections are made as per the circuit diagram.

b) Switch on the power supply and note down the voltmeter readings Vth.

2. To Find Rth (Under short circuit Voltage source)

a) Connections are given as per the circuit diagram.
b) Switch ON the Power supply.
c) Vary the R.P.S to fixed voltage, note down the ammeter and voltmeter
readings.
d) Repeat the step (ii) for various R.P.S voltage and tabulate the readings.

32
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3. To Find IL
a) Connections are given as per the circuit diagram.
b) Switch ON the power supply.
c) Vary the R.P.S. to the given voltage and note down the ammeter reading
(IL).

CIRCUIT DIAGRAM: I

om
.c
To find Rth:

ul
pa
jin
.re

Thevinin’s Equivalent Circuit:

w

Rth
w

Vth
Vth RL IL = -----------
w

RTH + RL

33
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TABULATION:

Specified voltage Theoritical Practical

S.No Vth Rth IL Vth Rth IL
(Volts)

om
CIRCUIT DIAGRAM: II

.c
ul
pa
CIRCUIT DIAGRAM: III
jin
.re

B. NORTON’S THEOREM
w

Statement:
A one port linear, active, resistive network which contains one or more voltage or
current sources can be replaced by a single current source ISC in parallel with a single
w

resistance Rth. ISC is equal to the short circuit current across the port terminals of the
network & the resistance Rth is measured between the port terminals with all the energy
sources replaced by their internal resistance.
w

Linear A
Active Rth RL
Network B Isc

Where,
ISC – Short circuit current at terminals A & B
Rth– Thevenin’s equivalent Resistance.

34
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Apparatus Required:

S.No Name Range Qty

1 R.P.S (0-30) V 1
2 Ammeter 0 – 50mA 2
3 Voltmeter 0-25 V 2
4 Connecting wires
5 Resistors 1K, 2.2K,4.7K,6.8K Each 2
6 Breadboard 1

om
Procedure:
1. To find ISC(short circuit the load resistance)
a) Connections are made as per the circuit diagram.
b) Note down the ammeter reading (ISC)

.c
2. To find Rth(short circuit the voltage source)
a) Connections are made as per the circuit diagrams
b) Supply is switched ‘ON’
c) Vary the R.P.S to the specified voltage, note down the ammeter and

ul
voltmeter readings.
d) Repeat the step 3 for various R.P.S voltage and the readings are
tabulated.
pa
e) Calculate the RTh using the tabulation.
3. To Find IL
a) Connections are given as per the circuit diagram.
b) Switch ON the power supply.
jin

c) Vary the R.P.S. to the specified voltage and note down the
ammeter reading (IL).
Circuit diagram:

2.2 KΩ R1 R3 1KΩ
.re

+
w

V (0-30v) R2 RL
- 2.2KΩ
1KΩ
w
w

Theoretical Verification:

To Find ISC:
R1 R3

RPS
(0-30V) +
_ R2

I1 I2
35
 www.rejinpaul.com

R1 + R2 - R2

1 = - R2 R2 + R3

R1 + R2 - R2

om
2 = - R2 0

ISC = I2 = 2 / 

.c
To Find RTH:

ul
R1 R3
pa
R2
RTH:
jin

RTH= (R1.R2) + R3
R1+R2

To Find Isc:
.re

R1 R3
w

RPS
(0-30V) + +
_ R2
Isc (0 – 5 mA)
w

I1 I2
-
w

To Find IL:

RTH
ISC RTH RL IL = ISC ---------
RL + RTH

36
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To Find IL:

2.2 KΩ R1 R3 1KΩ

+ IL
A (0-5 mA)
+ -
V (0-30V) R2 RL
- 2.2KΩ

om
1KΩ

Tabulation:

.c
Specified voltage Theoritical Practical
S.No Isc Rth IL Isc Rth IL
(Volts)

ul
pa
CIRCUIT DIAGRAM: II
jin
.re
w

CIRCUIT DIAGRAM: III

w
w

37
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PRE REQUISITE

1. How Rth is obtained in any circuit for applying Thevenin’s and Norton’s theorem?
2. What is Vth or Thevenin’s voltage?
3. How Vth is obtained in any circuit for applying Thevenin’s theorem?
4. What is IN or Norton’s current?
5. How IN is obtained?

Review Questions:

om
1. State Thevenin’s & Norton’s theorem.
2. Draw the Thevenin’s & Norton’s equivalent circuit for
3. What is duality theorem?
4. Explain dependent sources and sources transformation.

.c
5. Explain Star-Delta conversion

ul
pa
jin
.re
w
w
w

RESULT:

Thus the Thevenin’s & Norton’s theorems are verified.

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Ex.No.9

VERIFICATION OF KIRCHOFFS CURRENT LAW AND

KIRCHOFF’S VOLTAGE LAW.
Aim:
(a) To verify the Kirchoff’s current law.
(b) To verify the Kirchoff’s voltage law.

Statement:

om
Kirchhoff’s Current Law:

The algebraic sum of all the currents at any junction in an electric circuit is zero.
In other words, the sum of the current flowing towards a junction is equal to the sum of the
currents flowing away from it.

.c
Kirchhoff’s Voltage Law:

ul
In any closed circuit, the algebraic sum of all the electromotive forces and the potential
drops is equal to zero. In other words, for any closed path in a network, the algebraic sum
of voltages is zero.
pa
(i.e) sum of voltage drops = sum of voltage rises.

Apparatus Required:
jin

S.No Name Specification Qty

1 R.P.S (0-30V)
2 Ammeter 0 – 50mA 1
3 Voltmeter 0 – 25V 1
.re

4 Connecting wires
5 Bread Board
6 Resistors 100Ω, 560Ω, 470Ω, Each 2
2.2K,3.3K,4.7K
w
w
w

PROCEDURE (Both KCL & KVL)

1. Connections are made as per the circuit diagram.

2. Switch on the power supply.
3. Vary the R.P.S to a specified voltage and note down the corresponding ammeter
and voltmeter readings.
4. Repeat the step 3 for various R.P.S voltage and tabulate the readings.
5. Switch off the power supply and remove the connections.

39
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Model circuit of KVL:

I R1 (100Ω) R2 (560Ω)

+ - + -
v
V1 V2
RPS
(0-15V) (0-5)V (0-10)V

om
.c
V = IR1 + IR2
V = V1 + V2

ul
TABULATION:

S.No Vs(Volts) V1(Volts) V2(Volts) Vt=V1+V2(Volts)

pa
jin

Model Circuit of KCL:

+ -
I A
.re

(0-50)mA I1 + +
A2
(0-5)mA A1 I2
(0-5)mA
RPS + - -
(0-30V) -
w

R1 = 470Ω R2 = 1KΩ
w

V = I1R1 = I2R2
At the Junction A:
w

I = I1 + I2
TABULATION:

S.No Vs(volts) I(A) I1(A) I2(A) I= I1+ I2(A)

40
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Practical circuit Diagrams:

1. For the circuit shown in figure, compute the value of currents I1, I2, I3, I4, and I5 by using
KVL and KCL. Verify the results
experimentally.

om
TABULATION:

.c
KVL :

S.No Vs(Volts) V1(Volts) V2(Volts) V3(Volts) V4(Volts) V5(Volts)

ul
pa
Loop1: 15 =V1+V2
Loop2: V2=V3+V4
jin

Loop3: V3=V5

KCL:
S.No Vs(Volts) I1(A) I2(A) I3(A) I4(A) I5(A)
.re
w

I1= I2+I3
I3=I4+I5
w

2. .For the circuit given, find the values of currents I1, I2, and I3 using KVL and KCL.
w

41
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TABULATION:
KVL:

S.No Vs(Volts) V1(Volts) V2(Volts) V3(Volts) V4(Volts) V5(Volts)

om
LOOP1: 20 = V1+V2; LOOP2: V2=V3+V4+15; LOOP3: 15+V4=V5

KCL:

S.No Vs(Volts) I1(A) I2(A) I3(A) I4(A) I5(A)

.c
I1=I2+I3; I3=I4+I5

ul
pa
3. .For the circuit shown in the figure determine the values of currents I1, I2and I3using KVL and KCL
jin
.re

TABULATION:
w

S.No Vs(Volts) V1(Volts) V2(Volts) V3(Volts) V4(Volts) V5(Volts)

w
w

KVL:
Loop 1:10 = V1+V2; Loop 2:V2= V3+V4 -15; Loop: 3 V5=V1+V3

S.No Vs I1 I2 I3 I4 I5

42
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Preparatory Questions

1. State KCL and KVL.

2. What is meant by short circuit and open circuit?
3. Two resistances with the value of R1, R2 are connected in i) series and ii) parallel.
What is the equivalent resistance?
4. Two inductors with the value of L1, L2 are connected in i) series and ii) parallel.
What is the equivalent inductance?
5. Two capacitors with the value of C1, C2 are connected in i) series and ii) parallel.

om
What is the equivalent capacitance?

REVIEW QUESTIONS:

.c
1. Define Resistance, Inductance and capacitance.
2. Color coding of resistor.

ul
3. Define active and passive elements
4. Define Unilateral and Bilateral elements.
5. Define linear and Non-Linear elements.
pa
jin
.re
w
w
w

RESULT:

Thus the Kirchoff’s current law and Kirchoff’s voltage law are verified.

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Ex.No:10

VERIFICATION OF SUPERPOSITION THEOREM

Aim:
To verify the superposition theorem for the given electric circuit.

Statement:

om
In a linear lumped element, bilateral electric circuit energized by two or more
sources, the current in any resistor is equal to the algebraic sum of the separate currents in
each resistor when each source act, separately.

The Voltage sources are short-circuited and the current sources are open circuited in

.c
order to replace the other sources by their respective internal resistances.

Apparatus Required:

S.No
1 R.P.S
Name

ul Range
(0-30) V
Qty
1
pa
2 Ammeter 0 -50 mA 1
3 Voltmeter 0 – 25 V 1
4 Connecting wires
5 Resistors 10K, 22K,5.8K Each 2
jin

6 Breadboard 1

Procedure:
.re

To Find I, I1& I2:

1. Connections are given as per the circuit diagram.

2. Switch on the power supply.
3. Vary the RPS to the given voltage and note down the ammeter readings
w

for fig (1), fig (2) & fig (3).

(a) When both VS1& VS2 are active

w
w

44
 www.rejinpaul.com

(b) When VS1 acts alone

om
(c) When VS2 acts alone

.c
ul
pa
jin

TABULAR COLUMN:
Theoritical Practical
VS1 VS2
I I1 I2 I = I1 + I2 I I1 I2 I = I1 + I2
.re

(volts) (volts)
(mA) (mA) (mA) (mA) (mA) (mA) (mA) (mA)
w

PRACTICAL CIRCUIT II:

w

Find the current in the 2.2 k Ω resistor between A & B for the network using superposition theorem. Verify
the results experimental
w

45
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PRACTICAL CIRCUIT III:

Find the current in the 4.7 k Ωresistor between A and B for the network using superposition theorem.

om
PRE REQUISITE

.c
1. Define Lumped and distributed elements
2. Define ohm’s law
3. What is the equivalent resistance for the resistor if it is connected in series and

ul
parallel
4. What is the equivalent Capacitance for the capacitor if it is connected in series and
Parallel
pa
5. What is the equivalent Inductance for the Inductor if it is connected in series and
parallel

Review Questions:
jin

1. State superposition theorem.

2. What is duality theorem?
3. Explain dependent sources and sources transformation.
.re

4. Explain Star-Delta conversion

5. State voltage division rule & State current division rule.
w
w
w

Result:

Thus the superposition theorem is verified.

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Ex.No:11

VERIFICATION OF MAXIMUM POWER TRASNFER AND

RECIPROCITY THEOREM
Aim:
a. To practically verify the maximum power transfer theorem for the network with the
theoretical value.
b. To practically verify the reciprocity theorem for the network with the theoretical

om
calculation.

THEORY:

Maximum power transfer theorem:

.c
This theorem states that maximum power will be delivered from a voltage source to a load
when the load resistance is equal to the internal resistance of the source.

ul
V2th
Max. Power transferred = -----------
4 Rth
pa
Apparatus Required:

S.No Name Range Qty

jin

1 R.P.S (0-30) V 1
2 Ammeter 0 – 50 mA
3 Voltmeter 0 – 25V
4 Connecting wires
.re

5 Resistors 1K, 2.2K,4.7K,6.8K Each 2

6 Breadboard 1

a. MAXIMUM POWER TRANSFER THEOREM:

w

PROCEDURE:
w

1. Remove the portion of network through which power has to be transferred.

2. Name those terminals as A and B.
3. Calculate Rth by substituting all sources with internal resistance working back at network
w

4. Give the connections as per the circuit diagram.

5. By varying the DRB (RL) for values of RL, measure the current through RL.
6. Calculate the power delivered to RL.
7. Verify resistance (RL) at PL (max) is equal to Rth.

47
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CIRCUIT DIAGRAM:
R1=1K
30V

RL +
+
30V V (0-5V)
- R2=2.2K
K30V

om
-
(0-10K)

.c
TABULATION
Experimental values:
RLΩ Vth(v) P=Vth2/4RL

ul
(w)
pa
Model Graph:
jin

Pmax
.re

V
w

Practical circuit II:

w

Determine the value of RL using maximum power transfer theorem and also find the power transferred to
the load. Verify the results experimentally.
w

48
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Practical circuit III:

Determine the value of RL using maximum power transfer theorem and also find the power transferred to
the load.

om
.c
Reciprocity Theorem:

In any linear bilateral network the ratio of voltage to current response, in any

ul
element to the input is constant even when the position of the input and output are
interchanged.
pa
Apparatus Required:

S.No Name Range Qty

1 R.P.S (0-30) V 1
2 Ammeter 0 – 50 mA 1
jin

3 Voltmeter 0 – 25V 1
4 Connecting wires
5 Resistors 1K, 2.2K,4.7K,6.8K Each 2
6 Breadboard 1
.re

Procedure:

1. Connections are given as per the circuit diagram.

w

2. Note down the ammeter reading and find the ratio of the output current and input
voltage.
3. Interchange the position of ammeter and the voltage source.
w

4. Note down the ammeter reading and find the ratio of the output and input voltage.
5. Compare this value with the value obtained in step 2.
w

49
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CIRCUIT DIAGRAM: ORIGINAL NETWORKS

940 ΩR1100 Ω R3

I
+ (0-30) V 470 Ω 100 Ω
R2 R4

- _

om
Circuit 1: To Measure the Load Current

940 Ω R1 100 Ω R3

.c
ITI
+ (0-30) V 470 Ω 100 Ω
R2 R4

ul
- _ + (0-30)mA
A
-
pa
Req = (R3+R4)* R2
------------------------- + R1
jin

(R3+R4) + R2

IT = V/ Req
.re

I = IT * R2
------------------
((R3+R4) + R2)
w

TABULATION

Experimental values: Theoretical values:

w

V (Volts) I (mA) Z = V/I V (Volts) I (mA) Z = V/I

w

0 0

2 2

4 4

6 6

50
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Circuit 2: After Interchanging Positions of V and I

940Ω R1 100 Ω R3

IIT
100 Ω
+ 470 Ω R4
A (0-30mA) R2 +
(0-30)V
- -

om
Req = R1* R2
------------------+ R3+R4
R1+R2

.c
IT = V/ Req

I= IT * R2

ul
----------------
R1+R2

TABULATION
pa
Experimental values: Theoretical Values

V (Volts) I (mA) Z = V/I V (Volts) I (mA) Z = V/I

jin

0 0

2 2

4 4
.re

6 6

PRACTICAL CIRCUIT II:

w

Obtain current flowing through the 1.2 k Ωin the circuit and verify the reciprocity theorem.
w
w

51
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PRE REQUISITE

1. Define duality
2. What is transient state?
3. What is transient time?
4. What is natural response?
5. What is transient response?

Review Questions:

om
1. State Maximum Power transfer theorem.
2. State reciprocity theorem?
3. What is duality theorem?
4. Explain dependent sources and sources transformation.
5. Explain Star-Delta conversion

.c
ul
pa
jin
.re
w
w
w

RESULT:

Hence the maximum power transfer and reciprocity theorem for the given networks
are practically verified.

52
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Ex.No:12
FREQUENCY RESPONSE OF SERIES AND PARALLEL
RESONANCE CIRCUITS

Aim:
To plot the current vs frequency graph of series and parallel resonance circuits and
hence measure the bandwidth, resonant frequency.

om
Apparatus Required:

Sl. Name Range Qty

No
1. Signal Generator 2MHz 1

.c
2. CRO 30MHz 1
3. Connecting Wires
4. Resistors 1K, 470Ω,100Ω 1 each

ul
5. Capacitors 0.01uF, 0.1µf 2

6. Inductors 99mH, 300mH 1

pa
7. Bread Board 1

Circuit Description For RLC Series Circuit:

jin

A circuit is said to be in resonance when applied voltage V and current I are

in phase with each other. Thus at resonance condition, the equivalent complex
impedance of the circuit consists of only resistance (R). So current is maximum.
Since V and I are in phase, the power factor is unity.
.re

When the frequency is equal to complex impedance

V = R + j (XL – XC)
Where
XL = L
w

XC = 1/C
w

Resonance Curve:
The curve between current and frequency is known as resonance curve. The shapes
w

of such curve for of R as shown in fig(1). For smaller values of R, current Vs frequency
wave is sharply peak, but for larger values of R, it is flat.

Bandwidth of a Resonance Circuit:

Bandwidth of a circuit is given by the band of frequencies which lies between two
points on either side of resonance frequency, where current falls through 1/1.414 of the
maximum value of resonance. Narrow is the bandwidth, higher the selectivity of the circuit.

53
 www.rejinpaul.com

As shown in fig, the bandwidth AB is given by F2 – F1. F1 is the lower cut off frequency
and F2 is the upper cut off frequency.

Q - Factor:
In the case of a RLC series circuit, it is defined as equal to the voltage
magnification in the circuit at resonance. At resonance, current is maximum. Io= V/R.

om
The applied voltage V = IoR
Voltage magnification = VL/V = IoXL

In the case of resonance, high Q factor means not only high voltage, but also

.c
higher sensitivity of tuning circuit. Q factor can be increased by having a coil of
large inductance, not of smaller ohmic resistance.

ul
Q = L / R

Procedure:
pa
1. Connections are made as per the circuit diagram.

2. By varying the frequency and note down the corresponding meter

reading.
jin

3. Draw the current VS frequency curve and measure the bandwidth,

resonance frequency and Q factor.
.re

RLC Parallel Resonance Circuit:

w

99mH
w

1KΩ
0.01μF
1K
w

F=1 KHz 470Ω CRO

Vi=2V

54
 www.rejinpaul.com

RLC Series Resonance Circuit:

300mH 0.1μF

F=1 KHz 100Ω CRO

om
Vi=2V

.c
Series Resonance Curve:

ul
I (mA)

I max E / R
pa
A B
0.707 E/R
jin

B.W
.re

f (Hz)
F1 F0 F2
Bandwidth B. W = F2 – F1
Resonant Frequency = F0
Parallel Resonance Curve:
w

I (mA)
w
w

A B
0.707 E/R

I min E / R
B.W
f (Hz)
F1 F0 F2

55
 www.rejinpaul.com

Tabulation:

Series circuit: Parallel circuit:

Input Voltage: V Input Voltage: V

S.No Frequency Output Current S.No Frequency Output Current

(Hertz) Voltage (mA) (Hertz) Voltage (mA)
(V) (V)

om
.c
ul
pa
PRE REQUISITE
1. What is a parallel resonant circuit?
jin

2. What is a series resonant circuit?

3. What are tuned circuits?
4. When the circuit is said to be in resonance?
5. What is resonant frequency?
.re

Review Questions:
1. Explain series resonance.
2. Define Q factor.
w

3. What is coefficient of coupling?

4. What is transient response?
5. Briefly explain the series & parallel connection of independent source.
w
w

Result:
Thus the frequency curve of series and parallel circuits are drawn.

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Ex.No:13

TRANSIENT ANALYSIS OF RL & RC CIRCUITS

AIM: To construct and verify the output waveforms of differentiator and integrator circuit

APPARATUS REQUIRED:

S.No COMPONENTS RANGE QUANTITY

om
1 Resistor 10kΩ 1
2 Capacitor 0.01μF 1
3 AFG (0-1 )MHz 1
4 CRO (0 – 30 )MHz 1
5 Bread Board 1

.c
THEORY:

ul
The RC linear network used for wave shaping circuit based on input
frequency is divided as High Pass Filter and Low Pass Filter. The High pass filter acts as
pa
differentiator when the time constant is very low. The Low pass filter circuit with a very
high time constant acts as an integrator.
PROCEDURE:
jin

1. Connect the components and apparatus as shown in the circuit diagram.

2. For Differentiator set sinusoidal input of 4 volts and 200Hz and verify the output
using CRO. Repeat it with square waveform as an input.
.re

3. For Integrator set sinusoidal input of 4 volts and 5 kHz and verify the output using
CRO. Repeat it with square waveform as an input.
4. Plot the input and output waveform for differentiator and integrator in linear graph.
w

CIRCUIT DIAGRAM
w

INTEGRATOR
w

57
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MODEL GRAPH

om
.c
ul
pa
jin
.re
w
w
w

58
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CIRCUIT DIAGRAM

DIFFERENTIATOR

om
MODEL GRAPH

.c
ul
pa
jin
.re
w
w
w

59
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PRE REQUISITE

1. Give the expression for quality factor of series RLC Circuit.

2. Give the expression for quality factor of parallel RLC Circuit.
3. What is the formula to find the power factor in a three phase circuits.

om
4. What is the formula to find the reactive power in three phase circuits?
5. What is the advantage of using three phase rather than using three single phase circuits?

.c
REVIEW QUESTIONS:

1. How high pass RC circuit is used as a differentiator?

ul
2. How low pass RC circuit is used as an integrator?
3. What should be the input for an integrator circuit to obtain the ramp signal in the output?
pa
4. What will be time constant of an integrator to obtain saw tooth waveform in the output?
5. What is the formula to verify the output of an integrator and a differentiator circuit?
jin
.re
w
w
w

RESULT:

Thus the integrator and the differentiator circuit operation are verified for
the square and sine wave input.

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