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Cpuid: History

The CPUID instruction allows software to discover details of the processor such as the processor type and supported features. It returns the manufacturer ID string and highest supported CPUID value in registers. Later calls to CPUID with the EAX register set to values up to the highest value return additional details like cache sizes and topology information.
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0% found this document useful (0 votes)
145 views4 pages

Cpuid: History

The CPUID instruction allows software to discover details of the processor such as the processor type and supported features. It returns the manufacturer ID string and highest supported CPUID value in registers. Later calls to CPUID with the EAX register set to values up to the highest value return additional details like cache sizes and topology information.
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CPUID

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This article needs to be updated. Please update this article to reflect
recent events or newly available information. (July 2014)

In the x86 architecture, the CPUID instruction (identified by a  CPUID  opcode) is


a processor supplementary instruction (its name derived
from CPU IDentification) allowing software to discover details of the processor.
It was introduced by Intel in 1993 with the launch of the Pentium and SL-
enhanced 486 processors.[1]
A program can use the  CPUID  to determine processor type and whether
features such as MMX/SSE are implemented.

Contents

 1History
 2Calling CPUID
o 2.1EAX=0: Highest Function Parameter and Manufacturer ID
o 2.2EAX=1: Processor Info and Feature Bits
o 2.3EAX=2: Cache and TLB Descriptor information
o 2.4EAX=3: Processor Serial Number
o 2.5EAX=4 and EAX=Bh: Intel thread/core and cache topology
o 2.6EAX=6: Thermal and power management
o 2.7EAX=7, ECX=0: Extended Features
o 2.8EAX=7, ECX=1: Extended Features
o 2.9EAX=80000000h: Get Highest Extended Function Implemented
o 2.10EAX=80000001h: Extended Processor Info and Feature Bits
o 2.11EAX=80000002h,80000003h,80000004h: Processor Brand String
o 2.12EAX=80000005h: L1 Cache and TLB Identifiers
o 2.13EAX=80000006h: Extended L2 Cache Features
o 2.14EAX=80000007h: Advanced Power Management Information
o 2.15EAX=80000008h: Virtual and Physical address Sizes
o 2.16EAX=8FFFFFFFh: AMD Easter Egg
 3CPUID usage from high-level languages
o 3.1Inline assembly
o 3.2Wrapper functions
 4CPU-specific information outside x86
 5See also
 6References
 7Further reading
 8External links

History[edit]
Prior to the general availability of the  CPUID  instruction, programmers would
write esoteric machine code which exploited minor differences in CPU behavior
in order to determine the processor make and model. [2][3] With the introduction of
the 80386 processor, EDX on reset indicated the revision but this was only
readable after reset and there was no standard way for applications to read the
value.
Outside the x86 family, developers are mostly still required to use esoteric
processes (involving instruction timing or CPU fault triggers) to determine the
variations in CPU design that are present.
In the Motorola 680x0 family — that never had a CPUID instruction of any kind
— certain specific instructions required elevated privileges. These could be
used to tell various CPU family members apart. In the Motorola 68010 the
instruction MOVE from SR became privileged. This notable instruction (and
state machine) change allowed the 68010 to meet the Popek and Goldberg
virtualization requirements. Because the 68000 offered an unprivileged MOVE
from SR the 2 different CPUs could be told apart by a CPU error condition being
triggered.
While the  CPUID  instruction is specific to the x86 architecture, other
architectures (like ARM) often provide on-chip registers which can be read in
prescribed ways to obtain the same sorts of information provided by the x86
CPUID instruction.

Calling CPUID[edit]
The  CPUID  opcode is 0Fh, A2h (as two bytes, or A20Fh as a single word).
In assembly language, the  CPUID  instruction takes no parameters
as  CPUID  implicitly uses the EAX register to determine the main category of
information returned. In Intel's more recent terminology, this is called the CPUID
leaf.  CPUID  should be called with  EAX = 0  first, as this will store in the EAX
register the highest EAX calling parameter (leaf) that the CPU implements.
To obtain extended function information  CPUID  should be called with the most
significant bit of EAX set. To determine the highest extended function calling
parameter, call  CPUID  with  EAX = 80000000h .
CPUID leaves greater than 3 but less than 80000000 are accessible only when
the model-specific registers have IA32_MISC_ENABLE.BOOT_NT4 [bit 22] = 0
(which is so by default). As the name suggests, Windows NT 4.0 until SP6 did
not boot properly unless this bit was set,[4][dead link] but later versions of Windows do
not need it, so basic leaves greater than 4 can be assumed visible on current
Windows systems. As of July 2014, basic valid leaves go up to 14h, but the
information returned by some leaves are not disclosed in publicly available
documentation, i.e. they are "reserved".
Some of the more recently added leaves also have sub-leaves, which are
selected via the ECX register before calling CPUID.
EAX=0: Highest Function Parameter and Manufacturer ID[edit]
This returns the CPU's manufacturer ID string – a twelve-character ASCII string
stored in EBX, EDX, ECX (in that order). The highest basic calling parameter
(largest value that EAX can be set to before calling  CPUID ) is returned in EAX.
Here is a list of processors and the highest function implemented.
Highest Function Parameter

Processors Basic Extended

CPUID Not
Earlier Intel 486
Implemented

Not
Later Intel 486 and Pentium 0x01
Implemented

Not
Pentium Pro, Pentium II and Celeron 0x02
Implemented

Not
Pentium III 0x03
Implemented

Pentium 4 0x02 0x8000 0004

Xeon 0x02 0x8000 0004

Pentium M 0x02 0x8000 0004

Pentium 4 with Hyper-Threading 0x05 0x8000 0008

Pentium D (8xx) 0x05 0x8000 0008

Pentium D (9xx) 0x06 0x8000 0008

Core Duo 0x0A 0x8000 0008

Core 2 Duo 0x0A 0x8000 0008

Xeon 3000, 5100, 5200, 5300, 5400 series 0x0A 0x8000 0008
Core 2 Duo 8000 series 0x0D 0x8000 0008

Xeon 5200, 5400 series 0x0A 0x8000 0008

Atom 0x0A 0x8000 0008

Nehalem-based processors 0x0B 0x8000 0008

IvyBridge-based processors 0x0D 0x8000 0008

Skylake-based processors (proc base & max freq; Bus ref.


0x16 0x8000 0008
freq)

System-On-Chip Vendor Attribute Enumeration Main Leaf 0x17 0x8000 0008

The following are known processor manufacturer ID strings:

 "AMDisbetter!" – early engineering samples of AMD K5 processor


 "AuthenticAMD" – AMD
 "CentaurHauls" – IDT WinChip/Centaur (Including some VIA CPU)
 "CyrixInstead" – Cyrix/early STMicroelectronics and IBM
 "GenuineIntel" – Intel
 "TransmetaCPU" – Transmeta
 "GenuineTMx86" – Transmeta
 "Geode by NSC" – National Semiconductor
 "NexGenDriven" – NexGen
 "RiseRiseRise" – Rise
 "SiS SiS SiS " – SiS
 "UMC UMC UMC " – UMC
 "VIA VIA VIA " – VIA
 "Vortex86 SoC" – DM&P Vortex
 "  Shanghai  " – Zhaoxin
 "HygonGenuine" – Hygon
 "E2K MACHINE" – MCST Elbrus

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