GMI German-Malaysian Institute

D I P L O M A P R O G R A M M E

E-ASSIGNMENT
Academic Period : July 2020

Code EET 0133 Course Name Digital System

Title E-Assignment July 2020 Examiner

Name Program/
Group

Level of Full
No Assessment Criteria CLO PO Score Marks Comment
Diff Marks
1 Design of Multiplexer circuit 4 1 C3 25
Explain Noise margin and the
2 1 1 C2 25
application
3 Solve for DAC Application 1 1 C3 25
4 Discover Code converter 4 1 C3 25

Total 100
Total Marks
PO 1 100
Total PO

Signature
 EET0133 E- ASSIGNMENT DIGITAL SYSTEM

Answer ALL question.

Plagiarism and total copying is considered cheating and will be treated as violation of
examination and strict action will be taken if the student is found guilty.

QUESTION 1 (25 Marks)

Multiplexer have many other uses besides functioning as data selectors. Another important role
of a multiplexer is for implementing combinational logic circuits. Multiplexers also can be used to
implement various logic functions.

I. Discuss the CMOS and TTL Multiplexers.

II. A door system is to be designed. The door will only open if AT LEAST 2 of the 3 buttons
are press simultaneously.

i. Develop the truth table for the output F in terms of the inputs A, B and C.
ii. From the truth table obtained, design the logic circuit for the above system using
a single 4-to-1 MUX.

III. Adders are used to perform arithmetic operation in a Central Processing Unit (CPU). You
are required to design a Half-adder using 2-to-1 Multiplexer. There are two (2) inputs for
a Half-Adder, while there is only (1) select input for the 2-to-1 Multiplexer.

i. Tabulate the truth table for both devices.

ii. Label your devices (input, output and enable input if applicable) clearly.

QUESTION 2 (25 Marks)

Logic gates are classified not only by their logical functions, but also by their logical families. In
any implementation of a digital system, an understanding of a logic element's physical capabilities
and limitations, determined by its logic family. The logic family refers to the general physical
realization of a logical element, such as the transistor-transistor logic (TTL) and complementary
metal-oxide semiconductor (CMOS) logic families. Therefore,

I. Define DC logic noise margin. Give 1 family name of each TTL IC and CMOS IC.
II. Find a data sheet of TTL 7400 series or CMOS 7400 series. Perform the noise immunity
measurement.
III. Describe your above answers with illustration. Your illustration must be labelled with the
parameters in the data sheet.

(*Preferable manufacturer data sheet: Texas Instrument / ON Semiconductor/Motorola etc).

Please enclose the Table of DC characteristics and the link address of the data sheet in your
answer sheet.

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 EET0133 E- ASSIGNMENT DIGITAL SYSTEM

QUESTION 3 (25 Marks)

The DAC’s resolution (number of bits) determines how many possible voltages values the
computer can send to the valve. If a six-bit DAC is used, there will be 63 possible steps of 0.159
V between 0 and 10 V. When an eight-bit DAC is used, there will be 255 possible steps of 0.039
V between 0 and 10. The greater the number of bits, the finer the resolution (the smaller the
step size).

Figure 1 shows a computer controlling the speed of a motor. The 0- to 2-mA analog current from
the DAC is amplified to produce motor speeds from 0 to 1000 rpm (revolutions per minute).

Explain:

I. How many bits should be used if the computer is to be able to produce a motor speed
that is within 2 rpm of the desired speed?
II. Using the n- bit answer in (I), how close to 326 rpm and 250 rpm can the motor speed
be adjusted?

Figure 1: Motor control circuit

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 EET0133 E- ASSIGNMENT DIGITAL SYSTEM

QUESTION 4 (25 Marks)

One application of logic gates in digital systems is as code converters. Common codes used
are binary, BCD (8421), octal, hexadecimal, and decimal. Digital devices can process only 1 and
0 bits. However, it is difficult for humans to understand long strings of 1s and 0s. For that reason,
code converters are necessary to convert from the language of people to the language of the
machine. The encoder and decoder in digital system are electronic code translators. The encoder
can be thought of as translating from the language of people to the language of the machine.
The decoder does the opposite; it translates from machine language to human language.

I. With the aid of truth table, using your own words discuss 74HC147 Priority Encoder.
II. Explain THREE (3) types of decoder ICs you have learnt and discuss the differences
between them.

III. Refer to Figure 2 below,

i. produce the truth table for the decoder to display 0 to 9 only and construct a
circuit diagram for segment d of the 7-Segment display.
ii. determine the decimal number displayed on the 7-segment and the logic
level at each output ( a through g ) of the 4511 IC during
a. pulse a
b. pulse d

Figure 2: Decoder/driver pulse-train (active high)

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 NAME : ____________________________________ TRADE/SEM : ________________________________________
STUDENT ID : ____________________________________ DATE : ________________________________________

RUBRICS (QUESTION 1)

MARKS (M) WEIGHTED

MARKS
CRITERIA MARKS
ALLOCATED 1 2 3 4
OBTAINED

Inadequately Insightful and Clearly identifies and

Minimally identifies
Identification identifies and thorough appropriately
and discuss the
of TTL and describes the discussion the describes the TTL
5% differentiation of TTL M/4 x 5% =
CMOS differentiation of differentiation of and CMOS with good
and CMOS
Multiplexer TTL and CMOS TTL and CMOS understanding
Multiplexer
Multiplexer Multiplexer and observation.
Question
I and II

Complete truth
Truth table Only correct truth Complete truth table Complete truth table
table and circuit
and circuit 8% table with no circuit and circuit diagram and circuit diagram
diagram with M/4 x 8% =
diagram diagram with major correction with perfectly correct.
minimal correction.

Only correct both of

Complete both of
truth table with no Complete both of Complete both of
Truth table truth table and circuit
Question 12% circuit diagram/ truth table and circuit truth table and
and circuit diagram with M/4 x 12% =
III Correct one of the diagram with major circuit diagram with
diagram perfectly correct all
truth table with no correction minimal correction
the labels.
circuit diagram

TOTAL M/25%
2nd Assessor
EET0133 E- ASSIGNMENT DIGITAL SYSTEM

RUBRICS (QUESTION 2)

MARKS (M) WEIGHTED

MARKS
CRITERIA MARKS
ALLOCATED 1 2 3 4 5
OBTAINED
Correct At least 3 points
Moderate Correct elaboration
Description of elaboration with of elaboration
Inadequate elaboration and but wrong family
noise immunity/ 5% correct family and correct M/5 x 5% =
elaboration family types. types for TTL and
logic noise margin types for TTL family types for
CMOS
and CMOS. TTL and CMOS.

Correct data
Wrong data Correct data
No data sheet Wrong data sheet sheet and able
sheet and sheet and able to
Noise immunity 10% and unable to but able to relate manipulate with M/5 x 10% =
unable to relate manipulate data
measurement relate data. data. minor error.
data. perfectly.

Sufficient Complete
Sufficient
Moderate illustration with illustration with
illustration without
Inadequate illustration with label of label of
label of parameter
Knowledge skill 10% illustration and adequate parameter as in parameter as in M5 x 10% =
in data sheet. At
description. description. data sheet. At data sheet. At
least 3 points
least 4 points least 6 points
of description
of description. of description.
TOTAL M/25%

2nd Assessor

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 EET0133 E- ASSIGNMENT DIGITAL SYSTEM

RUBRICS (QUESTION 3)

CRITERIA MARKS MARKS (M) WEIGHTED

ALLOCATED MARKS
1 2 3 4 5 OBTAINED
Identification
Able to Able to identify
number of bits Unable to Able to slightly Able to identify
identify and and
on a given identify and identify and and understand
10% understand understand all M/5 x 10% =
situation with understand the understand the most of the
some of the of the main
brief explanation issues issues issues
issues issues

Determine the
Able to prove Able to prove
answer of Wrong answer Able to prove Able to prove
using using calculation
desired motor and unable to using using
10% calculation with correct M/5 x10% =
speed with the prove using calculation with calculation with
with some intention and
help of calculation major error 100% accuracy
minor error mostly accurate
calculation
Student
Student
Student demonstrates
Student does Student demonstrates
demonstrates moderate
not demonstrate demonstrates sound and
some grasp of level of
Knowledge skill the required sufficient level of deep
knowledge and knowledge
regarding both 5% knowledge and knowledge and knowledge with M/5 x 5% =
understanding and
problems understanding understanding good
level required understanding
level of the required of the understanding
of the subject required of
subject matter subject matter required of the
matter the subject
subject matter
matter
TOTAL M/25%
2nd Assessor

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 EET0133 E- ASSIGNMENT DIGITAL SYSTEM

RUBRIC (QUESTION 4)

MARKS (M) WEIGHTED

MARKS
CRITERIA MARKS
ALLOCATED 1 2 3
OBTAINED
Correct truth
table and able to Correct truth table and able to
Priority
3% Correct truth table only. explain 1 points explain at least 2 main points for M/3 x 3% =
encoders
for priority priority encoder.
encoder
Complete but
Only state the type of ICs decoder not thorough
Decoder ICs Insightful and thorough discussion
9% with little discussion discussion of the M/3 x 9% =
of the three types of ICs decoder.
three types of
ICs decoder
1 2 3 4 5
Complete truth
Complete truth Complete truth Complete truth
Truth table and Only correct table and set of
table and set of table and set of table with all
circuit diagram 5% truth table with gates for the M/5 x 5% =
gates for the gates for the correct set of
no circuit circuit with
circuit with major circuit with few gates for the
diagram minimal
correction. correction circuit.
correction.
1 2 3 4
Decimal and Only 12 correct Correct answer (7-
Only 4 correct points Only 8 correct points
logic level for 8% points – either 7- segment output
– either 7-segment – either 7-segment M/4 x 8% =
each output segment output display and logic
output displayed or output displayed or
displayed or logic level output) for 2
logic level output logic level output
level output different input pulse.

TOTAL M/25%

2nd Assessor

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