Application Report

SLUA606 – February 2012

bq30z50/55 Advanced Gas Gauge Circuit Design

Jackie Hui .............................................................................................. Battery Management Solutions

ABSTRACT
Components in the bq30z50/55 reference design are explained in this application report. Design analysis
and suggested tradeoffs are provided, where appropriate.

Contents
1 Introduction .................................................................................................................. 1
2 High-Current Path ........................................................................................................... 2
3 Gas Gauge Circuit .......................................................................................................... 4
4 Secondary-Current Protection ............................................................................................. 8
5 Secondary-Overvoltage Protection ...................................................................................... 12
6 Reference Design Schematic ............................................................................................ 13

List of Figures
1 bq30z50 Protection FETs .................................................................................................. 2
2 bq30z55 Protection FETs .................................................................................................. 3
3 FUSE Circuit ................................................................................................................. 3
4 Lithium-Ion Cell Connections .............................................................................................. 4
5 Sense Resistor .............................................................................................................. 4
6 Differential Filter ............................................................................................................. 5
7 Power Supply Decoupling ................................................................................................. 6
8 System Present ESD and Short Protection ............................................................................. 7
9 ESD Protection for SMB Communication ................................................................................ 7
10 FUSE Circuit ................................................................................................................. 8
11 Cell and BAT Inputs ........................................................................................................ 9
12 bq30z50 PACK and FET Control ........................................................................................ 10
13 bq30z55 PACK and FET Control ........................................................................................ 10
14 Thermistor Drive ........................................................................................................... 11
15 LEDs ........................................................................................................................ 12
16 PTC Thermistor ............................................................................................................ 12
17 bq29412 Cell Inputs and Time-Delay Capacitor....................................................................... 13
18 bq30z50 Schematic ....................................................................................................... 14
19 bq30z55 Schematic ....................................................................................................... 15

List of Tables

1 Introduction
The bq30z50 Advanced Gas Gauge has approximately 69 components in the reference design for a
four-thermistor, five-LED, four-cell application. The bq30z55 Advanced Gas Gauge has approximately 66
components—and no LEDs—for a two-thermistor, external pre-charge, four-cell application. Each device
is divided into the following classifications: High-Current Path, Gas Gauge Circuit, Secondary-Current
Protection and Cell-Balancing Circuit, and Secondary-Voltage Protection.

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This discussion is based on the four-cell reference design for the bq30z50/55 and bq29412 chipset.
Figure 18 shows the bq30z50 reference design schematic. Figure 19 shows the bq30z55 reference design
schematic.

2 High-Current Path
The high-current path begins at the PACK+ terminal of the battery pack. As charge current travels through
the pack, it finds its way through protection FETs, a chemical fuse, the lithium-ion cells and cell
connections, and the sense resistor, and then returns to the PACK– terminal (see Section 6). In addition,
some components are placed across the PACK+ and PACK– terminals to reduce effects from electrostatic
discharge.

2.1 Protection FETs

The N-channel charge and discharge FETs must be selected for a given application. Most portable battery
applications are a good match for the Si7114DN. The Vishay Si7114DN is an 18.3-A, 30-V device with
Rds(on) of 7.5 mΩ when the gate drive voltage is 10 V.
If a precharge FET is used, R15 (in bq30z50) or R28 (in bq30z55) is calculated to limit the precharge
current to the desired rate. Be sure to account for the power dissipation of the series resistor. The
precharge current is limited to (Vcharger – Vbat)/R15 and maximum power dissipation is (Vcharger –
Vbat)2/R15.
The gates of all protection FETs are pulled to the source with a high-value resistor between the gate and
source to ensure they are turned off if the gate drive is open.
Capacitors C16 and C17 help protect the FETs during an ESD event. The use of two devices ensures
normal operation if one of them becomes shorted. In order to have good ESD protection, the copper trace
inductance of the capacitor leads must be designed to be as short and wide as possible. Ensure that the
voltage rating of both C16 and C17 are adequate to hold off the applied voltage if one of the capacitors
becomes shorted.

Figure 1. bq30z50 Protection FETs

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Figure 2. bq30z55 Protection FETs

2.2 Chemical Fuse

The chemical fuse (Sony Chemical, Uchihashi, etc.) is ignited under command from either the bq29412
secondary voltage protection IC or from the FUSE pin of the gas gauge. Either of these events applies a
positive voltage to the gate of Q1, shown in Figure 3, which then sinks current from the third terminal of
the fuse, causing it to ignite and open permanently.
It is important to carefully review the fuse specifications and match the required ignition current to that
available from the N-channel FET. Ensure that the proper voltage, current, and Rds(on) ratings are used
for this device. The fuse control circuit is discussed in detail in Section 3.5.

To 2nd-Level Protector

To FUSE pin

Figure 3. FUSE Circuit

2.3 Lithium-Ion Cell Connections

The important thing to remember about the cell connections is that high current flows through the top and
bottom connections, and therefore the voltage sense leads at these points must be made with a Kelvin
connection to avoid any errors due to a drop in the high-current copper trace. The location marked 4P in
Figure 4 indicates the Kelvin connection of the most positive battery node. The connection marked 1N is
equally important. The VC5 pin (a ground reference for cell voltage measurement), which is in the older
generation devices, is not in the bq30z50/55 device. Hence, the single-point connection at 1N to the
low-current ground is needed to avoid an undesired voltage drop through long traces while the gas gauge
is measuring the bottom cell voltage.

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Figure 4. Lithium-Ion Cell Connections

2.4 Sense Resistor

As with the cell connections, the quality of the Kelvin connections at the sense resistor is critical. The
sense resistor must have a temperature coefficient no greater than 75 ppm in order to minimize current
measurement drift with temperature. Choose the value of the sense resistor to correspond to the available
overcurrent and short-circuit ranges of the bq30z50/55. (See the relevant tables in SLUS996.) Select the
smallest value possible in order to minimize the negative voltage generated on the bq30z50 VSS node(s)
during a short circuit. This pin has an absolute minimum of –0.3 V. For a pack with two parallel cylindrical
cells, 10 mΩ is generally ideal. Parallel resistors can be used as long as good Kelvin sensing is ensured.
The ground scheme of bq30z50 is different from the older generation devices. In previous devices, the
device ground (or low current ground) is connected to the SRN side of the Rsense resistor pad. The
bq30z50, however, connects the low-current ground on the SRP side of the Rsense resistor pad, close to
the battery 1N terminal (see Section 2.3). This is because the bq30z50 has one less VC pin (a ground
reference pin VC5) compared to the previous devices. The pin was removed and was internally combined
to SRP.

Figure 5. Sense Resistor

2.5 ESD Mitigation

A pair of series 0.1-μF ceramic capacitors is placed across the PACK+ and PACK– terminals to help in
the mitigation of external electrostatic discharges. The two devices in series ensure continued operation of
the pack if one of the capacitors becomes shorted.
Optionally, a tranzorb such as the SMBJ2A can be placed across the terminals to further improve ESD
immunity.

3 Gas Gauge Circuit

The Gas Gauge Circuit includes the bq30z50/55 and its peripheral components. These components are
divided into the following groups: Differential Low-Pass Filter, Power Supply Decoupling/RBI/, System
Present, SMBus Communication, FUSE circuit, and LED.

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3.1 Differential Low-Pass Filter

As shown in Figure 6, a differential filter must precede the current sense inputs of the gas gauge. This
filter eliminates the effect of unwanted digital noise, which can cause offset in the measured current. Even
the best differential amplifier has less common-mode rejection at high frequencies. Without a filter, the
amplifier input stage may rectify a strong RF signal, which then may appear as a dc offset error.
Five percent tolerance of the components is adequate because capacitor C15 shunts C12/C13, and
reduces ac common mode arising from component mismatch. It is important to locate C15 as close as
possible to the gas gauge pins. The other components also must be relatively close to the IC. The ground
connection of C12 and C13 must be close to the IC. It is also proven to reduce offset and noise error by
maintaining a symmetrical placement pattern and adding ground shielding for the differential filter network.

Figure 6. Differential Filter

3.2 Power Supply Decoupling and RBI

Power supply decoupling is important for optimal operation of the bq30z50/55 Advanced Gas Gauges. As
shown in Figure 7, a single 1.0-μF ceramic decoupling capacitor from REG33 to VSS and REG25 to VSS
must be placed adjacent to the IC pins.
The RBI pin is used to supply backup RAM voltage during brief transient power outages. The partial reset
mechanism makes use of the RAM to restore the critical CPU registers following a temporary loss of
power. A standard 0.1-μF ceramic capacitor is connected from the RBI pin to ground as shown in
Figure 7.

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Figure 7. Power Supply Decoupling

3.3 System Present

The System Present signal is used to inform the gas gauge whether the pack is installed into or removed
from the system. In the host system, this pin is grounded. The PRES pin of the bq30z50/55 is occasionally
sampled to test for system present. To save power, an internal pullup is provided by the gas gauge during
a brief 4-μs sampling pulse once per second.
Because the System Present signal is part of the pack connector interface to the outside world, it must be
protected from external electrostatic discharge events. An integrated ESD protection on the PRES device
pin reduces the external protection requirement to just R25 for an 8-kV ESD contact rating. However, if it
is possible that the System Present signal may short to PACK+, then R18 and D3 must be included for
high-voltage protection.

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Figure 8. System Present ESD and Short Protection

3.4 SMBus Communication

Similar to the System Present pin, the SMBus clock and data pins have integrated high-voltage ESD
protection circuit that reduce the need for external Zener diode protection. When using the circuit shown in
Figure 9, the communication lines can withstand an 8-kV (contact) ESD strike. C23 and C24 are selected
with a 100-pF value in order to meet the SMBus specifications. If it is desirable to provide increased
protection with a larger input resistor and/or Zener diode, carefully investigate the signal quality of the
SMBus signals under worst-case communication conditions.
The SMbus clock and data lines have internal pulldown. When the gas gauge senses that both lines are
low (such as during removal of the pack), the device performs auto-offset calibration and then goes into
sleep mode to conserve power.

Figure 9. ESD Protection for SMB Communication

3.5 FUSE Circuitry

The FUSE pin of the bq30z50/55 is designed to ignite the chemical fuse if one of the various safety criteria
is violated. The FUSE pin is also used to monitor the state of the secondary-voltage protection IC. Q3
ignites the chemical fuse when its gate is high. The 7-V output of the bq29412 is divided by R13 and R14,
which provides adequate gate drive for Q1 while guarding against excessive back current into the
bq29412 if the FUSE signal is high.
The use of C14 is generally good practice, especially for RFI immunity, but may be removed if desired
because the chemical fuse is a comparatively slow device and is not affected by any sub-microsecond
glitches that may come from the SAFE output during the cell connection process.

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To 2nd-Level Protector

To FUSE pin

Figure 10. FUSE Circuit

When the bq30z50/55 is commanded to ignite the chemical fuse, the FUSE pin activates to give a typical
8-V output. The new design makes it possible to use a higher Vgs FET for Q1. This improves the
robustness of the system, as well as widens the choices for Q1.

3.6 PFIN Detection

As previously mentioned, the FUSE pin has a dual role on this device. When bq30z50/55 is not
commanded to ignite the chemical fuse, the FUSE pin defaults to sense the OUT pin status of the
secondary voltage protector. When the secondary voltage protector ignites the chemical fuse, the high
voltage is sensed by the FUSE pin, and the bq30z50/55 sets the PFIN flag accordingly.

4 Secondary-Current Protection
The bq30z50/55 provides secondary overcurrent and short-circuit protection, cell balancing, cell voltage
multiplexing, and voltage translation. The following discussion examines Cell and Battery Inputs, Pack and
FET Control, Regulator Output, Temperature Output, and Cell Balancing.

4.1 Cell and Battery Inputs

Each cell input is conditioned with a simple RC filter, which provides ESD protection during cell connect
and acts to filter unwanted voltage transients. The resistor value allows some trade-off for cell balancing
versus safety protection.
The internal cell balancing FETs in bq30z5x provide about typ 310 Ω (310 Ω with cell voltage ≥ 2 V. The
cell balancing FETs Rds-on reduced to typ 125 Ω with cell voltage ≥ 4 V), which can be used to bypass
charge current in individual cells that may be overcharged with respect to the others. The purpose of this
bypass path is to reduce the current into any one cell during charging to bring the series elements to the
same voltage. Series resistors placed between the input pins and the positive series element nodes
control the bypass current value. The bq30z5x device is designed to take up to 10-mA cell balancing
current. Series input resistors between 100 Ω and 1 kΩ are recommended for effective cell balancing.
The BAT input uses a diode (D1) and 1-μF ceramic capacitor (C9) to isolate and decouple it from the cells
in the event of a transient dip in voltage caused by a short-circuit event.
Also, as described previously in Section 2, the top and bottom nodes of the cells must be sensed at the
battery connections with a Kelvin connection to prevent voltage sensing errors caused by a drop in the
high-current PCB copper.

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Figure 11. Cell and BAT Inputs

4.2 External Cell Balancing

Internal cell balancing can only support up to 10 mA. External cell balancing provide as another option for
faster cell balancing. For details, refer to the application note, Fast Cell Balancing Using External
MOSFET (SLUA420).

4.3 PACK and FET Control

The PACK and VCC inputs provide power to the bq30z5x from the charger. The PACK input also provides
a method to measure and detect the presence of a charger. The PACK input uses a 10-KΩ resistor,
whereas the VCC input uses a diode to guard against input transients and prevents misoperation of the
date driver during short-circuit events.

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Figure 12. bq30z50 PACK and FET Control

Figure 13. bq30z55 PACK and FET Control

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The N-channel charge and discharge FETs are controlled with 5.1-KΩ series gate resistors, which provide
a switching time constant of a few microseconds. The 3.01-MΩ resistors ensure that the FETs are off in
the event of an open connection to the FET drivers. Q4 is provided to protect the discharge FET (Q3) in
the event of a reverse-connected charger. Without Q4, Q3 can be driven into its linear region and suffer
severe damage if the PACK+ input becomes slightly negative.
Q4 turns on in that case to protect Q3 by shorting its gate to source. To use the simple ground gate
circuit, the FET must have a low gate turn-on threshold. If it is desired to use a more standard device,
such as the 2N7000 as the reference schematic, the gate should be biased up to 3.3 V with a high-value
resistor. The bq30z5x device has the capability to provide a current-limited charging path typically used for
low battery voltage or low temperature charging. The bq30z55 device uses an external P-channel,
pre-charge FET controlled by GPOD. The pre-charge FET is integrated into the bq30z50 device, allowing
users to only connect an external pre-charge load resistor via the PCR pin through the PCHGIN input. The
bq30z50 device supports up to 100-mA of pre-charge current. When selecting the external load resistor,
user should take into account the max charger voltage and the Rdson of the internal pre-charge FET
(refer to the device data sheet specification).

4.4 Regulator Output

As mentioned in Section 3.2, the two low-dropout regulators in the bq30z50/55 require capacitive
compensation on the output. The outputs must have a 1-μF ceramic capacitor placed close to the IC
terminal pins.

4.5 Temperature Output

For the bq30z50 device, TS1, TS2, TS3, and TS4 provide thermistor drive-under program control. Each
pin can be enabled with an integrated 18-kΩ (typical) linearization pullup resistor to support the use of a
10-kΩ at 25°C (103) NTC external thermistor such as a Mitsubishi BN35-3H103. The reference design
includes four 10-kΩ thermistors: RT1, RT2, RT3, and RT4. The bq30z55 device supports up to two
thermistors.

Figure 14. Thermistor Drive

4.6 LEDs
The LEDs do not need current-limiting resistors because the bq30z50 LED pins have a programmable
current sink to simplify the design. The display switch pulls the bq30z50 pin 20 to ground to generate an
interrupt. The REG33 output powers the LEDs.

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Figure 15. LEDs

4.7 Safety PTC Thermistor

The bq30z5x device provides support for a safety PTC thermistor. The PTC thermistor is connected
between the PTC pin and VSS. It can be placed close to the CHG/DSG FETs to monitor the temperature.
The PTC pin outputs a very small current, typical ~370 nA , and the PTC fault will be triggered at ~0.7 V
typical. A PTC fault is one of the permanent failure modes. It can only be cleared by a POR.
To disable this feature, connect a 10-KΩ resistor between PTC and VSS.

Figure 16. PTC Thermistor

5 Secondary-Overvoltage Protection
The bq29412 provides secondary-overvoltage protection and commands the chemical fuse to ignite if any
cell exceeds the internally referenced threshold. The peripheral components are Cell Inputs and Time
Delay Capacitor.

5.1 Cell Inputs

An input filter is provided for each cell input. This comprises the resistors R5, R6, R7, and R9 along with
capacitors C5, C6, C7, and C8. This input network is completely independent of the filter network used as
input to the bq30z50/55. To ensure independent safety functionality, the two devices must have separate
input filters.
Because the filter capacitors are implemented differentially, a low-voltage device can be used in each
case.

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Figure 17. bq29412 Cell Inputs and Time-Delay Capacitor

5.2 Time-Delay Capacitor

C10 sets the time delay for activation of the output after any cell exceeds the threshold voltage. The time
delay is calculated as td = 1.2 V × DelayCap (μF)/0.18 μA.

6 Reference Design Schematic

Figure 18 shows the bq30z50 reference design schematic. Figure 19 shows the bq30z55 reference design
schematic.

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Figure 18. bq30z50 Schematic

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Figure 19. bq30z55 Schematic

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