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Computer Organisation and Architecture: Department: Electronics and Communication Core Elective

This document outlines a course on computer organization and architecture. The course is offered as a core elective by the Electronics and Communication department. It carries 4 credits and involves 4 hours of lectures and 0 hours of tutorials/practicals per week over 45 contact hours. The end semester exam carries 50 marks and continuous internal evaluation carries 50 marks. The course introduces students to computer structure, arithmetic operations, I/O organization, memory organization, and control unit operations. It is divided into 5 units covering these topics over 9 hours each. The prescribed textbook is "Computer Organization" by Carl Hamecher, Z Vranesic & Zaky.

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Rahul Rajendrakumar
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85 views3 pages

Computer Organisation and Architecture: Department: Electronics and Communication Core Elective

This document outlines a course on computer organization and architecture. The course is offered as a core elective by the Electronics and Communication department. It carries 4 credits and involves 4 hours of lectures and 0 hours of tutorials/practicals per week over 45 contact hours. The end semester exam carries 50 marks and continuous internal evaluation carries 50 marks. The course introduces students to computer structure, arithmetic operations, I/O organization, memory organization, and control unit operations. It is divided into 5 units covering these topics over 9 hours each. The prescribed textbook is "Computer Organization" by Carl Hamecher, Z Vranesic & Zaky.

Uploaded by

Rahul Rajendrakumar
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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COMPUTER ORGANISATION AND ARCHITECTURE

Department: ELECTRONICS AND COMMUNICATION Core elective

Course Title: COMPUTER ORGANISATION AND ARCHITECTURE Course Code: 14ECE553

L-T-P: 4-0-0 Credits: 04

Total Contact Hours: 45hrs Duration of SEE: 3 hrs

SEE Marks: 50 CIE Marks: 50

Pre-requisites :

 Fundamentals of Digital electronics


 Basics of computer & its peripherals
 Basics of Processors

Course Outcomes
Students will be able to understand basic structure of a computer

Students will be able to understand the computer arithmetic Operations

Students will be able to understand the concept of I/O organization

Students will be able to understand the design of memory organization and the concept of
cache mapping techniques

Student will be able to understand control unit operations Conceptualize instruction level
Parallelism

UNIT-1

Types Of Computers, Functional Units, Basic Operational Concepts, Performance: Clock,


Performance Equation, Pipelining & Superscalar Operation, Clockrate, Cisc &Risc, Compiler,
Evolution Of Computers.
[Txt -1 : Ch-1 : 1.1, 1.2, 1.3, 1.5, 1.6: 1.6.1 -1.6.7, 1.8]

Memory Locations & Address ,Memory Operations, Instructions & Instruction Sequencing: Rtn,
Aln, Basic Instruction Types: One, Two, Three Address Format (Basic Programs Using Them),
Instruction Execution & St-Line Sequencing, Addressing Modes, Assembly Language, Basic
Input/Output Operations, Stacks And Queues, Subroutines, Encoding Of Machine Instruction.
[Txt -1 : Ch-2 : 2.2,2.3,2.4,2.5,2.6,2.7,2.8,2.9,2.12] 9 Hrs

Unit-2

Data Representation : Representation Of Signed Numbers (Sign –Mag Form ,1’s & 2’s Comp
Form) ,Addition & Substraction Of Signed Numbers, Arithmetic Overflow, Floating Point
Representation :IEEE Standard (Single Precision And Double Precision Form)
[Txt -1 : Ch-2 : 2.1: 2.1.1,2.1.2, 2.1.3, 2.1.4 Ch-6 : 6.7: 6.7.1]

Arithmetic :Design Of Fast Adders, Multiplication Of Signed Numbers: Booth’s Algorithm, Fast
Multiplication ,Integer Division: Restoring & Non Restoring Division Methods.
[Txt -1 : Ch-6 : 6.2,6.3,6.4,6.5,6.6 ] 9 Hrs

Unit-3

Input/Output Organization: Acessing I/O Devices, Interrupts: Interrupt H/W, Enabling &
Disabling Interrupts, Handling Multiple Devices, Controlling Device Requests, Exceptions,
Direct Memory Access, Interface Circuits :Parallel Ports, Serial Ports, Standard I/O Interfaces:
PCI Bus, SCSI Bus, USB, RS232 standard signaling sequences
[Txt -1 : Ch-4 : 4.1, 4.2 : 4.2.1 -4.2.4 , 4.4 ,4.5, 4.6 ,Ch 10:10.3.3]
9 Hrs

Unit-4

Memory System : Basic Concepts, Ram-Internal Oragnization Of Memory Chips, Rom, Cache
Memory, Virtual Memory, Secondary Storage
[Txt -1 : Ch-5: 5.1 ,5.2 : 5.2.1,5.3 : 5.3.1, 5.4,5.5 :5.5.1 ,5.5.2 ,5.7, 5.9 ]

9 Hrs

Unit-5

Basic Processing Unit: Fundamental Concepts : Multiple Bus Organization, Hardwired Control,
Micro programmed Control: Organization Of Micro control Unit, Basic Control Unit For
Handling Conditional Branching
[Txt -1 : Ch-7 : 7.1: 7.1.1-7.1.4 ,7.2,7.3,7.4,7.5:7.5.1-7.5.4]

Pipelining : Basic Concepts, Data Hazards, Instruction Hazards


[Txt -1 : Ch-8 :8.1,8.2,8.3]

9 Hrs
Text Book:
1. “Computer Organization”, Carl Hamecher, Z Vranesic&Zaky, Mh, Fifth Edition

Reference Books:
1. “Computer Architecture And Organisation”, J.P. Hayes, Tata Mcgraw-Hill, Second
Edition (Chapter1: 1.2for Unit1).
2. “Computer System Architecture” Morris Mano, Phi, Second Edition, Unit Iii : Chapter 12.

POS PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12

CO1 S W M M M S W W M W W S

CO2 M W S W S M M W M W W S

CO3 S S S S M M W W M W W S

CO4 S S S S S M W W M W W S

CO5 S S S S S M S W M S M S

CO6 S S S S S S M W M S W S

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