NEW GENERATION POLLING METHOD USING RF

(radio frequency)
 INDEX

1. Index
2. Abstract
3. Chapter-1: Embedded System
1.1 Introduction
1.2 Microprocessor and Microcontroller
1.3 Introduction to Application of embedded system
1.4 Industrial functions of embedded system
1.5 Compared with commercial system
4. Chapter-2: Over view of the Project
2.1 Introduction of project
2.2 Block Diagram
2.3 Software used in Project
5. Chapter-3: Microcontroller
3.1 Description
3.2 Features
3.3 Architecture
3.4 Pin-Configuration of AT89S52
3.5 Pin-Description
6. Chapter-4: Hardware Description
4.1 Power Supply board
7. Chapter-5: Technology
5.1 Communication System

5.2 RF Communication

5.3 Encoder & decoder

5.4 Keypad

8. Coding
9. Conclusion
10. Future Aspects
 11. Applications
12. Bibliography

LIST OF FIGURES

S.no CONTENTS PAGE NUMBERS

ABSTRACT
AIM:

The main aim of this project is to develop a genuine polling system for elections by means of a
wireless communication using radio frequencies. We use a EEPROM for storing, keypad for
entering the data and LCD’s for the purpose of displaying.

DESCRIPTION:

In general we observe that rigging happens at

RF COMMUNICATION:
the time of elections. Due to this ingenuine
Radio frequency (RF) radiation is a subset
polling, the winner may loss his/her place. To of electromagnetic radiation with a
avoid this ingenuine polling or malpractices wavelength of 100 km to 1 mm and a
frequency of 3 kHz to 300 GHz, respectively.
in elections, this project work has been taken
This range of electromagnetic radiation
up. constitutes the radio spectrum.

In this project there are two sections, a It has the transmitter and the receiver part for
the purpose of communication.
transmitter section and a receiver section. The
transmitter section consists of a keypad with
four switches, a microcontroller, a LCD and a
RF transmitter with an encoder. The receiver
section consists of a microcontroller, a LCD,
an EEPROM and a RF receiver with a
Transmitter Receiver
decoder.

In this prototype project we are arranging poll for three or four members. Each person has
different passwords.

When a person enters the polling booth, he has to enter his password along with the serial
number allotted to the party which he likes to vote in the transmitter section by using the keypad
provided. The data (password and the serial number allotted to the party) entered by the person
or the voter will be displayed on the LCD provided in the transmitter section simultaneously.
This password entered by the voter is checked by the microcontroller of the transmitter section.
According to the program written for controller, controller compares the data in the controller
with that data the person has entered. The vote is counted only if the password entered is correct
as checked by the microcontroller. The data from the microcontroller is transferred to the RF
transmitter with an encoder of the transmitter section. The encoder encodes the data and the RF
transmitter transmits this encoded data by using the radio frequency signals. The RF receiver in
the receiver section receives this encoded data and decodes it by using the decoder provided.
This data is then fed to the microcontroller at the receiver section. The voter details i.e. password
and the votes given to the party will be stored in the EEPROM in the receiver section. The LCD
of the receiver section displays the votes of the respective parties. As the polling process takes
place, the votes attained by the parties will be changed on the LCD of the receiver section
simultaneously.

If a person tries to vote for another time, he has to enter his password in the transmitter section.
This data entered in the transmitter section is transmitted to the receiver section by using RF
signals. Then the microcontroller compares this password with EEPROM data. If it is already
there in EEPROM, the system doesn’t allow him to vote for second time.

From the above discussion we can conclude that genuine polling system is completely
implemented by using Radio Frequency communication.
CHAPTER-1
EMBEDDED SYSTEMS

Introduction:

An embedded system is a system which is going to do a predefined specified task and is

even defined as combination of both software and hardware. A general-purpose definition of
embedded systems is that they are devices used to control, monitor or assist the operation of
equipment, machinery or plant. "Embedded" reflects the fact that they are an integral part of the
system. At the other extreme a general-purpose computer may be used to control the operation of
a large complex processing plant, and its presence will be obvious.

All embedded systems are including computers or microprocessors. Some of these

computers are however very simple systems as compared with a personal computer.
The very simplest embedded systems are capable of performing only a single function or
set of functions to meet a single predetermined purpose. In more complex systems, an
application program that enables the embedded system to be used for a particular purpose in a
specific application determines the functioning of the embedded system. The ability to have
programs means that the same embedded system can be used for a variety of different purposes.
In some cases a microprocessor may be designed in such a way that the application software for
a particular purpose can be added to the basic software in a second process, after which it is not
possible to make further changes. The applications software on such processors is sometimes
referred to as firmware.
The simplest devices consist of a single microprocessor (often called a "chip”), which
may itself be packaged with other chips in a hybrid system or Application Specific Integrated
Circuit (ASIC). Its input comes from a detector or sensor and its output goes to a switch or
activator which (for example) may start or stop the operation of a machine or, by operating a
valve, may control the flow of fuel to an engine.

A embedded system is a combination of both software and hardware.

 Embedded

System

Software Hardware

ALP
C Processor
VB Peripherals
Etc., memory

Figure: Block diagram of Embedded System

Software deals with the languages like ALP, C, and VB etc., and Hardware deals with
Processors, Peripherals, and Memory.

Memory: It is used to store data or address.

Peripherals: These are the external devices connected
Processor: It is an IC which is used to perform some task
Applications of embedded systems
• Manufacturing and process control
• Construction industry
• Transport
• Buildings and premises
• Domestic service
• Communications
• Office systems and mobile equipment
• Banking, finance and commercial
• Medical diagnostics, monitoring and life support
• Testing, monitoring and diagnostic systems
Processors are classified into four types like:

 Micro Processor (µp)

 Micro controller (µc)
 Digital Signal Processor (DSP)
 Application Specific Integrated Circuits (ASIC)
Micro Processor (µp):
A silicon chip that contains a CPU. In the world of personal computers, the terms microprocessor
and CPU are used interchangeably. At the heart of all personal computers and most workstations
sits a microprocessor. Microprocessors also control the logic of almost all digital devices, from
clock radios to fuel-injection systems for automobiles.

Three basic characteristics differentiate microprocessors:

 Instruction set: The set of instructions that the microprocessor can execute.
 Bandwidth : The number of bits processed in a single instruction.
 Clock speed : Given in megahertz (MHz), the clock speed determines how many
instructions per second the processor can execute.
In both cases, the higher the value, the more powerful the CPU. For example, a 32-bit
microprocessor that runs at 50MHz is more powerful than a 16-bit microprocessor that runs at
25MHz. In addition to bandwidth and clock speed, microprocessors are classified as being either
RISC (reduced instruction set computer) or CISC (complex instruction set computer).

A microprocessor has three basic elements, as shown above. The ALU performs all
arithmetic computations, such as addition, subtraction and logic operations (AND, OR, etc). It is
controlled by the Control Unit and receives its data from the Register Array. The Register Array
is a set of registers used for storing data. These registers can be accessed by the ALU very
quickly. Some registers have specific functions - we will deal with these later. The Control Unit
controls the entire process. It provides the timing and a control signal for getting data into and
out of the registers and the ALU and it synchronizes the execution of instructions (we will deal
with instruction execution at a later date).
 Three Basic Elements of a Microprocessor

Micro Controller (µc):

A microcontroller is a small computer on a single integrated circuit containing a processor core,
memory, and programmable input/output peripherals. Program memory in the form of NOR
flash or OTP ROM is also often included on chip, as well as a typically small amount of RAM.
Microcontrollers are designed for embedded applications, in contrast to the microprocessors
used in personal computers or other general purpose applications.

ALU

CU
Timer, Counter, serial
communication ROM,
Memory
ADC, DAC, Timers,
USART, Oscillators

Etc.,

Figure: Block Diagram of Micro Controller (µc)

Digital Signal Processors (DSPs):
Digital Signal Processors is one which performs scientific and mathematical operation.
Digital Signal Processor chips - specialized microprocessors with architectures designed
specifically for the types of operations required in digital signal processing. Like a general-
purpose microprocessor, a DSP is a programmable device, with its own native instruction code.
DSP chips are capable of carrying out millions of floating point operations per second, and like
their better-known general-purpose cousins, faster and more powerful versions are continually
being introduced. DSPs can also be embedded within complex "system-on-chip" devices, often
containing both analog and digital circuitry.
Application Specific Integrated Circuit (ASIC):
ASIC is a combination of digital and analog circuits packed into an IC to achieve the desired
control/computation function

ASIC typically contains

 CPU cores for computation and control

 Peripherals to control timing critical functions
 Memories to store data and program
 Analog circuits to provide clocks and interface to the real world which is analog in nature
 I/Os to connect to external components like LEDs, memories, monitors etc.

Computer Instruction Set:

There are two different types of computer instruction set there are:

1. RISC (Reduced Instruction Set Computer) and

2. CISC (Complex Instruction Set computer)

Reduced Instruction Set Computer (RISC):

A RISC (reduced instruction set computer) is a microprocessor that is designed to perform a

smaller number of types of computer instruction so that it can operate at a higher speed (perform
more million instructions per second, or millions of instructions per second). Since each
instruction type that a computer must perform requires additional transistors and circuitry, a
larger list or set of computer instructions tends to make the microprocessor more complicated
and slower in operation.

Besides performance improvement, some advantages of RISC and related design improvements
are:

 A new microprocessor can be developed and tested more quickly if one of its aims is to
be less complicated.
 Operating system and application programmers who use the microprocessor's instructions
will find it easier to develop code with a smaller instruction set.
 The simplicity of RISC allows more freedom to choose how to use the space on a
microprocessor.
Higher-level language compilers produce more efficient code than formerly because they have
always tended to use the smaller set of instructions to be found in a RISC computer.

RISC characteristics:

 Simple instruction set:

In a RISC machine, the instruction set contains simple, basic instructions, from which
more complex instructions can be composed.
 Same length instructions.:
Each instruction is the same length, so that it may be fetched in a single operation.
 1 machine-cycle instructions:
Most instructions complete in one machine cycle, which allows the processor to handle
several instructions at the same time. This pipelining is a key technique used to speed up
RISC machines.
Complex Instruction Set Computer (CISC):

CISC, which stands for Complex Instruction Set Computer, is a philosophy for designing chips
that are easy to program and which make efficient use of memory. Each instruction in a CISC
instruction set might perform a series of operations inside the processor. This reduces the number
of instructions required to implement a given program, and allows the programmer to learn a
small but flexible set of instructions.
The advantages of CISC:
At the time of their initial development, CISC machines used available technologies to optimize
computer performance.

 Microprogramming is as easy as assembly language to implement, and much less

expensive than hardwiring a control unit.
 The ease of micro-coding new instructions allowed designers to make CISC machines
upwardly compatible: a new computer could run the same programs as earlier computers
because the new computer would contain a superset of the instructions of the earlier
computers.
 As each instruction became more capable, fewer instructions could be used to implement
a given task. This made more efficient use of the relatively slow main memory.
 Because micro program instruction sets can be written to match the constructs of high-
level languages, the compiler does not have to be as complicated.
The disadvantages of CISC:
CISC designers soon realized that the CISC philosophy had its own problems, which include:

 Earlier generations of a processor family generally were contained as a subset in every

new version --- so instruction set & chip hardware become more complex with each
generation of computers.
 So that as many instructions as possible could be stored in memory with the least
possible wasted space, individual instructions could be of almost any length---this means
that different instructions will take different amounts of clock time to execute, slowing
down the overall performance of the machine.
 Many specialized instructions aren't used frequently enough to justify their existence ---
approximately 20% of the available instructions are used in a typical program.
 CISC instructions typically set the condition codes as a side effect of the instruction. Not
only does setting the condition codes take time, but programmers have to remember to
examine the condition code bits before a subsequent instruction changes them.
Memory Architecture:

There two different type’s memory architectures there are:

 Harvard Architecture
 Von-Neumann Architecture

Harvard Architecture:

Computers have separate memory areas for program instructions and data. There are two or more
internal data buses, which allow simultaneous access to both instructions and data. The CPU
fetches program instructions on the program memory bus.

The Harvard architecture is a computer architecture with physically separate storage and signal
pathways for instructions and data. The term originated from the Harvard Mark I relay-based
computer, which stored instructions on punched tape (24 bits wide) and data in electro-
mechanical counters. These early machines had limited data storage, entirely contained within
the central processing unit, and provided no access to the instruction storage as data. Programs
needed to be loaded by an operator, the processor could not boot itself.

Figure: Harvard Architecture

Modern uses of the Harvard architecture:

The principal advantage of the pure Harvard architecture - simultaneous access to more than one
memory system - has been reduced by modified Harvard processors using modern CPU cache
systems. Relatively pure Harvard architecture machines are used mostly in applications where
tradeoffs, such as the cost and power savings from omitting caches, outweigh the programming
penalties from having distinct code and data address spaces.
 Digital signal processors (DSPs) generally execute small, highly-optimized audio or
video processing algorithms. They avoid caches because their behavior must be
extremely reproducible. The difficulties of coping with multiple address spaces are of
secondary concern to speed of execution. As a result, some DSPs have multiple data
memories in distinct address spaces to facilitate SIMD and VLIW processing. Texas
Instruments TMS320 C55x processors, as one example, have multiple parallel data
busses (two write, three read) and one instruction bus.
 Microcontrollers are characterized by having small amounts of program (flash
memory) and data (SRAM) memory, with no cache, and take advantage of the
Harvard architecture to speed processing by concurrent instruction and data access.
The separate storage means the program and data memories can have different bit
depths, for example using 16-bit wide instructions and 8-bit wide data. They also
mean that instruction pre-fetch can be performed in parallel with other activities.
Examples include, the AVR by Atmel Corp, the PIC by Microchip Technology, Inc.
and the ARM Cortex-M3 processor (not all ARM chips have Harvard architecture).

Even in these cases, it is common to have special instructions to access program memory as data
for read-only tables, or for reprogramming.

Von-Neumann Architecture:

A computer has a single, common memory space in which both program instructions and data
are stored. There is a single internal data bus that fetches both instructions and data. They cannot
be performed at the same time

The von Neumann architecture is a design model for a stored-program digital computer that
uses a central processing unit (CPU) and a single separate storage structure ("memory") to hold
both instructions and data. It is named after the mathematician and early computer scientist John
von Neumann. Such computers implement a universal Turing machine and have a sequential
architecture.
A stored-program digital computer is one that keeps its programmed instructions, as well as its
data, in read-write, random-access memory (RAM). Stored-program computers were
advancement over the program-controlled computers of the 1940s, such as the Colossus and the
ENIAC, which were programmed by setting switches and inserting patch leads to route data and
to control signals between various functional units. In the vast majority of modern computers, the
same memory is used for both data and program instructions. The mechanisms for transferring
the data and instructions between the CPU and memory are, however, considerably more
complex than the original von Neumann architecture.

The terms "von Neumann architecture" and "stored-program computer" are generally used
interchangeably, and that usage is followed in this article.

Figure: Schematic of the Von-Neumann Architecture.

Basic Difference between Harvard and Von-Neumann Architecture

 The primary difference between Harvard architecture and the Von Neumann architecture
is in the Von Neumann architecture data and programs are stored in the same memory
and managed by the same information handling system.
 Whereas the Harvard architecture stores data and programs in separate memory devices
and they are handled by different subsystems.
 In a computer using the Von-Neumann architecture without cache; the central processing
unit (CPU) can either be reading and instruction or writing/reading data to/from the
memory. Both of these operations cannot occur simultaneously as the data and
instructions use the same system bus.
 In a computer using the Harvard architecture the CPU can both
read an instruction and access data memory at the same time
without cache. This means that a computer with Harvard
architecture can potentially be faster for a given circuit
complexity because data access and instruction fetches do not
contend for use of a single memory pathway.
 Today, the vast majority of computers are designed and built using the Von Neumann
architecture template primarily because of the dynamic capabilities and efficiencies
gained in designing, implementing, operating one memory system as opposed to two.
Von Neumann architecture may be somewhat slower than the contrasting Harvard
Architecture for certain specific tasks, but it is much more flexible and allows for many
concepts unavailable to Harvard architecture such as self programming, word processing
and so on.
 Harvard architectures are typically only used in either specialized systems or for very
specific uses. It is used in specialized digital signal processing (DSP), typically for video
and audio processing products. It is also used in many small microcontrollers used in
electronics applications such as Advanced RISK Machine (ARM) based products for
many vendors.
CHAPTER-2
Introduction

Electronic voting (also known as e-voting) is a term encompassing several different types of
voting, embracing both electronic means of casting a vote and electronic means of counting
votes.

Electronic voting technology can include punched cards, optical scan voting systems and
specialized voting kiosks (including self-contained direct-recording electronic voting systems, or
DRE). It can also involve transmission of ballots and votes via telephones, private computer
networks, or the Internet.

Electronic voting technology can speed the counting of ballots and can provide improved
accessibility for disabled voters. However, there has been contention, especially in the United
States, that electronic voting, especially DRE voting, could facilitate electoral fraud.

A direct-recording electronic (DRE) voting machine records votes by means of a ballot display
provided with mechanical or electro-optical components that can be activated by the voter
(typically buttons or a touch screen); that processes data with computer software; and that
records voting data and ballot images in memory components. After the election it produces a
tabulation of the voting data stored in a removable memory component and as printed copy. The
system may also provide a means for transmitting individual ballots or vote totals to a central
location for consolidating and reporting results from precincts at the central location. These
systems use a precinct count method that tabulates ballots at the polling place. They typically
tabulate ballots as they are cast and print the results after the close of polling.
The Indian EVMs are designed and developed by two Government Owned Defense Equipment
Manufacturing Units, Bharat Electronics Limited (BEL) and Electronics Corporation of India
Limited (ECIL). Both systems are identical, and are developed to the specifications of Election
Commission of India. The System is a set of two devices running on 6V batteries. One device,
the Voting Unit is used by the Voter, and another device called the Control Unit is operated by
the Electoral Officer. Both units are connected by a 5 meter cable. The Voting unit has a Blue
Button for every candidate, the unit can hold 16 candidates, but up to 4 units can be chained, to
accommodate 64 candidates. The Control Units has three buttons on the surface, namely, one
button to release a single vote, one button to see the total number of vote cast till now, and one
button to close the election process. The result button is hidden and sealed; it cannot be pressed
unless the Close button is already pressed.
BLOCK DIAGRAM:

Transmitter Section:

Receiver Section:
Power Supply:

Block Diagram Explanation

Here we are using AT89S52 controller. This is used to control all the operations of a circuit to
get the accurate result. There are two sections in this project one, is the transmitter section and
the other is the receiver section.
 In transmitter section we interfaced the keypad, LCD and RF transmitter. With the help of
keypad, person will entering the ID (Identification No), these ID’s will be differing from person
to person. The ID entered by the person or the voter will be displayed on the LCD provided in
the transmitter section simultaneously. This password entered by the voter is checked by the
microcontroller of the transmitter section. According to the program written for controller,
controller compares the data in the controller with that data the person has entered. The vote is
counted only if the password entered is correct as checked by the microcontroller. Then the voter
need to type the number alloted to the party which he likes to vote. Assume three parties, x, y
and z. If a switch is pressed a voter will be able to generate a vote to x-party. After dropping the
vote to concern party, it will indicated by buzzer, in the similar way we assign some other keys
to other different parties.

The data from the microcontroller is transferred to the RF transmitter with an encoder of the
transmitter section. The encoder encodes the data and the RF transmitter transmits this encoded
data by using the radio frequency signals. The RF frequency range 3Hz to 330GHz.RF range will
be differing from frequency to frequency. In this project we are using 434MHz RF modules,
Maximum range it will give up to 50 meters or 500feets.

In receiver section we are interfaced with RF receiver, EEPROM(24C02) and LCD .The RF
receiver receives the encoded data and decodes it by using the decoder provided. This data is
then fed to the microcontroller at the receiver section. The voter details i.e. password and the
votes given to the party will be stored in the EEPROM in the receiver section. The LCD of the
receiver section displays the votes of the respective parties. As the polling process takes place,
the votes attained by the parties will be changed on the LCD of the receiver section
simultaneously.
CHAPTER-3
Hardware Explanation

Block Diagram For Power Supply

Figure: Power Supply

Description

Transformer:

A transformer is a device that transfers electrical energy from one circuit to another through
inductively coupled conductors—the transformer's coils. A varying current in the first or
primary winding creates a varying magnetic flux in the transformer's core, and thus a varying
magnetic field through the secondary winding. This varying magnetic field induces a varying
electromotive force (EMF) or "voltage" in the secondary winding. This effect is called mutual
induction.

Figure: Transformer Symbol

(or)

Transformer is a device that converts the one form energy to another form of energy like a
transducer.

Figure: Transformer

Basic Principle:

A transformer makes use of Faraday's law and the ferromagnetic properties of an iron core to
efficiently raise or lower AC voltages. It of course cannot increase power so that if the voltage is
raised, the current is proportionally lowered and vice versa.
 Figure: Basic Principle

Transformer Working:

A transformer consists of two coils (often called 'windings') linked by an iron core, as shown in
figure below. There is no electrical connection between the coils; instead they are linked by a
magnetic field created in the core.
 Figure: Basic Transformer

Transformers are used to convert electricity from one voltage to another with minimal loss of
power. They only work with AC (alternating current) because they require a changing magnetic
field to be created in their core. Transformers can increase voltage (step-up) as well as reduce
voltage (step-down).

Alternating current flowing in the primary (input) coil creates a continually changing magnetic
field in the iron core. This field also passes through the secondary (output) coil and the changing
strength of the magnetic field induces an alternating voltage in the secondary coil. If the
secondary coil is connected to a load the induced voltage will make an induced current flow. The
correct term for the induced voltage is 'induced electromotive force' which is usually abbreviated
to induced e.m.f.

The iron core is laminated to prevent 'eddy currents' flowing in the core. These are currents
produced by the alternating magnetic field inducing a small voltage in the core, just like that
induced in the secondary coil. Eddy currents waste power by needlessly heating up the core but
they are reduced to a negligible amount by laminating the iron because this increases the
electrical resistance of the core without affecting its magnetic properties.

Transformers have two great advantages over other methods of changing voltage:

1. They provide total electrical isolation between the input and output, so they can be safely
used to reduce the high voltage of the mains supply.
 2. Almost no power is wasted in a transformer. They have a high efficiency (power out /
power in) of 95% or more.

Classification of Transformer:

 Step-Up Transformer
 Step-Down Transformer

Step-Down Transformer:

Step down transformers are designed to reduce electrical voltage. Their primary voltage is
greater than their secondary voltage. This kind of transformer "steps down" the voltage applied
to it. For instance, a step down transformer is needed to use a 110v product in a country with a
220v supply.

Step down transformers convert electrical voltage from one level or phase configuration usually
down to a lower level. They can include features for electrical isolation, power distribution, and
control and instrumentation applications. Step down transformers typically rely on the principle
of magnetic induction between coils to convert voltage and/or current levels.

Step down transformers are made from two or more coils of insulated wire wound around a core
made of iron. When voltage is applied to one coil (frequently called the primary or input) it
magnetizes the iron core, which induces a voltage in the other coil, (frequently called the
secondary or output). The turn’s ratio of the two sets of windings determines the amount of
voltage transformation.
 Figure: Step-Down Transformer

An example of this would be: 100 turns on the primary and 50 turns on the secondary, a ratio of
2 to 1.

Step down transformers can be considered nothing more than a voltage ratio device.

With step down transformers the voltage ratio between primary and secondary will mirror the
"turn’s ratio" (except for single phase smaller than 1 kva which have compensated secondary). A
practical application of this 2 to 1 turn’s ratio would be a 480 to 240 voltage step down. Note that
if the input were 440 volts then the output would be 220 volts. The ratio between input and
output voltage will stay constant. Transformers should not be operated at voltages higher than
the nameplate rating, but may be operated at lower voltages than rated. Because of this it is
possible to do some non-standard applications using standard transformers.

Single phase step down transformers 1 kva and larger may also be reverse connected to step-
down or step-up voltages. (Note: single phase step up or step down transformers sized less than 1
KVA should not be reverse connected because the secondary windings have additional turns to
overcome a voltage drop when the load is applied. If reverse connected, the output voltage will
be less than desired.)

Step-Up Transformer:

A step up transformer has more turns of wire on the secondary coil, which makes a larger
induced voltage in the secondary coil. It is called a step up transformer because the voltage
output is larger than the voltage input.
Step-up transformer 110v 220v design is one whose secondary voltage is greater than its primary
voltage. This kind of transformer "steps up" the voltage applied to it. For instance, a step up
transformer is needed to use a 220v product in a country with a 110v supply.

A step up transformer 110v 220v converts alternating current (AC) from one voltage to another
voltage. It has no moving parts and works on a magnetic induction principle; it can be designed
to "step-up" or "step-down" voltage. So a step up transformer increases the voltage and a step
down transformer decreases the voltage.

The primary components for voltage transformation are the step up transformer core and coil.
The insulation is placed between the turns of wire to prevent shorting to one another or to
ground. This is typically comprised of Mylar, nomex, Kraft paper, varnish, or other materials. As
a transformer has no moving parts, it will typically have a life expectancy between 20 and 25
years.

Figure: Step-Up Transformer

Applications:

Generally these Step-Up Transformers are used in industries applications only.

Types of Transformer:

Mains Transformers
Mains transformers are the most common type. They are designed to reduce the AC mains
supply voltage (230-240V in the UK or 115-120V in some countries) to a safer low voltage.
The standard mains supply voltages are officially 115V and 230V, but 120V and 240V are the
values usually quoted and the difference is of no significance in most cases.

Figure: Main Transformer

To allow for the two supply voltages mains transformers usually have two separate primary coils
(windings) labeled 0-120V and 0-120V. The two coils are connected in series for 240V (figure
2a) and in parallel for 120V (figure 2b). They must be wired the correct way round as shown in
the diagrams because the coils must be connected in the correct sense (direction):

Most mains transformers have two separate secondary coils (e.g. labeled 0-9V, 0-9V) which may
be used separately to give two independent supplies, or connected in series to create a centre-
tapped coil (see below) or one coil with double the voltage.

Some mains transformers have a centre-tap halfway through the secondary coil and they are
labeled 9-0-9V for example. They can be used to produce full-wave rectified DC with just two
diodes, unlike a standard secondary coil which requires four diodes to produce full-wave
rectified DC.

A mains transformer is specified by:

1. Its secondary (output) voltages Vs.

2. Its maximum power, Pmax, which the transformer can pass, quoted in VA (volt-amp). This
determines the maximum output (secondary) current, Imax...

...where Vs is the secondary voltage. If there are two secondary coils the maximum
power should be halved to give the maximum for each coil.

3. Its construction - it may be PCB-mounting, chassis mounting (with solder tag

connections) or toroidal (a high quality design).

Audio Transformers

Audio transformers are used to convert the moderate voltage, low current output of an audio
amplifier to the low voltage, high current required by a loudspeaker. This use is called
'impedance matching' because it is matching the high impedance output of the amplifier to the
low impedance of the loudspeaker.

Figure: Audio transformer

Radio Transformers

Radio transformers are used in tuning circuits. They are smaller than mains and audio
transformers and they have adjustable ferrite cores made of iron dust. The ferrite cores can be
adjusted with a non-magnetic plastic tool like a small screwdriver. The whole transformer is
enclosed in an aluminum can which acts as a shield, preventing the transformer radiating too
much electrical noise to other parts of the circuit.

Figure: Radio Transformer

Turns Ratio and Voltage

The ratio of the number of turns on the primary and secondary coils determines the ratio of the
voltages...

...where Vp is the primary (input) voltage, Vs is the secondary (output) voltage, Np is the number
of turns on the primary coil, and Ns is the number of turns on the secondary coil.

Diodes

Diodes allow electricity to flow in only one direction. The arrow of the circuit symbol shows the
direction in which the current can flow. Diodes are the electrical version of a valve and early
diodes were actually called valves.
 Figure: Diode Symbol

A diode is a device which only allows current to flow through it in one direction. In this
direction, the diode is said to be 'forward-biased' and the only effect on the signal is that there
will be a voltage loss of around 0.7V. In the opposite direction, the diode is said to be 'reverse-
biased' and no current will flow through it.

Rectifier

The purpose of a rectifier is to convert an AC waveform into a DC waveform (OR) Rectifier

converts AC current or voltages into DC current or voltage. There are two different rectification
circuits, known as 'half-wave' and 'full-wave' rectifiers. Both use components called diodes to
convert AC into DC.

The Half-wave Rectifier

The half-wave rectifier is the simplest type of rectifier since it only uses one diode, as shown in
figure.
 Figure: Half Wave Rectifier

Figure 2 shows the AC input waveform to this circuit and the resulting output. As you can see,
when the AC input is positive, the diode is forward-biased and lets the current through. When
the AC input is negative, the diode is reverse-biased and the diode does not let any current
through, meaning the output is 0V. Because there is a 0.7V voltage loss across the diode, the
peak output voltage will be 0.7V less than Vs.

Figure: Half-Wave Rectification

While the output of the half-wave rectifier is DC (it is all positive), it would not be suitable as a
power supply for a circuit. Firstly, the output voltage continually varies between 0V and Vs-
0.7V, and secondly, for half the time there is no output at all.
The Full-wave Rectifier

The circuit in figure 3 addresses the second of these problems since at no time is the output
voltage 0V. This time four diodes are arranged so that both the positive and negative parts of the
AC waveform are converted to DC. The resulting waveform is shown in figure 4.

Figure: Full-Wave Rectifier

Figure: Full-Wave Rectification

When the AC input is positive, diodes A and B are forward-biased, while diodes C and D are
reverse-biased. When the AC input is negative, the opposite is true - diodes C and D are
forward-biased, while diodes A and B are reverse-biased.
While the full-wave rectifier is an improvement on the half-wave rectifier, its output still isn't
suitable as a power supply for most circuits since the output voltage still varies between 0V and
Vs-1.4V. So, if you put 12V AC in, you will 10.6V DC out.

Capacitor Filter

The capacitor-input filter, also called "Pi" filter due to its shape that looks like the Greek letter
pi, is a type of electronic filter. Filter circuits are used to remove unwanted or undesired
frequencies from a signal.

Figure: Capacitor Filter

A typical capacitor input filter consists of a filter capacitor C1, connected across the rectifier
output, an inductor L, in series and another filter capacitor connected across the load.

1. The capacitor C1 offers low reactance to the AC component of the rectifier output while
it offers infinite reactance to the DC component. As a result the capacitor shunts an
appreciable amount of the AC component while the DC component continues its journey
to the inductor L
2. The inductor L offers high reactance to the AC component but it offers almost zero
reactance to the DC component. As a result the DC component flows through the
inductor while the AC component is blocked.
3. The capacitor C2 bypasses the AC component which the inductor had failed to block. As
a result only the DC component appears across the load RL.
 Figure: Centered Tapped Full-Wave Rectifier with a Capacitor Filter

Voltage Regulator:

A voltage regulator is an electrical regulator designed to automatically maintain a constant

voltage level. It may use an electromechanical mechanism, or passive or active electronic
components. Depending on the design, it may be used to regulate one or more AC or DC
voltages. There are two types of regulator are they.

 Positive Voltage Series (78xx) and

 Negative Voltage Series (79xx)

78xx:

’78’ indicate the positive series and ‘xx’indicates the voltage rating. Suppose 7805 produces
the maximum 5V.’05’indicates the regulator output is 5V.

79xx:

’78’ indicate the negative series and ‘xx’indicates the voltage rating. Suppose 7905
produces the maximum -5V.’05’indicates the regulator output is -5V.

These regulators consists the three pins there are

Pin1: It is used for input pin.

Pin2: This is ground pin for regulator

Pin3: It is used for output pin. Through this pin we get the output.

Figure: Regulator

Features:

 Output Current of 1.5A

 Output Voltage Tolerance of 5%

 Internal thermal overload protection

 Internal Short-Circuit Limited

 No External Component

 Output Voltage 5.0V, 6V, 8V, 9V, 10V, 12V, 15V, 18V, 24V

 Offer in plastic TO-252, TO-220 & TO-263

 Direct Replacement for LM78XX

CHAPTER-4
Microcontroller (AT89S52)

Description of Microcontroller 89S52:

The AT89S52 is a low-power, high-performance CMOS 8-bit micro controller with

8Kbytes of in-system programmable flash memory. The device is manufactured Atmel’s high-
density nonvolatile memory technology and is compatible with the industry-standard 80C51
micro controller. The on-chip Flash allows the program memory to be reprogrammed in-system
or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with
in-system programmable flash one monolithic http; the Atmel AT89S52 is a powerful micro
controller, which provides a highly flexible and cost effective solution to any cost effective
solution to any embedded control applications to any embedded control applications.

The AT89S52 provides the following standard features: 8K bytes of Flash, 256 bytes of
RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit timer/counters, full duplex
serial port, on-chip oscillator, and clock circuitry. In addition, the AT89S52 is designed with
static logic for operation down to zero frequency and supports two software selectable power
saving modes. The Idle Mode stops the CPU while allowing the RAM timer/counters, serial port,
and interrupt system to continue functioning. The Power-down mode saves the RAM contents
but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware
reset.

Architecture of 8052µC:
 Figure: Microcontroller Architecture

Features:

• Compatible with MCS-51 Products

• 8K Bytes of In-System Programmable (ISP) Flash Memory

– Endurance: 1000 Write/Erase Cycles

• 4.0V to 5.5V Operating Range

• Fully Static Operation: 0 Hz to 33 MHz

• Three-level Program Memory Lock

• 256K Internal RAM

• 32 Programmable I/O Lines

• 3 16-bit Timer/Counters

• Eight Interrupt Sources

• Full Duplex UART Serial Channel

• Low-power Idle and Power-down Modes

• Interrupt Recovery from Power-down Mode

• Watchdog Timer

• Dual Data Pointer

• Power-off Flag

Pin Diagram:

Pin Description:
VCC 40

Supply voltage.

GND 20

Ground.

Port 0 (32-39):

Port 0 is an 8-bit open drain bi-directional I/O port. As an output port, each pin can sink
eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance
inputs. Port 0 can also be configured to be the multiplexed low order address/data bus during
accesses to external program and data memory. In this mode, P0 has internal pull-ups. Port 0 also
receives the code bytes during Flash Programming and outputs the code bytes during program
verification. External pull-ups are required during program verification

Port 1 (1-8):

Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 Output buffers can
sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the
internal pull-ups and can be used as inputs. In addition, P1.0 and P1.1 can be configured to be the
timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input P1.1/T2EX),
respectively, as shown in the following table. Port 1 also receives the low-order address bytes
during Flash programming and verification.

Port 2 (21-28):
 Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output buffers can
sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the
internal pull-ups and can be used as inputs. Port 2 emits the high-order address byte during
fetches from external program memory and during accesses to external data memory that uses
16-bit addresses (MOVX @DPTR). In this application, Port 2 uses strong internal pull-ups when
emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI),
Port 2emits the contents of the P2 Special Function Register. Port 2 also receives the high-order
address bits and some control signals during Flash programming and verification

Port 3 (10-17):

Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output buffers can
sink/source four TTL inputs. When 1s are writ 1s are written to Port 3 pins, they are pulled high
by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being
pulled low will source current (IIL) because of the pull-ups. Port 3 also serves the functions of
various special features of the AT89S52, as shown in the following table.

Port 3 also receives some control signals for Flash programming and verification.

RST

Reset input. A high on this pin for two machine cycles while the oscillator is running resets
the device.

ALE/PROG
 Address Latch Enable (ALE) is an output pulse for latching the low byte of the address
during accesses to external memory. This pin is also the program pulse input (PROG) during
Flash programming. In normal operation, ALE is emitted at a constant rate of1/6 the oscillator
frequency and may be used for external timing or clocking purposes. Note, however, that one
ALE pulse is skipped during each access to external data Memory. If desired, ALE operation can
be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a
MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable
bit has no effect if the micro controller is in external execution mode.

PSEN

Program Store Enable (PSEN) is the read strobe to external program memory. When the
AT89S52 is executing code from external program memory, PSEN is activated twice each
machine cycle, except that two PSEN activations are skipped during each access to external data
memory.

EA/VPP: External Access Enable. EA must be strapped to GND in order to enable the device to
fetch code from external program memory locations starting at 0000H up to FFFFH. Note,
however, that if lock bit 1 is programmed, EA will be internally latched on reset. A should be
strapped to VCC for internal program executions. This pin also receives the 12-voltProgramming
enables voltage (VPP) during Flash programming.

XTAL1:

Input to the inverting oscillator amplifier and input to the internal clock operating circuit.

XTAL2:

Output from the inverting oscillator amplifier.

Oscillator Characteristics:

XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier that
can be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quartz crystal or
ceramic resonator may be used. To drive the device from an External clock source, XTAL2
should be left unconnected while XTAL1 is driven.
 Fig: Oscillator Connections

Special Function Register (SFR) Memory:

Special Function Registers (SFR s) are areas of memory that control specific
functionality of the 8051 processor. For example, four SFRs permit access to the 8051’s 32
input/output lines. Another SFR allows the user to set the serial baud rate, control and access
timers, and configure the 8051’s interrupt system.

Accumulator: The Accumulator, as its name suggests is used as a general register to

accumulate the results of a large number of instructions. It can hold 8-bit (1-byte) value and is
the most versatile register.

The “R” registers: The “R” registers are a set of eight registers that are named R0, R1.
etc. up to R7. These registers are used as auxiliary registers in many operations.

The “B” registers: The “B” register is very similar to the accumulator in the sense that it may
hold an 8-bit (1-byte) value. Two only uses the “B” register 8051 instructions: MUL AB and
DIV AB.
Data Pointer:

The Data pointer (DPTR) is the 8051’s only user accessible 16-bit (2Bytes) register. The
accumulator, “R” registers are all 1-Byte values. DPTR, as the name suggests, is used to point to
data. It is used by a number of commands, which allow the 8051 to access external memory.

Programs counter & Stack pointer:

The program counter (PC) is a 2-byte address, which tells the 8051 where the next
instruction to execute is found in memory. The stack pointer like all registers except DPTR and
PC may hold an 8-bit (1-Byte) value.

Memory:

Special Function Registers (SFRs) are areas of memory that control specific functionality of
the 8051 processor. For example, four SFRs permit access to the 8051’s 32 input/output lines.
Another SFR allows the user to set the serial baud rate, control and access timers, and configure
the 8051’s interrupt system.

Interrupt Registers:

The individual interrupt enable bits are in the IE register . Two priorities can be
set for each of the six interrupt sources in the IP register.
Timer 0:
Timer 0 functions as either a timer or event counter in four modes of operation .
Timer 0 is controlled by the four lower bits of the TMOD register and bits 0, 1, 4 and 5
of the TCON register. Mode 0 ( 13-bit Timer) Mode 0 configures timer 0 as a 13-bit
timer which is set up as an 8-bit timer (TH0 register) with a modulo 32 pre-scale
implemented with the lower five bits of the TL0 register . The upper three bits of TL0
register are indeterminate and should be ignored. Pre-scale overflow increments the
TH0 register. Mode 1 ( 16-bit Timer )Mode 1 is the same as Mode 0, except that the
Timer register is being run with all 16 bits .

Mode 1 configures timer 0 as a 16-bit timer with the TH0 and TL0 registers
connected in cascade. The selected input increments the TL0 register. Mode 2 (8-bit
Timer with Auto-Reload)Mode 2 configures timer 0 as an 8-bit timer ( TL0 register )
that automatically reloads from the TH0 register . TL0 overflow sets TF0 flag in the
TCON register and reloads TL0 with the contents of TH0, which is preset by
software. Mode 3 ( Two 8-bit Timers )Mode 3 configures timer 0 so that registers TL0
and TH0 operate as separate 8-bit timers. This mode is provided for applications requiring
an additional 8-bit timer or counter.

Timer 1:

Timer 1 is identical to timer 0, except for mode 3, which is a hold-count mode. Mode 3
(Halt) Placing Timer 1 in mode 3 causes it to halt and hold its count. This can be
used to halt Timer 1 when TR1 run control bit is not available i.e., when Timer 0 is
in mode 3.

Baud Rates:

The baud rate in Mode 0 is fixed. The baud rate in Mode 2 depends on the value
of bit SMOD in Special Function Register PCON. If SMOD = 0 (which is its value on
reset), the baud rate is 1/64 the oscillator frequency. If SMOD = 1, the baud rate is
1/32 the oscillator frequency. In the 89S52, the baud rates in Modes 1 and 3 are
determined by the Timer 1 overflow rate. In case of Timer 2 , these baud rates can
be determined by Timer 1 , or by Timer 2 , or by both (one for transmit and the other for
receive ).

TCON REGISTER: Timer/counter Control Register

7 6 5 4 3 2 1 0

TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

Bit Bit Description

Number Mnemonics

7 TF1 Timer 1 overflow flag

Cleared by hardware when processor vectors to interrupt routien.

Set by hardware on timer/counter overflow, when the imer 1 register

overflows.

6 TR1 Timer 1 run control bit

Clear to turn off timer/counter 1.

Set to turn on timer/counter 1.

5 TF0 Timer 1 overflow flag

Cleared by hardware when processor vectors to interrupt routien.

Set by hardware on timer/counter overflow, when the timer0 register

overflows.

4 TR0 Timer 1 run control bit

Clear to turn off timer/counter 0.

Set to turn on timer/counter 0.

3 IE1 Interrupt 1 Edge flag

Cleared by hardware when interrupt is processed if edge-triggered (IT1)

Set by hardware when external interrupt is detected on INT1 pin.

2 IT1 Interrupt 1 type control bit

 Clear to select low level active (level triggered) for external interrupt 1.

Set to select falling edge active (edge triggered) for external interrupt 1.

1 IE0 Interrupt 0 Edge flag

Cleared by hardware when interrupt is processed if edge-triggered (IT0)

Set by hardware when external interrupt is detected on INT0 pin.

0 IT0 Interrupt 0 type control bit

Clear to select low level active (level triggered) for external interrupt 0.

Set to select falling edge active (edge triggered) for external interrupt 0.

TMOD REGISTER: Timer/Counter 0 and 1 Modes

7 6 5 4 3 2 1 0

GATE1 C/T 1 M11 M01 GATE0 C/T 0 M10 M00

Bit Bit Mnemonics Description

Number
7 GATE1 Timer 1 Gate Control Bit

Clear to enable timer 1 whenever the TR1 bit is set.

Set to enable timer 1 only while the INT1 pin is high & TR1 bit is set.
6 C/T 1 Timer1 counter/timer select bit

Clear for timer operation: timer1 counts the divided down system
clock.

Set for counter operation: timer1 counts negative transition on external

pin T1.
5 M11 Timer 1 mode select bits
4 M01
M11 M01 operating mode

0 Mode0: 8 bit timer/counter (TH1) with 5 bit

prescaler (TL1).

1 Mode1: 16 bit timer/counter.

0 Mode2: 8 bit auto reload timer/counter (TL1).

1 1 Mode3: timer 1 halted. Retains count.

3 GATE 0 Timer 0 Gate Control Bit

Clear to enable timer 0 whenever the TR0 bit is set.

Set to enable timer 0 only while the INT0 pin is high & TR0 bit is set.
2 C/T 0 Timer0 counter/timer select bit

Clear for timer operation: timer0 counts the divided down system
clock.

Set for counter operation: timer0 counts negative transition on external

pin T0.
1 M10 Timer 0 mode select bits

M10 M00 operating mode

0 Mode0: 8 bit timer/counter (TH1) with 5 bit

pre-scaler (TL1).

1 Mode1: 16 bit timer/counter.

0 Mode2: 8 bit auto reload timer/counter (TL1).

1 1 Mode3: timer 1 halted. Retains count.

TH0 is an 8 bit timer using timer1’s TR0 & TF0 bits.

 CHAPTER-5

What is a Communication?
Communication is a process of transferring information from one entity to another.
Communication processes are sign-mediated interactions between at least two agents which
share a repertoire of signs and semiotic rules. Communication is commonly defined as "the
imparting or interchange of thoughts, opinions, or information by speech, writing, or signs".

Communication is a process whereby information is enclosed in a package and is channeled

and imparted by a sender to a receiver via some medium. The receiver then decodes the message
and gives the sender a feedback. All forms of communication require a sender, a message, and an
intended recipient; however the receiver need not be present or aware of the sender's intent to
communicate at the time of communication in order for the act of communication to occur.
Communication requires that all parties have an area of communicative commonality. There are
auditory means, such as speech, song, and tone of voice, and there are nonverbal means, such as
body language, sign language, paralanguage, touch, eye contact, through media, i.e., pictures,
graphics and sound, and writing

Figure: Transactional Model of Communication

Communication System

Communications system is a collection of individual communications networks, transmission

systems, relay stations, tributary stations, and data terminal equipment (DTE) usually capable of
interconnection and interoperation to form an integrated whole. The components of a

communications system serve a common purpose, are technically compatible, use common
procedures, respond to controls, and operate in unison. Telecommunications is a method of
communication (e.g., for sports broadcasting, mass media, journalism, etc.).
 Figure: Block Diagram for Communication System
Examples: Radio Communication System
A radio communication system is composed of several communications subsystems that give
exterior communications capabilities. A radio communication system comprises a transmitting
conductor in which electrical oscillations or currents are produced and which is arranged to cause
such currents or oscillations to be propagated through the free space medium from one point to
another remote there from and a receiving conductor at such distant point adapted to be excited
by the oscillations or currents propagated from the transmitter.
RF Communication:
Every system is automated in order to face new challenges in the present day situation.
Automated systems have less manual operations, so that the flexibility, reliabilities are high and
accurate. Hence every field prefers automated control systems. Especially in the field of
electronics automated systems are doing better performance. Any automated system will work
effectively if it access wirelessly. Here in this project we are going to use RF communication for
remote accessing of automated system. Probably the most useful thing to know about the RF
communication is that it is an international standard communication.
RF communication works by creating electromagnetic waves at a source and being able to pick
up those electromagnetic waves at a particular destination. These electromagnetic waves travel
through the air at near the speed of light. The wavelength of an electromagnetic signal is
inversely proportional to the frequency; the higher the frequency, the shorter the wavelength.
RF Transmitter
RF Link Transmitter - 434MHz

Description:

This is only the 434MHz transmitter. This will work with the RF Links at 434MHz at either baud
rate. Only one 434MHz transmitter will work within the same location.

This wireless data is the easiest to use, lowest cost RF link we have ever seen! Use these
components to transmit position data, temperature data, even current program register values
wirelessly to the receiver. These modules have up to 500 ft range in open space. The transmitter
operates from 2-12V. The higher the Voltage, the greater the range - see range test data in the
documents section.

We have used these modules extensively and have been very impressed with their ease of use
and direct interface to an MCU. The theory of operation is very simple. What the transmitter
'sees' on its data pin is what the receiver outputs on its data pin. If you can configure the UART
module on a PIC, you have an instant wireless data connection. The typical range is 500ft for
open area. This is an ASK transmitter module with an output of up to 8mW depending on power
supply voltage. The transmitter is based on SAW resonator and accepts digital inputs, can
operate from 2 to 12 Volts-DC, and makes building RF enabled products very easy.

Figure: RF Transmitter

RF Receiver
RF Link 4800bps Receiver - 434MHz

Description:

Sold as a receiver only. This receiver type is good for data rates up to 4800bps and will only
work with the 434MHz transmitter. Multiple 434MHz receivers can listen to one 434MHz
transmitter.

This wireless data is the easiest to use, lowest cost RF link we have ever seen! Use these
components to transmit position data, temperature data, and even current program register values
wirelessly to the receiver. These modules have up to 500 ft range in open space. The receiver is
operated at 5V.

We have used these modules extensively and have been very impressed with their ease of use
and direct interface to an MCU. The theory of operation is very simple. What the transmitter
'sees' on its data pin is what the receiver outputs on its data pin. If you can configure the UART
module on a PIC, you have an instant wireless data connection. Data rates are limited to
4800bps. The typical range is 500ft for open area.

This receiver has a sensitivity of 3uV. It operates from 4.5 to 5.5 volts-DC and has digital output.
The typical sensitivity is -103dbm and the typical current consumption is 3.5mA for 5V
operation voltage.

Figure:RF Receiver

Features:
 • 434 MHz Operation
• 500 Ft. Range - Dependent on Transmitter Power Supply
• 4800 bps transfer rate
• Low cost
• Extremely small and light weight

Encoder (HT12E)

General Description:

The 212 encoders are a series of CMOS LSIs for remote control system applications. They are
capable of encoding information which consists of N address bits and 12-N data bits. Each
address / data input can be set to one of the two logic states. The programmed addresses/data are
transmitted together with the header bits via an RF or an infrared transmission medium upon
receipt of a trigger signal. The capability to select a TE trigger on the HT12E or a DATA trigger
on the HT12A further enhances the application flexibility of the 212 series of encoders. The
HT12A additionally provides a 38 kHz carrier for infrared systems.

Features:

 18 pin DIP

 Operating voltage is 2.4V ~ 12V

 Low power and high noise immunity CMOS technology

 Low standby current: 0.1µA (typ.) at VDD = 5V

 Minimum transmission four words for the HT12E

 Built in oscillator needs only 5% resistor

 Data code has positive polarity

 Minimal external component

Functional Description:
Operation:
The 212 series of encoders begin a 4 word transmission cycle upon receipt of a
transmission enable. This cycle will repeat itself as long as the transmission enable is held low.
Once the transmissions enable returns high the encoder output completes its final cycle and then
stops as shown below.

Address/Data waveform:
Each programmable address/data pin can be externally set to one the following two logic states
as shown below.

Address/data programming (preset):

The status of each address/data pin can be individually pre-set to logic “high” or “low”. If a
transmission enable signal is applied, the encoder scans and transmits the status of the 12 bits of
address/data serially in the order A0 to AD11 for the HT12E encoder.
During information transmission these bits are transmitted with a preceding synchronization bit.
If the trigger signal is not applied, the chip enters the standby mode and consumes a reduced
current of less than 1µA for a supply voltage of 5V.
Usual information preset the address pins with individual security codes using DIP switches or
PCB wiring, while the data is selected by push buttons or electronic switches.
Address/Data sequence:
The following provides the address/data sequence table for various models of the 212 series of
encoders. The correct device should be selected according to the individual address and data
requirements.
Address/Data Bits
0 1 2 3 4 5 6 7 8 9 10 11
HT12E
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11

Transmission Enable:
For the HT12E encoders, transmission is enabled by applying a low signal to the TE pin.

Pin Diagram:

HT12E
Pin Description:
A0-A7
These are the input pins for address A0 – A7. These pins can be externally set to Vss or
left open.
Dout
This pin is encoder data serial transmission out pin.
TE
It’s a transmission enable pin and it’s a active low pin.
OSC1
Oscillator input pin.
OSC2
Oscillator output pin.
Vss
Ground pin.
Vdd
Power supply pin.
Absolute Maximum Ratings:
Supply voltage…………………-0.3V to 13V
Input voltage……………………Vss -0.3V t Vdd +03V
Storage a Temperature….. -500C to 1250C
Operating Temperature….. -200C to 750C

Decoder (HT12D):

General Description:

The 212 decoders are a series of CMOS LSIs for remote control system applications. They are
paired with 212 series of encoder. For proper operation, a pair of encoder/decoder with the same
number of address and data format should be chosen.

The decoders receive serial address and data from a programmed 212 series of encoders that are
transmitted by a carrier using an RF or an IR transmission medium. They compare the serial
input data three times continuously with their local addresses. If no error or unmatched codes are
found, the input data codes are decoded and then transferred to the output pins. The VT pin also
goes high to indicate a valid transmission.
The 212 series of decoders are capable of decoding information that consists of N bits of address
and 12-N bits of data. Of this series, the HT12D is arranged to provide 8 address bits and 4 data
bits.

Features:

 18 pin DIP

 Operating voltage 2.4V ~ 12V

 Low power and high noise immunity CMOS technology

 Low standby current

 Capable of decoding 12 bits of information

 Binary address setting

 Received codes are checked 3 times

 Address/Data number combination is 8 address bits and 4 data bits

 Built in oscillator needs only 5% resistor

 Valid transmission indicator

 Easy interface with an RF or an infrared transmission medium

 Minimal external components

 Pair with 212 series of encoders

Functional Description:

Operation:

The 212 series of decoders provides various combinations of addresses and data pins in different
packages so as to pair with the 212 series of encoders.
The decoders recevie data that are transmitted by an encoder and inerpret the first N bits of code
period as addresses and the last 12-N bits as data, where N is the address code number. A signal
on the DIN pin actives the oscillator which in turn decodes the incoming address and data. The
decoders will then check the recevied address three times continuously. If the recevied address
codes all match the contents of the decoders local address, the 12-N bits of data are decoded to
activate the output pins and the VT pin is set high to indicate a valid transmission. This will last
unless the address code is incorrect or no signal is recevied.

The output of the VT pin is high only when the transmission is valid. Otherwise it is always low.

Pin Diagram:

Pin Description:

A0 - A7

These are the input pins for address A0-A7 setting. These pins can be externally set to
Vss or left open.

D8 – D11

These are the output data pins, power on state is low.

Din

It is a serial data input pin.

VT

Valid transmission, active high pin.

OSC1

Oscillator input pin

OSC2

Oscillator output pin

Vss

Ground pin

Vdd

Power supply

Absolute Maximum Ratings:

Supply voltage…….. -0.3V to 13V

Input voltage………. Vss -0.3V to Vdd +0.3V

Storage Temperature……. -500C to 1250C

Applications:

 Burglar alarm, smoke alarm, fire alarm, car alarm, security system

 Garage door and car door controllers

 Cordless telephone

EEPROM:

DESCRIPTION:
The AT24C01A/02/04/08A/16A provides 1024/2048/4096/8192/16384 bits of serial electrically
erasable and programmable read-only memory (EEPROM) organized as 128/256/512/1024/2048
words of 8 bits each. The device is optimized for use in many automotive applications where
low-power and low-voltage operation are essential.

The AT24C01A/02/04/08A/16A is available in space-saving 8-lead PDIP, 8-lead JEDEC SOIC,

and 8-lead TSSOP packages and is accessed via a two-wire serial interface. In addition, the
entire family is available in 2.7V (2.7V to 5.5V) versions.

FEATURES:

 Medium-voltage and Standard-voltage Operation

– 5.0 (VCC = 4.5V to 5.5V)
– 2.7 (VCC = 2.7V to 5.5V)
 Automotive Temperature Range –40°C to 125°C
 Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K), 1024 x 8 (8K) or 2048 x
8 (16K)
 Two-wire Serial Interface
 Schmitt Trigger, Filtered Inputs for Noise Suppression
 Bidirectional Data Transfer Protocol
 400 kHz (2.7V) Compatibility
 Write Protect Pin for Hardware Data Protection
 8-byte Page (1K, 2K), 16-byte Page (4K, 8K, 16K) Write Modes
 Self-timed Write Cycle (5 ms max)
 High-reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years

DEVICE OPERATION:

CLOCK and DATA TRANSITIONS:

The SDA pin is normally pulled high with an external device. Data on the SDA pin may change
only during SCL low time periods. Data changes during SCL high periods will indicate a start or
stop condition as defined below.

Start Condition:

A high-to-low transition of SDA with SCL high is a start condition which must precede any
other command.

Stop Condition:

A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the
stop command will place the EEPROM in a standby power mode.

Acknowledgement:

All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words.
The EEPROM sends a “0” to acknowledge that it has received each word. This happens during
the ninth clock cycle.

Standby Mode:

The AT24C01A/02/04/08A/16A features a low-power standby mode which is enabled: (a) upon
power-up and (b) after the receipt of the STOP bit and the completion of any internal operations.

DEVICE ADDRESSING:

The 1K, 2K, 4K, 8K and 16K EEPROM devices all require an 8-bit device address word
following a start condition to enable the chip for a read or write operation. The device address
word consists of a mandatory “1”, “0” sequence for the first four most significant bits. This is
common to all the Serial EEPROM devices. The next 3 bits are the A2, A1 and A0 device
address bits for the 1K/2K EEPROM. These 3 bits must compare to their corresponding
hardwired input pins.
The 4K EEPROM only uses the A2 and A1 device address bits with the third bit being a memory
page address bit. The two device address bits must compare to their corresponding hardwired
input pins. The A0 pin is not connected.

The 8K EEPROM only uses the A2 device address bit with the next two bits being for memory
page addressing. The A2 bit must compare to its corresponding hardwired input pin. The A1 and
A0 pins are not connected.

The 16K does not use any device address bits but instead the three bits are used for memory page
addressing. These page addressing bits on the 4K, 8K and 16K devices should be considered the
most significant bits of the data word address which follows. The A0, A1 and A2 pins are no
connected. The eighth bit of the device address is the read/write operation select bit. A read
operation is initiated if this bit is high and a write operation is initiated if this bit is low. Upon
comparison of the device address, the EEPROM will output a “0”. If a comparison is not made,
the chip will return to a standby state.

WRITE OPERATIONS:

Byte Write:

A write operation requires an 8-bit data word address following the device address word and
acknowledgment. Upon receipt of this address, the EEPROM will again respond with a “0” and
then clock in the first 8-bit data word. Following the receipt of the 8-bit data word, the EEPROM
will output a “0” and the addressing device, such as a microcontroller, must terminate the write
sequence with a stop condition. At this time the EEPROM enters an internally timed write cycle
tWR, to the nonvolatile memory. All inputs are disabled during this write cycle and the
EEPROM will not respond until the write is complete.
Page Write:

The 1K/2K EEPROM is capable of an 8-byte page write, and the 4K, 8K and 16K devices are
capable of 16-byte page writes. A page write is initiated the same as a byte write, but the
microcontroller does not send a stop condition after the first data word is clocked in. Instead,
after the EEPROM acknowledges receipt of the first data word, the microcontroller can transmit
up to seven (1K/2K) or fifteen (4K, 8K, 16K) more data words. The EEPROM will respond with
a “0” after each data word received. The microcontroller must terminate the page write sequence
with a stop condition

The data word address lower three (1K/2K) or four (4K, 8K, 16K) bits are internally incremented
following the receipt of each data word. The higher data word address bits are not incremented,
retaining the memory page row location. When the word address, internally generated, reaches
the page boundary, the following byte is placed at the beginning of the same page. If more than
eight (1K/2K) or sixteen (4K, 8K, 16K) data words are transmitted to the EEPROM, the data
word address will “roll over” and previous data will be overwritten.

Page write
Acknowledge Polling:

Once the internally timed write cycle has started and the EEPROM inputs are disabled,
acknowledge polling can be initiated. This involves sending a start condition followed by the
device address word. The read/write bit is representative of the operation desired. Only if the
internal write cycle has completed will the EEPROM respond with a “0”, allowing the read or
write sequence to continue.

READ OPERATIONS:

Read operations are initiated the same way as write operations with the exception that the
read/write select bit in the device address word is set to “1”. There are three read operations:
current address read, random address read and sequential read.

Current address read:

The internal data word address counter maintains the last address accessed during the last read or
write operation, incremented by one. This address stays valid between operations as long as the
chip power is maintained. The address “roll over” during read is from the last byte of the last
memory page to the first byte of the first page. The address “roll over” during write is from the
last byte of the current page to the first byte of the same page. Once the device address with the
read/write select bit set to “1” is clocked in and acknowledged by the EEPROM, the current
address data word is serially clocked out. The microcontroller does not respond with an input “0”
but does generate a following stop condition.
Random read:

A random read requires a “dummy” byte write sequence to load in the data word address. Once
the device address word and data word address are clocked in and acknowledged by the
EEPROM, the microcontroller must generate another start condition. The microcontroller now
initiates a current address read by sending a device address with the read/write select bit high.
The EEPROM acknowledges the device address and serially clocks out the data word. The
microcontroller does not respond with a “0” but does generate a following stop condition.

Sequential Read:

Sequential reads are initiated by either a current address read or a random address read. After the
microcontroller receives a data word, it responds with an acknowledgement. As long as the
EEPROM receives an acknowledgement, it will continue to increment the data word address and
serially clock out sequential data words. When the memory address limit is reached, the data
word address will “roll over” and the sequential read will continue. The sequential read operation
is terminated when the microcontroller does not respond with a “0” but does generate a
following stop condition.

BUS TIMINGS:

WRITE CYCLE TIMINGS:

START AND STOP DEFINITION:

PIN DIAGRAM:

Figure: Pin Diagram Figure: Pin Function

PIN DESCRIPTION:

Serial Clock (SCL):

The SCL input uses positive edge clock to send data into each EEPROM device and negative
edge clock to bring data out of each device.

Serial Data (SDA):

The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may be
wire-O Red with any number of other open-drain or open collector devices.

Device/Page Address (A2, A1 and A0):

The A2, A1 and A0 pins are device address inputs that are hard wired for the AT24C01A and the
AT24C02. As many as eight 1K/2K devices may be addressed on a single bus system. The
AT24C04 uses the A2 and A1 inputs for hard wire addressing and a total of four 4K devices may
be addressed on a single bus system. The A0 pin is not connected. The AT24C08A only uses the
A2 input for hardwire addressing and a total of two 8K devices may be addressed on a single bus
system. The A0 and A1 pins are not connected. The AT24C16A does not use the device address
pins, which limits the number of devices on a single bus to one. The A0, A1 and A2 pins are not
connected.

Write Protect (WP):

The AT24C01A/02/04/08A/16A has a Write Protect pin that provides hardware data protection.
The Write Protect pin allows normal read/write operations when connected to ground (GND).
When the Write Protect pin is connected to VCC, the write protection feature is enabled and
operated as shown in the table.

MEMORY ORGANISATION:

AT24C01A, 1K SERIAL EEPROM:

Internally organized with 16 pages of 8 bytes each, the 1K requires a 7-bit data word address for
random word addressing.

AT24C02, 2K SERIAL EEPROM:

Internally organized with 32 pages of 8 bytes each, the 2K requires an 8-bit data word address
for random word addressing.

AT24C04, 4K SERIAL EEPROM:

Internally organized with 32 pages of 16 bytes each, the 4K requires a 9-bit data word address
for random word addressing.
AT24C08A, 8K SERIAL EEPROM:

Internally organized with 64 pages of 16 bytes each, the 8K requires a 10-bit data word address
for random word addressing.

AT24C16A, 16K SERIAL EEPROM:

Internally organized with 128 pages of 16 bytes each, the 16K requires an 11-bit data word
address for random word addressing.

INTERFACING AT24C16A SERIAL EEPROM WITH AT89C51 MICRO

CONTROLLER:

Serial memory devices offer significant advantages over parallel devices in applications where
lower data transfer rates are acceptable. In addition to requiring less board space, serial devices
allow microcontroller I/O pins to be conserved. This is especially valuable when adding external
memory to low-pin count microcontrollers such as AT89C2051 and AT89C4051.

This application note presents a suite of software routines which may be incorporated into a
user’s application to allow an AT89CX051 microcontroller to read and write AT24C16A serial
EEPROM. The software supports all members of the AT24CXX family, and may easily be
modified for compatibility with any of the Atmel 8051-code compatible microcontrollers.

Hardware:

A typical interconnection between an AT89C51 microcontroller and an AT24C16A serial

EEPROM may share the bus, up to eight members of the AT24CXX family utilizing the same
two microcontroller I/O pins. Each device on the bus must have its address inputs (A0, A1 and
A2) hard-wired to a unique address. The first device recognizes address zero (A0, A1, A2 tied
low), while the eighth recognizes address seven (A0, A1, A2 tied high). Not all members of the
AT24CXX family recognize all 3 address inputs, limiting the number of some devices which
may be present to less than eight.

Bi-directional Data Transfer Protocol:

The Bi-directional Data Transfer Protocol utilized by the AT24CXX family allows a number of
compatible devices to share a common 2-wire bus. The bus consists of a serial clock (SCL) line
and a serial data (SDA) line. The clock is generated by the bus master and data is transmitted
serially on the data line, most significant bit first, synchronized to the clock. The protocol
supports bi-directional data transfers in 8-bit bytes. In this application, the microcontroller serves
as the bus master, initiating all data transfers and generating the clock which regulates the flow
of data. The serial devices present on the bus are considered slaves, accepting or sending data in
response to orders from the master. The bus master initiates a data transfer by generating a start
condition on the bus. This is followed by transmission of a byte containing the device address of
the intended recipient. The device address consists of a 4-bit fixed portion and a 3-bit
programmable portion. The fixed portion must match the value hard-wired into the slave, while
the programmable portion allows the master to select between a maximum of eight slaves of
similar type on the bus. The AT24C16A serial EEPROM responds to device addresses with a
fixed portion equal to “1010” and a programmable portion matching the address inputs (A0, A1
and A2).

KEYPAD (matrix):

A keypad is a set of buttons arranged in a block or "pad" which usually bear digits and other
symbols and usually a complete set of alphabetical letters. If it mostly contains numbers then it
can also be called a numeric keypad.

Keypads are found on many alphanumeric keyboards and on other devices such as calculators,
push-button telephones, combination locks, and digital door locks, which require mainly numeric
input. In keypad we have keys arrays in which keys can be arranged in different combinations
and the matrix keypad in which keys are arrange in a particular rows and columns.

Figure: matrix keypad on PCB board.

CONSTRUCTING A MATRIX KEYPAD:

Construction of a keypad is really simple. As per the outline shown in the figure below we have
four rows and four columns. In between each overlapping row and column line there is a key.

So keeping this outline we can construct a keypad using simple SPST Switches as shown below:

Figure: Internal Key Connections

SCANNING A MATRIX KEYPAD:

There are many methods depending on how you connect your keypad with your controller, but
the basic logic is same. We make the columns as i/p and we drive the rows making them o/p, this
whole procedure of reading the keyboard is called scanning.

In order to detect which key is pressed from the matrix, we make row lines low one by one and
read the columns. Let’s say we first make Row1 low, and then read the columns. If any of the
key in row1 is pressed will make the corresponding column as low i.e. if second key is pressed in
Row1, then column2 will give low. So we come to know that key 2 of Row1 is pressed. This is
how scanning is done.

So to scan the keypad completely, we need to make rows low one by one and read the columns.
If any of the buttons is pressed in a row, it will take the corresponding column to a low state
which tells us that a key is pressed in that row. If button 1 of a row is pressed then Column 1 will
become low, if button 2 then column2 and so on...

SCHEMATIC:

Figure: keypad arrangement

The internal arrangement of the keys in a matrix keypad can be seen in the above figure. We can
arrange them in the particular columns and particular rows. Interface of the key pad to the micro
controller is shown the figure below. Depending on the number of keys required for the
application the matrix form is prepared. So for each key has two terminals one for the ground
and one is for the port pins. Each key need port allotment.

Matrix keypad of 4*4 (four rows and four columns) for that one columns ground terminals are
connected commonly and that is given to the one port pin. Input terminal of the keys according
to the one row all are connected commonly and that is given to the one port pins.

Like for 4*4 matrix keypad one port of micro controller totally used. Four pins for the ground
purpose and four pins for the input purpose.

Keypad Interfacing to Microcontroller:

Flow Chart:
Application:

 Key pad is used for the telephones, mobile phones.

 Key pads are used at the bank locker system.

 There used the companies to enter the id numbers of the particular employee.

Uses

 The keypad of a calculator contains the digits 0 through 9, from bottom upwards,
together with the four arithmetic operations.

 Keypads are also a feature of some combination locks. This type of lock is often used
on doors, such as that found at the main entrance to some offices.

 Many laptop computers have special function keys which turn part of the
alphabetical keyboard into a numerical keypad as there is insufficient space to allow a
 separate keypad to be built into the laptop's chassis. Separate external plug-in keypads
can be purchased.

LCD(Liqiud Crystal Display ):

One of the most common devices attached to an controller is an LCD display. Some of the most
common LCDs connected to the controllers are 16X1, 16x2 and 20x2 displays. This means 16
characters per line by 1 line 16 characters per line by 2 lines and 20 characters per line by 2 lines,
respectively. But in this project we are interfacing the 16*2 LCD it consists a 16 pins.

Schematic Diagram:
 Figure: Schematic Diagram

Pin Description:

Symbol Level Function

Pin

1 VSS - Power, GND

2 VDD - Power, 5V

3 Vo - Power, for LCD Drive

Register Select Signal

4 RS H/L H: Data Input
L: Instruction Input

H: Data Read (LCD->MPU)

5 R/W H/L
L: Data Write (MPU->LCD)

6 E H,H->L Enable

7-14 DB0-DB7 H/L Data Bus; Software selectable 4- or 8-bit mode

15 NC - NOT CONNECTED

16 NC - NOT CONNECTED
LCD consists of the three control line (RS, R/W &En), eight data lines (D0-D7), Supply Voltage
(Vcc), Contrast control (Vee) and ground (Vss).

Control Pins Description :

EN (Enable):

Line is called "Enable." This control line is used to tell the LCD that you are sending it data. To
send data to the LCD, your program should make sure this line is low (0) and then set the other
two control lines and/or put data on the data bus. When the other lines are completely ready,
bring EN high (1) and wait for the minimum amount of time required by the LCD datasheet (this
varies from LCD to LCD), and end by bringing it low (0) again.

RS (Register Select):

Line is the "Register Select" line. When RS is low (0), the data is to be treated as a command or
special instruction (such as clear screen, position cursor, etc.). When RS is high (1), the data
being sent is text data which should be displayed on the screen. For example, to display the letter
"T" on the screen you would set RS high.

R/W (Read write):

Line is the "Read/Write" control line. When RW is low (0), the information on the data bus is
being written to the LCD. When RW is high (1), the program is effectively querying (or reading)
the LCD. Only one instruction ("Get LCD status") is a read command. All others are write
commands, so RW will almost always be low.

Finally, the data bus consists of 4 or 8 lines (depending on the mode of operation selected by the
user). In the case of an 8-bit data bus, the lines are referred to as DB0, DB1, DB2, DB3, DB4,
DB5, DB6, and DB7.

Logic status on control lines:

• E - 0 Access to LCD disabled

- 1 Access to LCD enabled

• R/W - 0 Writing data to LCD

- 1 Reading data from LCD

• RS - 0 Instructions

- 1 Character
Writing data to the LCD:

1) Set R/W bit to low

2) Set RS bit to logic 0 or 1 (instruction or character)

3) Set data to data lines (if it is writing)

4) Set E line to high

5) Set E line to low

Read data from data lines (if it is reading) on LCD:

1) Set R/W bit to high

2) Set RS bit to logic 0 or 1 (instruction or character)

3) Set data to data lines (if it is writing)

4) Set E line to high

5) Set E line to low

 CHAPTER-6

SOFTWARE EXPLANATION

KEIL Software:

Installing the Keil software on a Windows PC:

 Insert the CD-ROM in your computer’s CD drive.

  On most computers, the CD will “auto run”, and you will see the Keil installation menu.
 If the menu does not appear, manually double click on the Setup icon, in the root
directory: you will then see the Keil menu.
 On the Keil menu, please select “Install Evaluation Software”. (You will not require a
license number to install this software).
 Follow the installation instructions as they appear.

Loading the Projects:

The example projects for this book are NOT loaded automatically when you install the
Keil compiler. These files are stored on the CD in a directory “/Pont”. The files are arranged by
chapter: for example, the project discussed in Chapter 3 is in the directory “/Pont/Ch03_00-
Hello”. Rather than using the projects on the CD (where changes cannot be saved), please copy
the files from CD onto an appropriate directory on your hard disk.
Note: you will need to change the file properties after copying: file transferred from the CD will
be ‘read only’.

Configuring the Simulator:

Open the Keil µ Vision2

Go to Project – Open Project and browse for Hello in Ch03_00 in Pont and open it.

Go to Project – Select Device for Target ‘Target1’

Select 8052(all variants) and click OK

Now we need to check the oscillator frequency:

Go to project – Options for Target ‘Target1’

Make sure that the oscillator frequency is 12MHz.

Building the Target

Build the target as illustrated in the figure below

Running the Simulation

Having successfully built the target, we are now ready to start the debug session and run the
simulator. First start a debug session
The flashing LED we will view will be connected to Port 1. We therefore want to observe the
activity on this
To ensure that the port activity is visible, we need to start the ‘periodic window update’ flag

Go to Debug - Go

While the simulation is running, view the performance analyzer to check the delay durations.
Go to Debug – Performance Analyzer and click on it
Double click on DELAY_LOOP_Wait in Function Symbols: and click Define button
Schematics

Transmitter Section

Receiver Section
Schematic Explanation

Transmitter Section

In this project we are interfacing different devices to microcontroller (AT89S52).AT89S52 is the

40 pin DIP (Dual In-Line Package) in this controller we have 32 I/O pins. To these Pins we can
connect to any devices and can be used as input /output devices. In order to make the IC work we
need to supply some voltage i.e., 5V supply is given to microcontroller i.e., 40 pin and GND is
connected to 20 pin to microcontroller.

Internal Clock frequency of microcontroller is 12MHz, in order to trigger the controller we have
to give the external clock frequency or external clock pulses i.e., 11.0592 MHz approximately it
is generated by the quad crystal from pins 18 & 19 in controller (XLAT1 & XLAT2).For
resetting the controller we have to connect a capacitor, a resister and a switch to 9 pin in
controller.

Here we interfaced the RF receiver, Encoder (HT12E), EEPROM, Buzzer, LCD and switches.
To port3 we interface the encoder, a encoder is one which consists the ‘n‘ inputs and ‘2n’
outputs.HT 12 E is a 18 pin IC in that 1 to 9 pin are connected to ground from 17 is connected to
RF transmitter RF transmitter consisting total 4 pin in that ground pin (GUD),One Data pin, one
are given to supply voltage (+5v supply)and one pin for antenna ,10to13 pins in
HT12D(decoder) are connected to microcontroller port 3.4 to 3.7 pins. In project we using the
434MHz frequency, the maximum range of these project is 50meters or 500feets.

EEPROM (24LC02B) is the 8-pin DIP IC; it is interfaced to microcontroller port 2.0 and port
2.1(SCL &SDA) 8-pin connected to supply (5Volt),4-pin is for GND, pin 1to pin 3 are address
pins these pins are connected to GND.

Here four switches are connected to port2 of microcontroller; those switches are connected to
port2.2 to port 2.5 in microcontroller port pins.

Receiver Section

In this project we are interfacing different devices to microcontroller (AT89S52).AT89S52 is the

40 pin DIP (Dual In-Line Package) in this controller we have 32 I/O pins. To these Pins we can
connect to any devices and can be used as input /output devices. In order to make the IC work we
need to supply some voltage i.e., 5V supply is given to microcontroller i.e., 40 pin and GND is
connected to 20 pin to microcontroller.

Internal Clock frequency of microcontroller is 12MHz, in order to trigger the controller we have
to give the external clock frequency or external clock pulses i.e., 11.0592 MHz approximately it
is generated by the quad crystal from pins 18 & 19 in controller (XLAT1 & XLAT2).For
resetting the controller we have to connect a capacitor, a resister and a switch to 9 pin in
controller.

Here we interfaced the RF receiver, decoder (HT12D), EEPROM, Buzzer, LCD and switches.
To port3 we interface the decoder, a decoder is one which consists the ‘2 n ‘ inputs and ‘n’
outputs.HT 12 D is a 18 pin IC in that 1 to 9 pin are connected to ground from 14 is connected to
RF receiver RF receiver consisting total 8 pin in that ground pin (GUD),One Data pin, two are
given to supply voltage (+5v supply)and one pin for antenna ,10to13 pins in HT12D(decoder)
are connected to microcontroller port 3.4 to 3.7 pins. In project we using the 433MHz frequency,
the maximum range of these project is 50meters or 500feets.
LCD stands for Liquid Crystal Display it is used for displaying purpose. It is connected to port 1
of microcontroller.LCD contains 16-pins in this three control pins and seven data(D0…….D7)
pins for 8-bit mode and remaining two are used for back light or we can connect to GND and
Vcc supply. But here we using the 4-bit instead of 8-bit mode (i.e., four data pin are connected to
microcontroller).Pin1 is for GND, Pin2 is for supply (Vcc) it required 5volt and three control
pin4, pin5 & pin6 (Register Select (RS), Read/Write (RW) & Enable (EN)).Pin11 to Pin14 are
connected as a data pins it given interface port 1.2 to port 1.5 and control pins are connected to
port1.0 to port1.1.

EEPROM (24LC02B) is the 8-pin DIP IC; it is interfaced to microcontroller port 2.0 and port
2.1(SCL &SDA) 8-pin connected to supply (5Volt),4-pin is for GND, pin 1to pin 3 are address
pins these pins are connected to GND.

Here four switches are connected to port2 of microcontroller; those switches are connected to
port2.2 to port 2.5 in microcontroller port pins. Finally, buzzer is connected to port 3.0 it is used
to indication purpose.

BIBLIOGRAPHY

The 8051 Micro controller and Embedded Systems

Muhammad Ali Mazidi

Janice Gillispie Mazidi

The 8051 Micro controller Architecture, Programming & Applications

Kenneth J. Ayala

Fundamentals of Micro processors and Micro computers

B. Ram

Micro processor Architecture, Programming & Applications

Ramesh S. Gaonkar

Electronic Components

D.V.Prasad
REFERENCES ON THE WEB:

www.national.com
www.atmel.com
www.microsoftsearch.com
www.geocities.com