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Laboratorio 4 PDF

The document describes a digital logic circuit design exercise. It provides the truth tables and Karnaugh maps to minimize the logic functions for each digit (a-g) of a 7-segment display. It then shows the circuit diagram implemented using logic gates (NOT, AND, OR) to display the digits 0-9 on the 7-segment display based on the minimized logic functions.

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Alberto Villazante
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44 views4 pages

Laboratorio 4 PDF

The document describes a digital logic circuit design exercise. It provides the truth tables and Karnaugh maps to minimize the logic functions for each digit (a-g) of a 7-segment display. It then shows the circuit diagram implemented using logic gates (NOT, AND, OR) to display the digits 0-9 on the 7-segment display based on the minimized logic functions.

Uploaded by

Alberto Villazante
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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ESCUELA MILITAR DE INGENIERÍA PARALELO

“MCAL. ANTONIO JOSÉ DE SUCRE”


BOLIVIA

“MEC”

SISTEMAS DIGITALES

UNIDAD ACADÉMICA LA PAZ

LABORATORIO
DOCENTE : ING. Ninoska Aracelly Trino Laime
ESTUDIANTE: Jose Alberto Villazante Calle
CARRERA : ING. MECATRONICA
C.I. : 8481002 LP

GESTIÓN 2019
CODIGO : A23273-4

2020
4.1. Utilizar el siguiente diagrama de bloques para estructurar el diseño del circuito lógico
SEGMENTO
DIGITO
a b c d e f g
0 0000 1 1 1 1 1 1 0
1 0001 0 1 1 0 0 0 0
2 0010 1 1 0 1 1 0 1
3 0011 1 1 1 1 0 0 1
4 0100 0 1 1 0 0 1 1
5 0101 1 0 1 1 0 1 1
6 0110 1 0 1 1 1 1 1
7 0111 1 1 1 0 0 0 0
8 1000 1 1 1 1 1 1 1
9 1001 1 1 1 1 0 1 1
Realizando los mapas de Karnaugh
Para a) Para b)
CD
AB 00 01 11 10 CD
00 1 0 1 1 AB 00 01 11 10
01 0 1 1 1 00 1 1 1 1
11 0 0 0 0 01 1 0 1 0
10 1 1 0 0 11 0 0 0 0
10 1 1 0 0

𝐹 = 𝐵′ 𝐷′ + 𝐵𝐷 + 𝐶 + 𝐴 𝐹1 = 𝐶 ′ 𝐷′ + 𝐶𝐷 + 𝐵′
Para c)
Para d)
CD
AB 00 01 11 10 CD
00 1 1 1 0 AB 00 01 11 10
01 1 1 1 1 00 1 0 1 1
11 0 0 0 0 01 0 1 0 1
10 1\ 1 0 0 11 0 0 0 0
10 1 1 0 0

𝐹2 = 𝐶 ′ + 𝐷 + 𝐵
𝐹3 = 𝐵𝐶 ′ 𝐷 + 𝐵′ 𝐷′ + 𝐵′ 𝐶 + 𝐶𝐷′ + 𝐴
Para e)
Para f)
CD
AB 00 01 11 10 CD
00 1 0 0 1| AB 00 01 11 10
01 0 0 0 1 00 11 0 0 0
11 0 0 0 0 01 1 1 0 1
10 1 0 0 0 11 0 0 0 0
10 1 1 0 0

𝐹4 = 𝐵′ 𝐷′ + 𝐶𝐷′ 𝐹5 = 𝐶 ′ 𝐷′ + 𝐵𝐶 ′ + 𝐵𝐷′ + 𝐴
Para g)

CD
AB 00 01 11 10
00 0 0 1 1
01 1 1 0 1
11 0 0 0 0
10 1 1 0 0

𝐹4 = 𝐵′ 𝐶 + 𝐵𝐶 ′ + 𝐵𝐷′ + 𝐴
5v

U8 U9 U10
NOT NOT NOT

U11

AND U13
U12 R21
330
OR_4

AND

U14

AND
U15 U17
R22
330
AND
U16 OR_3

NOT

U18
R27
330
OR_3
U19

AND_3
U20
U23
R23
330
AND
U21 OR_5

U22
AND

AND

U24 U26
R24
330
U25
AND OR

AND
U27

U30
U28
AND
R25
330
OR_4

U29
AND

AND

U31

U34
AND
U32 R26
330
OR_4

AND
U33

AND

R20 R19 R8
2.2k 2.2k R18 2.2k
2.2k

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