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Step-9 Logic Operation

The document describes the logic operations of an asynchronous counter. It divides the logic operations into 7 types based on the state of the 3 flip flops (Q2, Q1, Q0) after each clock pulse. In Type 1, a clock pulse changes Q0 from 0 to 1 while keeping Q2 and Q1 the same at 0. The other types describe how each subsequent clock pulse changes the state of the flip flops in sequence from 001 to 111.

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Shravan Kumar Namdeo
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48 views2 pages

Step-9 Logic Operation

The document describes the logic operations of an asynchronous counter. It divides the logic operations into 7 types based on the state of the 3 flip flops (Q2, Q1, Q0) after each clock pulse. In Type 1, a clock pulse changes Q0 from 0 to 1 while keeping Q2 and Q1 the same at 0. The other types describe how each subsequent clock pulse changes the state of the flip flops in sequence from 001 to 111.

Uploaded by

Shravan Kumar Namdeo
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Step-9 Logic Operation

Initially all flip flop set at zero postion and the logic operatioinn of asynchronous counter are
divede into following type
Type-1 When all flip flop initially zero and first clock pulse applied to first Flip Flop So first
flip state change 0 to 1 and all other flip flop state remain same so output after first clock pulse
is
Q2 Q1 Q0 = 001
Type-2 After the first clock pulse output is 001 and when second clock pulse applied then first
flip state change 1 to 0 and second flips state 0 to 1 and third flip flop state remain same so
output after second clock pulse is
Q2 Q1 Q0 = 010
Type-3 After the first clock pulse output is 010 and when second clock pulse applied then first
flip state change 0 to 1 and second flips state 0 to 1 and third flip flop state remain same so
output after second clock pulse is
Q2 Q1 Q0 = 011
Type-4 After the first clock pulse output is 011 and when second clock pulse applied then first
flip state change 1 to 0 and second flip state 1 to 0 and third flip flop state Change 0 to 1 so
output after second clock pulse is
Q2 Q1 Q0 = 100
Type-5 After the first clock pulse output is 100 and when second clock pulse applied then first
flip state change 0 to 1 and second flips state not change and third flip flop state remain same so
output after second clock pulse is
Q2 Q1 Q0 = 101
Type-6 After the first clock pulse output is 101 and when second clock pulse applied then first
flip state change 1 to 0 and second flips state 0 to 1 and third flip flop state remain same so
output after second clock pulse is
Q2 Q1 Q0 = 110
Type-7 After the first clock pulse output is 110 and when second clock pulse applied then first
flip state change 0 to 1 and second flips state remain same and third flip flop state remain same
so output after second clock pulse is
Q2 Q1 Q0 = 111

1. Asynchronous 4 bit Up Counter


Step- 1 Definition It is a sequential circuit in which we count sequence in the up direction like
0, 1, 2, --------------15. in this type counter input of all flip flop is common and output of first
flip flop is connected as a clock of second flip flop and output of second flip flop is connected
as a clock of third flip flop so this type of counter is also called ripple counter
Step-2 Number Counting state 0, 1, 2,3,4,5,6,7,8,10,11,12,13,14,15
Step-3 Number of bit = Number of flip flop =4
Step-4 Type of Flip Flop = J K flip flop
Step-5 Flip Flop connection

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