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El 101, Digital Logic Circuits Lab, Ay2020-2021: Out/ Out

This document describes Experiment No.3 of the EL 101 Digital Logic Circuits Lab course for the academic year 2020-2021. The objectives are to implement and understand the working of a half adder circuit using logic gates. This includes designing the circuit using a schematic diagram, assigning inputs and outputs to pins, and simulating the circuit. The theoretical background section explains how to design 1-bit and 4-bit adder/subtractor circuits using full adders, EX-OR gates, and a user control input to determine whether addition or subtraction is performed. Applications of half adders and subtractors include binary arithmetic in computer ALUs. The experiment aims to teach students how to design basic arithmetic circuits that can compute two

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Soman Yadav
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171 views2 pages

El 101, Digital Logic Circuits Lab, Ay2020-2021: Out/ Out

This document describes Experiment No.3 of the EL 101 Digital Logic Circuits Lab course for the academic year 2020-2021. The objectives are to implement and understand the working of a half adder circuit using logic gates. This includes designing the circuit using a schematic diagram, assigning inputs and outputs to pins, and simulating the circuit. The theoretical background section explains how to design 1-bit and 4-bit adder/subtractor circuits using full adders, EX-OR gates, and a user control input to determine whether addition or subtraction is performed. Applications of half adders and subtractors include binary arithmetic in computer ALUs. The experiment aims to teach students how to design basic arithmetic circuits that can compute two

Uploaded by

Soman Yadav
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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EL 101, DIGITAL LOGIC CIRCUITS LAB, AY2020-2021

Experiment No.3: Implementation of half adder circuit using logic gates


Objectives:
 Implement and understand the working of half adder circuit using logic gates
 Design entry using schematic diagram.
 Assigning the circuit inputs and outputs to specific pins.
 Simulating the designed circuit.

Theoretical Background:
1- Bit Adder / Subtractor Circuit using gates
In this experiment we are going to design a half adder/ half subtractor circuit with the help of
full adder which have a control input from user, which will be used to decide whether the user
wants to add or subtract.
Half Adder/ Subtractor circuits:

Sum/Diff
B A
User Cout/Bout

User
Fig: 1- bit adder/ subtractor using full adder

4- Bit Adder / Subtractor unit using Parallel adder and Ex-OR Gate
Examine the IC 74LS83 (Parallel Adder) and 74LS86 (Quad EX-OR) before assembling. Apply
one 4-Bit number directly to parallel adder and another 4-Bit number through four EX-OR gates
keeping its one input common as user control. Connect the User input with Carry input also.
Apply some random number and tabulate the addition and or subtraction. The user input will
decide the addition or subtraction i.e. input “0” will perform the addition and user input “1” will
perform the subtraction by 2’s complement method.

Area of Electronics and Communication Engineering , NIIT University


EL 101, DIGITAL LOGIC CIRCUITS LAB, AY2020-2021

B3 B2 B1 B0

U U U U

A A A1 A
3 2 0

Y3X3 Y2X2 Y1X1 Y0X0 U

Cout/Bout S3/D3 S2/D2 S1/D1 S0/D0

Figure 3.2: 4 Bit Adder / Subtractor Circuit

Application:
1. The ALU of computer uses the half adder and half subtractor circuit to perform binary
addition and binary subtraction of two bits respectively.
2. Half adder is used to design full adder and half subtractor is used to design full subtractor.

Learnings:
In this experiment, we have learnt how to design arithmetic circuits such as half
adder/subtractor which are used to compute two- bit binary addition and subtraction. With the
help of these we can also design full adder/subtractor which are helpful in computing addition
/subtraction of more than two-bit.

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