MICROPROCESSOR AND INTERFACING

PROJECT

Design a microprocessor-based traffic signal controller

for a junction of four roads

SUBMITTED TO – PRO. S. INDU

SUBMITTED BY – DEVASHISH PRATAP SINGH
2K17/EC/057

1
 TRAFFIC LIGHT CONTROLLER

OBJECTIVE
Interfacing TRAFFIC LIGHT CONTROLLER with 8085 Microprocessor trainer kit and
simulating the sequence of traffic light states.

APPARATUS REQUIRED
 8085 Microprocessor trainer kit.
 Traffic light controller.
 Power Supply.
 Flat Ribbon Cable.

DESCRIPTION
Combination of Red, Amber and Green LEDs are provided to indicate Halt, Wait and Go
states for vehicles. Combination of Red and Green LEDs are provided for pedestrian crossing. 36
LEDs are arranged in the form of an intersection. At the left corner of each road, a group of 5 LEDs
(Red, Amber and Green) are arranged in the form of a Tsection to control the traffic of that road.
Each road is named as North N, South S, East E and West W.
L1,L10, L19 and L28 (Red) are for stop signal for the vehicles on the road N,S,W and
E respectively.
L2,L11,L20 and L29 (Amber) indicate wait state for the vehicles on the road N,S,E and W
respectively.
L3,L4 and L5 (Green) are for left, straight and right turn for the vehicles on the road S.
Similarly L12 - L13 - L14 , L23 - L22 - L21 and L32 - L31 - L30 simulates same function for the roads E, N &
W respectively. A total of 16 LEDs (2 Red & 2 Green at each road) are provided for pedestrian
crossing. L7 - L9, L16 - L18, L25 - L27 & L34 - L36 (Green) when on allows pedestrians to cross and L 6 - L8, L15 -
L17, L24 - L26 & L33 - L35 (Red) when on alarms the pedestrians to wait.
To minimize the hardware pedestrians indicator LEDs (both Green and Red) are connected
to some port lines (PC4 to PC7 ) with Red inverted. Red LED’s L10 and L28 are connected to port lines
PC2 to PC3 while L1 and L19 are connected to lines PC 0 and PC1 after inversion. All other LEDs (Amber
and Green) are connected to Port A and port B.

INSTALLATION PROCEDURE
SDA_85M to NIFC_11 interface connection details:
1.Connect p3 on 85M to the connector C1 on the interface using a 26 core FRC.
Care should be taken such that, pin1 of P3 on the kit coincides with pin1 of cable [Observe the
notch on the cable connector] 2.Power connection:
Connect +5v,GND to the interface. Color codes of power connection on the
interface
+5v - Orange, Blue, White GND -
Black.
3.Enter the Program.
4.Now execute the program,
Go <Starting address> <EXE>

2
The LEDs on the interface glow according to certain sequence.

ASSEMBLY LANGUAGE PROGRAM

ADDRES S LABEL MNEMONICS OPCODE/OPERAND

C000 MVI A,80H 3E 80

C002 OUT CWR D3 DB

C004 REPEAT MVI E,03H 06 03

C006 LXI H,C100H 21 00 C1

C009 NEXTSTAT MOV A,M 7E

C00A OUT PORTA D3 D8

C00C INX H 23

C00D MOV A,M 7E

C00E OUT PORTB D3 D9

C010 INX H 23

C011 MOV A,M 7E

C012 OUT PORTC D3 DA

C014 CALL DELAY CD 1F C0

C017 INX H 23

C018 DCR E 05

C019 JNZ NEXTSTAT C2 09 C0

C01C JMP REPEAT C3 04 C0

C01F DELAY LXI D,3000H 11 00 30

C022 L2 MVI C,FFH 0E FF
C024 L1 DCR C 0D
C025 JNZ L1 C2 24 C0

C028 DCX D 1B

C029 MOV A,D 7A

C02A ORA E B3

C02B JNZ L2 C2 22 C0

C02E RET C9

3
CIRCUIT DIAGRAM
TRAFFIC LIGHT SIMULATOR

4
TRAFFIC LIGHT CONTROLLER

PORT A

PORT B

5
 PORT C PROGRAM TRACE
LABEL MNEMONICS DESCRIPTION
MVI A,80H Initializing the ports of the PPI 8255 as O/P ports by
writing the control word as 80H.

DATA D7 D6 D5 D4 D3 D2 D1 D0
BITS 1 0 0 0 0 0 0 0
COMMENT I/O Mode0 PortA PortC Mode0 PortB PortC
mode O/P Upper O/P Lower
O/P O/P
80H is moved to accumulator.
REGISTERS
A F 80 XX
B C XX XX
XX XX D E
XX XX H L

OUT CWR Control word specify the I/O function for each ports of
8255.
REPEAT MVI E,03H Initialize E register with number of sequence.
REGISTERS
A F 80 XX
B C XX XX
XX 03 D E
XX XX H L
LXI Initialize the memory pointer at C100H .i.e. loads the 16-
H,C100H bit data in the register pair designated.
REGISTERS
A F 80 XX
B C XX XX
XX 03 D E
C1 00 H L

C100H is the memory pointer to the first data of

the sequence.
MEMORY
C100 BF HL memory pointer
C101 BF
C102 AF
C103 EE
C104 EE

NEXTSTAT MOV A,M Memory pointer content BFH is moved to accumulator.

REGISTERS
A F BF XX
B C XX XX
XX 03 D E
C1 00 H L
LED no L14 L13 L12 L11 L5 L4 L3 L2
PORTA bits BFH 1 0 1 1 1 1 1 1
LED status Will GLOW Will not glow
not Since
glow Negative
logic
when the portA bit is ‘1’ then LED is in OFF state,
when the portA bit is ‘0’ then LED is in ON state.

6
OUT PORTA

L13 will glow

INX H Increment the HL register pair by 1.The instruction

views the contents of the HL registers as a 16-bit
number. No flags are affected.

REGISTERS
A F BF XX
B C XX XX
XX 03 D E
C1 01 H L

C101H is the memory pointer to input data

sequence.

C100 BF
C101 BF HL memory pointer
C102 AF
C103 EE
C104 EE
MEMORY
MOV A,M Memory pointer content BFH is moved to accumulator.
REGISTERS
A F BF XX
B C XX XX
XX 03 D E
C1 01 H L
LED no L32 L31 L30 L29 L23 L22 L21 L20
PORTB bits BFH 1 0 1 1 1 1 1 1
LED status Will GLOW Will not glow
not Since
glow Negative
Logic
when the portB bit is ‘1’ then LED is in OFF state,
when the portB bit is ‘0’ then LED is in ON state.

OUT PORTB L31 will glow

7
INX H Increment the HL register pair by 1.
REGISTERS
A F BF XX
B C XX XX
XX 03 D E
C1 02 H L

C102H is the memory pointer to input data

sequence.

C100 BF
C101 BF
C102 AF HL memory pointer
C103 EE
C104 EE
MEMORY
MOV A,M Memory pointer content AFH is moved to accumulator.

REGISTERS
A F AF XX
B C XX XX
XX 03 D E
C1 02 H L

LED L33 L34 L24 L25 L15 L16 L6 L7 L28 L10 L19 L1
no L35 L36 L26 L27 L17 L18 L8 L9

LED 1 0 1 0 1 0 1 0 0 0 1 1
glow
PORTC 1 0 1 0 1 1 1 1
bits
AFH
LED L33,L35 L25,L27 L15,L17 L7,L9 Will GLOW
status GLOW GLOW GLOW
not GLOW
glow
OUT L1 L19 => glow; since positive logic. Only when ‘1’ is
PORTC present in this place the LED will glow.
L10 L28 => does not glow; since negative logic. This will
not glow because only when ‘0’ is present in this, the LED
will glow. Here ‘11’ is present hence it will not glow.

L7,L9 L25,L27 => will glow; since negative logic. Here we

have zero.

L33,L35 L15,L17 => will glow; since positive logic. Here we

have one.

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CALL In order to make these LEDs glowing visible to the
DELAY programmer/user, delay was provided.
INX H Increment the HL register pair by 1.
REGISTERS
A F AF XX
B C XX XX
XX 03 D E
C1 03 H L

C103H is the memory pointer to input data

sequence.

MEMORY
C100 BF
C101 BF
C102 AF
C103 EE HL memory pointer
C104 EE
DCR E E register was decremented by 1 indicating remaining
number of sequence.
REGISTERS
A F AF XX
B C XX XX
XX 02 D E
C1 03 H L

JNZ Now the next sequence is being looped.

NEXTSTAT
JMP Once again the three sequence are executed.
REPEAT
W E
E W

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10
PORT A – BFH
PORT B – BFH
PORT C – BFH

Now the next sequence is being traced.

When E=02 PORTS CONFIGURATION

& DISPLAY.
LED no L14 L13 L12 L11 L L4 L3 L2
5

PORTA bits 1 1 1 0 1 1 1 0
EEH
LED status Will not GLOW Will not GLOW
glow Since glow Since
Negative Negative
logic logic
LED no L32 L31 L30 L29 L23 L22 L21 L20
PORTB bits 1 1 1 0 1 1 1 0
EEH
LED status Will not GLOW Will not GLOW
glow Since glow Since
Negative Negative
logic logic
LED no L33 L34 L24 L25 L15 L16 L6 L7 L2 L10 L19 L1
8
L35 L36 L26 L27 L17 L18 L8 L9

LED glow 1 0 1 0 1 0 1 0 0 0 1 1
PORTC bits 1 1 1 1 1 1 0 0
ACH
LED status L33,L35 L24,L26 L15,L17 L6 L8 Will not glow
GLOW GLOW GLOW GLOW

11
WAITING SEQUENCE

12
WAITING SEQUENCE

PORT A – EEH
PORT B – EEH
PORT C – FCH

Now the next sequence is being traced.

When E=01 PORTS CONFIGURATION

& DISPLAY.
LED no L1 L1 L1 L1 L L4 L3 L2
4 3 2 1 5

PORTA 1 1 1 1 1 0 1 1
bits FBH
LED Will not glow GLOW Will
status Since not
Negativ glow
e logic
LED no L3 L3 L3 L2 L2 L22 L21 L20
2 1 0 9 3

PORTB 1 1 1 1 1 0 1 1
bits FBH
LED Will not glow GLOW Will
status Since not

13
 Negativ glow
e logic
L L3 L3 L2 L2 L1 L1 L L L2 L1 L1 L
E 3 4 4 5 5 6 6 7 8 0 9 1

D L3 L3 L2 L2 L1 L1 L L
n 5 6 6 7 7 8 8 9

o
LED glow 1 0 1 0 1 0 1 0 0 0 1 1
PORTC 0 1 0 1 0 0 0 0
bits 50H
LED L34,L36 L24,L26 L16,L18
Will L6 L8 GLOW
status GLOW GLOW notGLOW GLOW
glow
Thus the LEDs glow, when E=00 the sequence is terminated and next cycle starts.
N S
S N

14
15
PORT A – FBH
PORT B – FBH
PORT C – 50H

16
DELAY SUBPROGRAM
DELAY LXI Initialize the memory pointer at C100H .i.e. loads the 16-bit
D,3000H data in the register pair designated.
REGISTERS
A F XX XX
B C XX XX
30 00 D E
XX XX H L
C100H is the memory pointer to the first data of the
sequence.
3000 XX HL memory pointer
3001 XX
3002 XX
3003 XX
3004 XX
MEMORY
L2 MVI C,FFH Move FFH immediately in to C register.
REGISTERS
A F XX XX
B C XX FF
30 00 D E
XX XX H L

L1 DCR C Move FFH immediately in to C register.

REGISTERS
A F XX XX
B C XX FE
30 00 D E
XX XX H L

JNZ L1 Loop until C = 00

DCX D Decrement the DE register pair by 1.

REGISTERS
A F XX XX
B C XX XX
2F FF D E
XX XX H L

MOV A,D D register content 2FH is moved to accumulator.

REGISTERS
A F 2F XX
B C XX XX
2F FF D E
XX XX H L

ORA E OR the accumulator content with E register content

FF => 1111 1111
2F => 0010 1111
-----------
1111 1111 => FF

REGISTERS

FF XX A F
XX XX B C
2F FF D E
XX XX H L
JNZ L2 Only when DE=0000,this loop will end.

RET Return to main program

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EXECUTION
ADDRE DATA
SS
C100 BF H

C101 BF H

C102 AF H

C103 EE H

C104 EE H

C105 FC H

C106 FB H

C107 FB H

C108 50 H

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