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EECE320 - Digital Systems Design Section 1: Homework 2

This document provides details for Homework 2 assignments in the EECE320 - Digital Systems Design course. It includes 4 problems involving logic circuit design and analysis tasks. Problem 1 involves determining if a Boolean expression is valid and working with truth tables. Problem 2 asks to design a circuit to open a lock based on correct input codes. Problem 3 is to design a circuit to verify a 3-input AND gate. Problem 4 covers constructing truth tables, completing timing diagrams, sketching logic circuits, and completing VHDL code.

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0% found this document useful (0 votes)
62 views3 pages

EECE320 - Digital Systems Design Section 1: Homework 2

This document provides details for Homework 2 assignments in the EECE320 - Digital Systems Design course. It includes 4 problems involving logic circuit design and analysis tasks. Problem 1 involves determining if a Boolean expression is valid and working with truth tables. Problem 2 asks to design a circuit to open a lock based on correct input codes. Problem 3 is to design a circuit to verify a 3-input AND gate. Problem 4 covers constructing truth tables, completing timing diagrams, sketching logic circuits, and completing VHDL code.

Uploaded by

Karima Baba
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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EECE320 – Digital Systems Design

Section 1
Homework 2
(Due date: Monday 02 November 2020, by 23:59)

Problem 1 (25 pts)


a) (10 pts) Determine whether or not the following expression is valid, i.e., whether the left- and right-
hand sides represent the same function.

b) (15 pts) For the following Truth table with two outputs:
• Provide the Boolean functions f1 and f2 using the Canonical Sum and
Canonical Product expressions.
• Express f1 and f2 using the Σ and Π notations.
• Sketch the logic circuits corresponding to the Canonical Sum and
Canonical Product.

Problem 2 (25 pts)


a) (15 pts) Design a logic circuit (simplify your circuit) that opens a lock (F = 1) whenever the user
presses the correct number on each numpad (numpad 1: 8, numpad2: 3). The numpad encodes each
decimal number using BCD encoding (see figure). It is expected that the 4-bit groups generated by
each numpad be in the range from 0000 to 1001. Note that the values form 1010 to 1111 are assumed
not to occur.
Suggestion: Create two circuits: one that verifies the first number (8), and another that verifies the
second number (3). Then perform the AND operation on the two outputs. This avoids creating a truth
table with 8 inputs.

b) (10 pts) Sketch the resulting logic circuit assuming that the gates you use can have no more than 2
inputs.
Problem 3 (25 pts)
Design a circuit (simplify your circuit) that verifies the logical operation of a 3-input AND gate. f = '1'
(LED ON) if the AND gate works properly. Assumption: when the AND gate is not working, it
generates 1's instead of 0's and vice versa.

Problem 4 (25 pts)


a) (5 pts) Construct the truth table describing the output of the following circuit and write the simplified
Boolean equation.
b) (6 pts) Complete the timing diagram of the logic circuit whose VHDL description is shown below:

c) (7 pts) The following is the timing diagram of a logic circuit with 3 inputs. Sketch the logic circuit
that generates this waveform. Then, complete the VHDL code.

d) (7 pts) Complete the timing diagram of the following circuit:

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