UNIT – IV

PART - A (Short Answer Questions)

1 Explain the main function of the memory-management unit?
2 Distinguish between logical address and physical address?
3 Describe dynamic loading and dynamic linking?
4 Distinguish between compile time, load time and execution time address
binding?
5 Define swapping?
6 List dynamic storage allocation strategies in contiguous memory
allocation
scheme?
7 Distinguish between MFT and MVT?
8 Distinguish between internal and external fragmentation?
9 Define compaction?
10 List and define non-contiguous memory allocation schemes?
11 Distinguish between paging and segmentation?
12 State the purpose of TLB?
13 Explain the basic approach of page replacement?
14 Distinguish between page table and inverted page table?
15 State the benefits of a virtual memory system?
16 Distinguish between demand paging and pure demand paging?
17 Explain the calculation of effective access time of a demand-paged
memory system?
18 Explain page fault and its effect on the performance of the demand paged
memory system?
19 Explain the need for page-replacement.?
20 List various page replacement algorithms?
21 Distinguish between local and global page replacement strategies?
22 Distinguish between equal and proportional frame allocation strategies?
23 Explain the concept of thrashing and why thrashing should be avoided in
a system?

PART-B (Long Answer Questions)

1 Describe the following?
a) Virtual Memory
b) Cache Memory
c) Auxiliary Memory
2 Explain in detail the requirements that memory management technique
needs to satisfy?
3 Explain
a) Paging
b) Page table structure
c) Translation look-aside buffer
d) Segmentation
4 Explain why the “principle of locality” is crucial to the use of virtual
memory? What is accomplished by page buffering?
5 Discuss briefly the swapping concept with necessary examples?
6 Describe contiguous memory allocation concept with advantages and
disadvantages?
7 Differentiate the main memory organization schemes of contiguous-
memory allocation, segmentation, and paging with respect to the following
8 Differentiate between internal and external fragmentation and Which one
occurs in paging scheme?
9 Explain briefly about paging with neat diagram?
10 Discuss the following
a) Hierarchical paging
b) Inverted page Tables
11 Draw and explain the working procedure of paging hardware in detail?
12 Explain the basic concepts of segmentation with neat diagrams?
13 Define page fault? When does a page fault occur? Describe the action
taken by OS when page fault occurs?
14 State and explain about virtual memory concept with neat diagram?
15 Differentiate between paging and segmentation?
16 Explain briefly the performance of demand paging with necessary
examples?
17 Explain the basic Scheme of page replacement and about the various page
replacement strategies with examples?
18 Explain the Readers and Writers problem and its solution using the
concept of semaphores?
19 Explain the uses of the following:
a. Mutex object
b. Semaphore object
c. Waitable timer object
20 Write short notes about the following:
a. Binary Semaphores
b. Bounded Waiting
21 Explain the Readers and Writers problem and its solution using the
concept of semaphores?

PART-C (Problem Solving and Critical Thinking)

1 Suppose you have 16M bytes of main memory. Using the list method
there is an overhead of 8B per memory block. Using the bitmap method, the
allocation granularity is of 128B. How many blocks are there when the space
overhead of both methods is the same? Explain the average block size for this
many blocks?
2 Consider a computer system supports 32-bit virtual addresses as well as
32-bit physical addresses. Since the virtual address space is of the same size as
the physical address space, the operating system designers decide to get rid of
the virtual memory entirely.
3 Consider a CPU generates 32-bit virtual addresses. The page size is 4 KB.
The processor has a translation look-aside buffer (TLB) which can hold a total
of 128 page table entries and is 4-way set associative. The minimum size of the
TLB tag is:
4 Consider there are 3 page frames which are initially empty. If the page
reference string is 1, 2, 3, 4, 2, 1, 5, 3, 2, 4, 6, the number of page faults using
the optimal replacement policy is
5 Consider the following page reference string
7,0,2,0,3,0,4,2,3,0,3,2,1,2,0,1,7,0
Assuming three frames, how many page faults would occur in each of the
following cases?
a) LRU
b) FIFO
c) Optimal algorithms
Note that initially all frames are empty.
6 Analyze that we have a paging system with page table stored in memory
A. If a memory reference takes 200 nanoseconds how long does a paged
B. If we add associative registers and 75% of all page table references are
memory reference take found in the associative registers, what is the effective
memory reference time? Assume that finding a page table entry in the
associative registers takes zero time, if the entry is there.
7 In two level nested loops, the outer index (i) runs from 1 to 5 and the
inner index (j) runs from 1 to 10.The page faults seem to occur for every 7th
innermost iterations. If it takes 0.02 micro second to load a new page
what is the extra time required because of occurrence of page faults?
8 Given memory partitions of 100K, 500K, 200K, 300K, and 600K (in
order), how would each of the First-fit, Best-fit, and Worst-fit algorithms place
processes of 212K, 417K, 112K, and 426K (in order)? Explain Which algorithm
makes the most efficient use of memory?
9 Suppose we have a demand paged memory. The page table is held in
registers. It takes 8 milliseconds to service a page fault if an empty frame is
available or the replaced page is not modified and 20 milliseconds if the
replaced page is modified. Memory access time is 100 nanoseconds. Consider
that the page to be replaced is modified 70 percent of the time.
What is the maximum acceptable page-fault rate for an effective access time of
no more than 200 nanoseconds?
10 Consider a logical address space of eight pages of 1024 words each
mapped onto a physical memory of 32 frames
a) How many bits are in the logical address?
b) How many bits are in the physical address?