M.S. Software Engineering at Wipro Technologies (WASE) : 4Q X 5M 20marks
M.S. Software Engineering at Wipro Technologies (WASE) : 4Q X 5M 20marks
Note:
1. Please read and follow all the instructions given on the cover page of the answer script.
2. Start each answer from a fresh page. All parts of a question should be answered
consecutively.
3. Answers must be numbered in full, following the pattern in the Question Paper (eg. 1Bii )
4. Students are advised to read the question paper in full, think for a couple of minutes, and
then start answering the questions.
5. The marks allotted for each question/ subpart should be used by the student as an
estimate of the detail necessary in his answer.
6. Please answer the questions in the order in which they appear in the question paper.
4Q x 5M=20Marks
Q1.(A) Fill out the truth table for an EXCLUSIVE NOR (XNOR) gate, and give its
equations in SOP and POS forms. (2)
Q1.(B) Implement the XNOR function using
i) only NOR gates (2)
ii) only NAND gates (1)
Q2.(A) Give the truth table and circuit diagram for a half adder. (1)
Q2.(B) Show how you can implement a full adder from two half adders and maybe a few
external gates. (1)
Q2.(C) Show how you would interconnect these full adders to form a 4 bit adder. (1)
Q2.(D) Show by means of a block diagram how you would modify/ add to (C ) above so that
now you can both add (A+B) and subtract (A-B) two 4 bit numbers A and B, the
operation required being chosen with a control signal, say Subtract/ Add*. (2)
Q3.(A) Show how you would implement a 4 bit ripple up counter using JK edge triggered
FFs. (1)
Q3.(B) Now discuss how you would go about modifying it to a synchronous counter. (2)
Q3.(C) Show what changes/ additions/ alterations you would make to up counter (either the
one you have described in A or in B above) so that it now counts up only to a user
defined fixed value and then stops counting. (2)
Q4.(A) Name the segment registers of the 8086, and state their default uses. (1)
Q4.(B) Explain how the 8086 manages to access more than 64 K of memory even though the
user visible registers are 16 bits wide only. (1)
Q4.(C) Can all the segment registers have the same value? State giving reasons. (2)
Q4.(D) If CS = 1234H, IP = 101AH, work out the effective instruction address. (1)
1Q x 10M=10Marks