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Transistor bias circuits are used to properly bias transistors in their linear region of operation. This chapter discusses various transistor biasing techniques including voltage divider bias, emitter bias, base bias, emitter-feedback bias, and collector-feedback bias. Voltage divider bias uses a voltage divider network to provide base bias voltage and is one of the most commonly used techniques. Other biasing methods like emitter bias use two voltage sources for improved stability. Collector-feedback bias provides even better stability and is suitable for linear amplifier applications. The chapter also explains graphical analysis of transistor bias points using load lines and DC operating characteristics.

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0% found this document useful (0 votes)
25 views4 pages

Ch05 PDF

Transistor bias circuits are used to properly bias transistors in their linear region of operation. This chapter discusses various transistor biasing techniques including voltage divider bias, emitter bias, base bias, emitter-feedback bias, and collector-feedback bias. Voltage divider bias uses a voltage divider network to provide base bias voltage and is one of the most commonly used techniques. Other biasing methods like emitter bias use two voltage sources for improved stability. Collector-feedback bias provides even better stability and is suitable for linear amplifier applications. The chapter also explains graphical analysis of transistor bias points using load lines and DC operating characteristics.

Uploaded by

JC Zayas
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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PHYS 162 - Chapter 5 Transistor Bias Circuits

CHAPTER 5
TRANSISTOR BIAS CIRCUITS
5-1 THE DC OPERATING POINT
- A transistor must be properly biased with a DC voltage to operate in the linear region.
- It ensures an amplified and accurate signal production at the output.
- The DC operating point is often referred as Q-point.
- The DC parameters that need to be found to determine the Q-point are collector current IC and
collector-emitter voltage VCE.

5.1.1 DC Bias
- If an amplifier is not biased with the correct DC voltages, it can go into saturation and cutoff.
- Figure 1(a) shows the correct
linear operation with amplified
output.
- Figure 1(b) shows nonlinear
operation where the amplifier is in
cutoff. The clipping in the positive
cycle is always due to cutoff.
- Figure 1(c) shows nonlinear
operation where the amplifier is in
saturation. The clipping in the
negative cycle is always due to
saturation.

5.1.1.1 Graphical Analysis


- In Figure 2, we chose three values
of IB and observe what happens to
IC and VCE.
o For 𝐼𝐵 = 200𝜇𝐴,
𝑉𝐶𝐸 = 5.6𝑉
Figure 1 Example of linear and nonlinear operation
o For 𝐼𝐵 = 300𝜇𝐴, 𝑉𝐶𝐸 = 3.4𝑉
o For 𝐼𝐵 = 400𝜇𝐴, 𝑉𝐶𝐸 = 1.2𝑉
- The corresponding Q-points can be seen on the graph.

Prepared By: Syed Muhammad Asad – Semester 102 Page 1


PHYS 162 - Chapter 5 Transistor Bias Circuits

Figure 2 Q-point adjustment


5.1.1.2 DC Load Line
- The DC operation of a transistor circuit can be described graphically using a DC load line.
- It is a straight line connecting 𝐼𝐶 = 𝐼𝐶 𝑠𝑎𝑡 on the y-axis to 𝑉𝐶𝐸 = 𝑉𝐶𝐶 on the x-axis.
𝑉𝐶𝐶 −𝑉𝐶𝐸 𝑠𝑎𝑡
- At saturation 𝐼𝐶 𝑠𝑎𝑡 = and at cutoff 𝑉𝐶𝐸 = 𝑉𝐶𝐶 .
𝑅𝐶
- Figure 3 shows the three Q-points.

Figure 3 The Dc load line

Prepared By: Syed Muhammad Asad – Semester 102 Page 2


PHYS 162 - Chapter 5 Transistor Bias Circuits
5.1.1.3 Linear Operation
- All point along the DC load line between saturation and cutoff is the linear region of operation for a
transistor.
- Figure 4 is an example of linear operation.
- AC voltage Vin produces an AC base current 𝐼𝑏(𝑝𝑒𝑎𝑘 ) = 100𝜇𝐴 above and below the Q-point.
- This produces an AC collector current 𝐼𝑐(𝑝𝑒𝑎𝑘 ) = 10𝑚𝐴 above and below the Q-point.

Figure 4 Variation in AC current and voltage


- This change in the collector current changes the collector-emitter voltage 𝑉𝑐𝑒 (𝑝𝑒𝑎𝑘 ) = 2.2𝑉.
- This changing Vce is the required voltage amplification at the output of the transistor.
NOTE: REFER EXAMPLE 5-1 PAGE 221

5-2 VOLTAGE-DIVIDER BIAS


- Voltage-divider bias is one of the widely used biasing techniques for a
transistor.
- It uses a single power source and a voltage-divider to attain the voltage
base bias voltage.
- For circuit analysis, it is assumed that the base current IB is small enough
to be neglected.
- There are two types of voltage-dividers.
o Stiff voltage divider where
𝑅2
𝑉𝐵 = 𝑉
𝑅1 + 𝑅2 𝐶𝐶
If 𝑅𝐼𝑁 𝐵𝐴𝑆𝐸 ≥ 10𝑅2 Figure 5 Voltage-divider bias
o Non Stiff voltage divider where
𝑅2 ||𝑅𝐼𝑁 𝐵𝐴𝑆𝐸
𝑉𝐵 = 𝑉𝐶𝐶
𝑅1 + 𝑅2 ||𝑅𝐼𝑁 𝐵𝐴𝑆𝐸

If 𝑅𝐼𝑁 𝐵𝐴𝑆𝐸 < 10𝑅2

- 𝑅𝐼𝑁 𝐵𝐴𝑆𝐸 = 𝛽𝐷𝐶 𝑅𝐸

Prepared By: Syed Muhammad Asad – Semester 102 Page 3


PHYS 162 - Chapter 5 Transistor Bias Circuits
NOTE: REFER EXAMPLE 5-2 PAGE 224

5-3 OTHER BIAS METHODS


- Other types of biasing methods are
o Emitter Bias
 Excellent Q-point stability.
 Uses two voltages sources instead of one.
o Base Bias
 Mainly used for switching circuits.
 Not suitable for linear amplifier because of poor Q-point stability.
o Emitter-Feedback Bias
 Adding an RE in Base bias circuits gives emitter-feedback bias.
 Better Q-point stability than the base bias but still not well enough for linear operation.
o Collector-Feedback Bias
 Better Q-point stability than emitter-feedback bias.
 Can be used in linear amplifier circuits.
- A summary of all the equations is given in Table 1.

Table 1 Transistor Bias Circuit Formula Sheet


Voltage-Divider Bias Emitter Bias Base Bias Emitter-Feedback Collector-
Bias Feedback Bias
Stiff voltage-divider 𝑉𝐵 = 𝑉𝐸 + 𝑉𝐵𝐸
𝑅2
𝑉𝐵 = 𝑉
𝑅1 + 𝑅2 𝐶𝐶
If 𝑅𝐼𝑁 𝐵𝐴𝑆𝐸 ≥ 10𝑅2
Non Stiff voltage divider
𝑅2 ||𝑅𝐼𝑁 𝐵𝐴𝑆𝐸
𝑉𝐵 = 𝑉𝐶𝐶
𝑅1 + 𝑅2 ||𝑅𝐼𝑁 𝐵𝐴𝑆𝐸
If 𝑅𝐼𝑁 𝐵𝐴𝑆𝐸 < 10𝑅2
𝑅𝐼𝑁 𝐵𝐴𝑆𝐸 = 𝛽𝐷𝐶 𝑅𝐸
𝑉𝐸 = 𝑉𝐵 − 𝑉𝐵𝐸 𝑉𝐸 ≈ −1𝑉 (neglecting
effect of 𝛽𝐷𝐶 )

𝑉𝐸 = 𝑉𝐸𝐸 + 𝐼𝐸 𝑅𝐸 (taking
𝛽𝐷𝐶 into account)
𝑉𝐸 Without 𝛽𝐷𝐶 𝑉𝐶𝐶 − 𝑉𝐵𝐸 𝑉𝐶𝐶 − 𝑉𝐵𝐸 𝑉𝐶𝐶 − 𝑉𝐵𝐸
𝐼𝐶 ≅ 𝐼𝐸 = −𝑉𝐸𝐸 − 1𝑉 𝐼𝐶 = 𝛽𝐷𝐶 𝐼𝐶 ≅ 𝐼𝐸 = 𝐼𝐶 =
𝑅𝐸 𝑅𝐵 𝑅𝐸 + 𝑅𝐵 /𝛽𝐷𝐶 𝑅𝐶 + 𝑅𝐵 /𝛽𝐷𝐶
𝐼𝐶 ≅ 𝐼𝐸 =
𝑅𝐸
With 𝛽𝐷𝐶
−𝑉𝐸𝐸 − 𝑉𝐵𝐸
𝐼𝐶 ≅ 𝐼𝐸 =
𝑅𝐸 + 𝑅𝐵 /𝛽𝐷𝐶
𝑉𝐶 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 𝑉𝐶 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶
𝑉𝐶𝐸 = 𝑉𝐶 − 𝑉𝐸 𝑉𝐶𝐸 = 𝑉𝐶 − 𝑉𝐸 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 + 𝑅𝐸 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶

NOTE: REFER EXAMPLE 5-6, 5-7, 5-8, 5-9, 5-10 PAGE 230-236

Prepared By: Syed Muhammad Asad – Semester 102 Page 4

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