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Beginning FPGA Programming - Partie52

This document describes how to create a tripwire device using a laser pointer and light sensor. It involves using an ADC interface IP core to read light sensor data from an ADC and send it to a counter module. The counter module detects when the laser beam is blocked, counts the number of times this occurs, and displays the count on LEDs. It provides instructions on adding the necessary IP cores and module files to a project and compiling it to program the FPGA.

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ali alilou
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26 views

Beginning FPGA Programming - Partie52

This document describes how to create a tripwire device using a laser pointer and light sensor. It involves using an ADC interface IP core to read light sensor data from an ADC and send it to a counter module. The counter module detects when the laser beam is blocked, counts the number of times this occurs, and displays the count on LEDs. It provides instructions on adding the necessary IP cores and module files to a project and compiling it to program the FPGA.

Uploaded by

ali alilou
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Chapter 12 ■ Light Sensors: Turning a Laser Pointer into a Hi-Tech Tripwire

response_valid : out std_logic; -- response.valid


response_channel : out std_logic_vector(4 downto 0); -- .channel
response_data : out std_logic_vector(11 downto 0); -- .data
response_startofpacket : out std_logic; -- .startofpacket
response_endofpacket : out std_logic; -- .endofpacket
sequencer_csr_address : in std_logic := '0'; -- sequencer_csr.address
sequencer_csr_read : in std_logic := '0'; -- .read
sequencer_csr_write : in std_logic := '0'; -- .write
sequencer_csr_writedata : in std_logic_vector(31 downto 0) := (others => '0');
--.writedata
sequencer_csr_readdata : out std_logic_vector(31 downto 0) -- endofpacket
);
end component adc_interface;

component light_sensor_adc_sequencer
port
(
clk : in std_logic;
avm_m0_address : out std_logic_vector(9 downto 0);
avm_m0_chipselect : out std_logic;
avm_m0_read : out std_logic;
avm_m0_readdata : in std_logic_vector(31 downto 0);
avm_m0_write : out std_logic;
avm_m0_writedata : out std_logic_vector(31 downto 0)
);
end component;

component light_sensor_counter_led
generic (LOW_BOUNDARY : integer;
HIGH_BOUNDARY : integer;
NUM_LEDS : integer
);
port(clk : in std_logic;
avl_str_sink_valid : in std_logic;
avl_str_sink_channel : in std_logic_vector(4 downto 0);
avl_str_sink_data : in std_logic_vector(11 downto 0);
avl_str_sink_startofpacket : in std_logic;
avl_str_sink_endofpacket : in std_logic;
pb4 : in std_logic;
led : out std_logic_vector(NUM_LEDS-1 downto 0)
);
end component;

signal pll_adc_clk_50m_wire : std_logic;


signal pll_cascade_c0_wire : std_logic;
signal pll_adc_c0_wire : std_logic;
signal adc_pll_locked_wire : std_logic;
signal pll_cascade_locked_reset_wire : std_logic;
signal pll_cascade_locked_reset_wire_n : std_logic;

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Chapter 12 ■ Light Sensors: Turning a Laser Pointer into a Hi-Tech Tripwire

signal wire_avm_m0_address : std_logic_vector(9 downto 0);


signal wire_avm_m0_chipselect : std_logic;
signal wire_avm_m0_read : std_logic;
signal wire_avm_m0_waitrequest : std_logic;
signal wire_avm_m0_readdata : std_logic_vector(31 downto 0);
signal wire_avm_m0_write : std_logic;
signal wire_avm_m0_writedata : std_logic_vector(31 downto 0);

signal wire_avl_str_adc_counter_valid : std_logic;


signal wire_avl_str_adc_counter_channel : std_logic_vector(4 downto 0);
signal wire_avl_str_adc_counter_data : std_logic_vector(11 downto 0);
signal wire_avl_str_adc_counter_startofpacket : std_logic;
signal wire_avl_str_adc_counter_endofpacket : std_logic;

begin

-- The ADC in 10M08DAF484 needs to be fed by the c0 output of PLL_1 in the device.
-- The input clock source SYS_CLK on the BeMicro Max10 board is unfortunately placed on
the dedicated input to PLL_2 and can not feed PLL_1
-- Therefore we need to cascade the clock source via PLL_2, which is called "cascade_pll"
in this case.
cascade_pll_inst : cascade_pll
port map (
areset => '0',
inclk0 => SYS_CLK,
c0 => pll_cascade_c0_wire,
locked => pll_cascade_locked_reset_wire
);

-- The ADC sample clock must use the c0 output of PLL_1


adc_pll_inst : adc_pll
port map(
inclk0 => pll_cascade_c0_wire,
areset => pll_cascade_locked_reset_wire_n,
c0 => pll_adc_c0_wire,
c1 => pll_adc_clk_50m_wire,
locked => adc_pll_locked_wire
);

pll_cascade_locked_reset_wire_n <= not pll_cascade_locked_reset_wire;

-- This module is created with Qsys


adc_inst : adc_interface
port map (
clock_clk => pll_adc_clk_50m_wire, -- System clock
reset_sink_reset_n => '1',
adc_pll_clock_clk => pll_adc_c0_wire, -- ADC clock
adc_pll_locked_export => adc_pll_locked_wire, -- PLL lock condition

sequencer_csr_readdata => wire_avm_m0_readdata,


sequencer_csr_writedata => wire_avm_m0_writedata,

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Chapter 12 ■ Light Sensors: Turning a Laser Pointer into a Hi-Tech Tripwire

sequencer_csr_address => wire_avm_m0_address(0),


sequencer_csr_write => wire_avm_m0_write,
sequencer_csr_read => wire_avm_m0_read,

response_valid => wire_avl_str_adc_counter_valid,


response_channel => wire_avl_str_adc_counter_channel,
response_data => wire_avl_str_adc_counter_data,
response_startofpacket => wire_avl_str_adc_counter_startofpacket,
response_endofpacket => wire_avl_str_adc_counter_endofpacket
);

-- This module writes a "run" command into the ADC's CSR register
-- Default address in Qsys was placed on 0x0000_0000. Make sure it corresponds!
sequencer_inst : light_sensor_adc_sequencer
port map (
clk => pll_adc_clk_50m_wire,
avm_m0_address => wire_avm_m0_address,
avm_m0_chipselect => wire_avm_m0_chipselect,
avm_m0_read => wire_avm_m0_read,
avm_m0_readdata => wire_avm_m0_readdata,
avm_m0_write => wire_avm_m0_write,
avm_m0_writedata => wire_avm_m0_writedata
);

-- This module take the ADC data and detect the lost of light from laser beam
-- Counter number of lost and output the count value to LEDs
counter_led_inst : light_sensor_counter_led
generic map(
LOW_BOUNDARY => LOW_BOUNDARY,
HIGH_BOUNDARY => HIGH_BOUNDARY,
NUM_LEDS => NUM_LEDS
)
port map(
clk => pll_adc_clk_50m_wire,
avl_str_sink_valid => wire_avl_str_adc_counter_valid,
avl_str_sink_channel => wire_avl_str_adc_counter_channel,
avl_str_sink_data => wire_avl_str_adc_counter_data,
avl_str_sink_startofpacket => wire_avl_str_adc_counter_startofpacket,
avl_str_sink_endofpacket => wire_avl_str_adc_counter_endofpacket,
pb4 => PB(4),
led => USER_LED
);

end arch;

12.6.4 Add All Files to the Project and Create the Tripwire Device
You need to add two Altera IPs to the project. Please take the following steps:
Step 1: Right-click the File icon (Figure 12-35) and click Add/Remove Files in Project… or, from the
Project menu, select Add/Remove Files in Project.

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Chapter 12 ■ Light Sensors: Turning a Laser Pointer into a Hi-Tech Tripwire

Figure 12-35.  Add/Remove Files in Project

Step 2: Browse ➤project_directory➤\adc_interface\synthesis\ and select adc_interface.qip. Click


Open and then Add (Figure 12-36).

Figure 12-36.  Add adc_interface.qip file to the project

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Chapter 12 ■ Light Sensors: Turning a Laser Pointer into a Hi-Tech Tripwire

Step 3: After you have added the adc_pll.qip and cascade_pll.qip files, Figure 12-37 shows all the
files in the correct order. You can use the Up or Down button to move the file order up or down. Please follow
this file order, as it is very important for simulation. The top-level design file (light_sensor_top.vhd) must
be the last one.

Figure 12-37.  File list for the light sensor—tripwire design

Step 4: When all the files are ready, select the light_sensor_top.vhd file as the top-level entity. Right-
click the light_sensor_top.vhd file and select Set as Top-Level Entity.

Step 5: Click the or select Start Compilation from the Processing menu. You should see
Figure 12-38 as your result. In the Task window (lower left), it should have all green checks, a 100% progress
bar, and no red errors in the Message window. At this point, you are ready to upload the design to the MAX10
FPGA.

255

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