FESD Unit2 AVR PDF

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AVR(ATmega16) Microcontroller

Gaurav Verma
Assistant Professor
Department of Electronics and Communication Engineering
Jaypee Institute of Information and Technology
Sector-62, Noida, Uttar Pradesh, India

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History of AVR Series Microcontrollers
 Designed by Alf-Egil Bogen and Vegard Wollan at
Norwegin Institute of Technology(NTH).
 Developed in the year 1996 by Atmel Corporation.
 AdvancedVirtual RISC.

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What’s special about AVR?

• AVRs are about 4 times faster than PICs


• AVRs consume less power and can be operated in different
power saving modes.

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Features of Atmega16
 8 bit Controller
 Has 40 pins
• 32 pins for I/O
• 8 pins reserved
 Clock Frequency: 16Mhz
 I/O pins divided into 4 groups
• Named as Ports.
• Four ports A,B,C and D.
 16Kb Flash memory
 512Bytes EEPROM
 1Kb Internal SRAM

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Features of ATmega16 cont.…..
 Three inbuilt timers
• Two 8-bit
• One 16-bit
 Operating Voltages
• 2.7V - 5.5V (ATmega16L)
• 4.5V - 5.5V (ATmega16)
 Maximum programmable Cycles:
• 10,000 for Flash memory
• 100,000 for EEPROM

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Detailed Pin Diagram of ATmega16

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PIN DIAGRAM of ATmega16

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Architecture of AVR
 Advanced RISC CPU architecture
 Consist of 32 x 8-bit general purpose working
registers.
 AVR does not have any register like accumulator
as in 8051 family of microcontrollers
 AVR follows Harvard Architecture for Memory
Access.

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Memory Architecture

Memories

RAM ROM

EEPROM Flash
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RAM(Random Access Memory)

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GPRs and ALU

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PC(Program Counter)

 Width of PC decides no. of Memory Locations in


Program Memory
 In Atmega16
 Capacity of one location in Flash Memory : 2 bytes
 Total No of Memory Locations: 8K
 PC of Atmega16 is 13 bits wide.
 Address Range: $0000-$1FFF
 MaximumWidth of PC in AVR: 22 bits
 Power UP value of PC:$0000

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Harvard Architecture in AVR

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Abstract Architecture of Atmega16

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Registers?
 Registers are the links between our code and the
hardware (pins).
 They actually are the memory locations inside the μC
whose names and sizes are predefined.
 I/O Pins of a Microcontroller are divided generally into
groups of 8 pins called PORT.
 Each PORT contains some registers associated with it.

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Registers for I/O Ports

Registers DDRx
PINx
PORTx
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DDR(Data Direction Register)
 It is 8-bit register which sets the pins either input or
output. Each bit of the register corresponds to a
pin.
 0 - Sets the corresponding pin INPUT
 1 - Sets the corresponding pin OUTPUT
 If the pin is input, then the voltage at that pin is
undecided until an external voltage is applied.
 If the pin is output, then the voltage at that pin is fixed to
a particular value (5V or 0).
PORT Register
 PORT is also an 8 bit register. The bits on the PORT
register correspond to the pins of the associated port in
the same manner as in the case of the DDR register.

 PORT is used to set the output value.

 If the pin is set as output, then a PORT value of 1 will set


voltage at that pin to 5V. If PORT value is 0, then voltage
is set to 0V.
I/O Port Concept

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Pull Up / Pull Down
 What if we try to set the PORT value of a pin that is
configured as input?

 A separate purpose is served: that of pull up or pull down.

 When an input pin is connected by a wire to some specific


voltage, it’s voltage also becomes that same value.

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Pull Up register concept

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Pull Up/ Pull Down
 But, when the input pin is left free, it’s voltage value is
undecided.This is bad.
 To prevent this, a “default” value is assigned. This value can be
either 5V or 0, and is of consequence only when the pin is
unconnected.
 The PORT value becomes this “default” value.
 If “default” value is 0, then pin is pulled down. If it is 5V, then
it is pulled up.

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Pin Register
 PIN is a register whose value can be read, but cannot be
changed inside the program.
 It gives the value of the actual voltage at a particular pin. 5V
corresponds to 1, and 0 corresponds to 0.

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Summary

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Interrupts

Gaurav Verma
Assistant Professor
Department of Electronics and Communication Engineering
Jaypee Institute of Information and Technology
Sector-62, Noida, Uttar Pradesh, India

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INTERRUPTS
 An interrupt is an external or internal event that interrupts
the microcontroller to inform it that a device needs its
service

 A single microcontroller can have several types of interrupts


1. Hardware vs software
2. External vs Internal
3. Vectored vs NonVectored
4. Maskable vs Non Maskable

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Interrupt Vs Polling
1. Interrupts
 Whenever any device needs its service, the device notifies the
microcontroller by sending it an interrupt signal.
 Upon receiving an interrupt signal, the microcontroller interrupts
whatever it is doing and serves the device.
 The program which is associated with the interrupt is called the
interrupt service routine (ISR) or interrupt handler.
2. Polling
 The microcontroller continuously monitors the status of a given
device.
 When the conditions met, it performs the service.
 After that, it moves on to monitor the next device until every one is
serviced.
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Interrupts in ATmega16
1. Reset – power-up reset.

2. Three interrupts are set aside for hardware external


interrupts.
 PD.2, PD.3, PB.3 are for the external hardware interrupts INT0,
INT1 and INT2.

3. Two interrupts are set aside for each of the timers.


 one for overflow and another for compare match

4. Serial communication has three interrupts one for receive


& two for transfer.
5. ADC, SPI, I2C etc.
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Interrupt Vector Table

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ATmega16 Interrupt related
Registers
 The various registers associated with the use of external
interrupts are:

 SREG – Bit D7 must be high first and then


corresponding interrupt bit of a particular module
must be enabled for interrupt to happen.

 GICR – General Interrupt control register


 MCUCR- MCU control register
 MCUCSR – MCU control and status register
 GIFR- General Interrupt Flag register
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Status Register (SREG)

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General Interrupt Control register
(GICR)

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MCU Control register (MCUCR)

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MCU Control & Status register
(MCUCSR)

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General Interrupt Flag Register
(GIFR)

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Interrupt Priority
 If two interrupts are activated at the same time, the interrupt with the higher
priority is served first.
 The priority of each interrupt is related to the address of the interrupt
defined in the interrupt vector table.

 Interrupt inside the interrupt??


 Interrupt Latency?
 Ans: The time from the moment an interrupt is activated to the moment
the CPU starts to execute the task is called latency.

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Interrupt Vector Table

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Interrupt Programming in C
 Interrupt include file: #include<avr\interrupt.h>

 Cli() and sei() macros to clear and set the D7 bit of SREG register.

 Defining ISR:
ISR (interrupt vector name)
{
//our interrupt handler program
}

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Interrupt Vector Name defined in WinAVR

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Interrupt Interface using INT0

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Toggle the LED connected on PORTC using
external interrupt INT0 (PORTD 2)
#include <avr/io.h>
#include <avr/interrupt.h>
#include <util/delay.h>
int main(void)
{
DDRC=(1<<7); /* Make PORTC as output PORT*/
PORTC=0;
DDRD=(0<<2); /* PORTD as input */
PORTD=0xFF; /* Make pull up high */
GICR = 1<<INT0; /* Enable INT0*/
MCUCR = (1<<ISC01 | 1<<ISC00); /* Trigger INT0 on rising edge */
sei(); /* Enable Global Interrupt */
while(1);
}
ISR(INT0_vect)
{
PORTC=~PORTC; /* Toggle PORTC */
_delay_ms(50); /* Software debouncing control delay */
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41}
Timers/Counter

Gaurav Verma
Assistant Professor
Department of Electronics and Communication Engineering
Jaypee Institute of Information and Technology
Sector-62, Noida, Uttar Pradesh, India

42 copyright@gauravverma
Timers
 Timer is special register that can
be 8-16 bit so capable of holding
from 0 to 255-65536

 What differ it from any register


that it count up / down
automatically at predefined rate
and this is Timer Clock that
doesn’t need CPU intervention.

 Timer Clock could be internal /


external
Timer and Counter

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 One of basic condition when Timer overflow(
it means timer counted up to its maximum
value and return back to zero).

 In this situation it causes interrupt and if


global interrupt mask is enabled and timer
interrupt enable so you have to write ISR to
handle the event of the overflow

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 Resolution:
 is the smallest period taken by timer to take one
count we can calculate it through formula
Resolution = (1/Frequency)

 If you using 1 MHZ for CPU, Clock timer takes 256


us to count up till it overflow

 So if microcontroller is clocked with 1MHz source,


then 8 bit timer will run with resolution:
Resolution=1/1MHz=1µs

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 In case you want to increase the time needed for
specific operation we use timer prescalar
 Prescalar divide the clock frequency and
produce timer clock
 Prescalar modes are
 No prescalar (Timer Clock).
 Clock/8.
 Clock/64. Note
 Clock/256. CPU Clock doesn’t
 Clock/512. affected by reduction
 Clock/1024. using prescalar.
prescalar.
 NO clock. It remain the same

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 Example for using prescalar :
 If you using 1 MHZ for CPU Clock without using
prescalar timer takes to count up till it overflow 256
µs
 But when you use prescalar 1024, timer takes 0.26 sec
to count up till it overflow
 It’s easy to know the time timer need to overflow if
you know Resolution.
Resolution = (1/Frequency)
 So if microcontroller is clocked with 1MHz source,
then 8 bit timer without prescaler will run with
resolution:
Resolution=1/1MHz=1µs

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 So if timer take 256 counts to overflow then it
takes :

T= Resolution * 256 = 1µs *256 = 256 µs

 And when we use 1024 as prescalar:

Resolution = 1024 / 1 MHZ = 1024µs

T = Resolution * 256 = 1024 * 256 = 0.256s

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Timers in ATmega16
 ATmega16/32 have 3 Timer/counter we have
three Timers/Counters each one with Separate
Prescaler.
 Timer 0 - 8 bit timer.
 Timer 1 -16 bit timer.
 Timer 2 - 8 bit timer.
 Timer can also be operated in 3 modes :
 Normal mode (Overflow).
 Clear Timer Compare mode(CTC ).
 Pulse Width Modulation mode(PWM).
Timer in Atmega16

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Timer 0 Register
 Timer/Counter Control Register – TCCR0

 Bit 7 – FOC0: Force Output Compare


 The FOC0 bit is only active when the WGM00 bit specifies a
non-PWM mode.
 Bit 6, 3 –WGM(00:01) Waveform Generation Mode
Timer 0 Register
 Bit 5:4 – COM01:00 Compare Match Output Mode
Timer 0 Register
 Bit 2:0 – CS02:0: Clock Select
Timer 0 Register
 Timer/Counter Register –TCNT0
 This is where the 8-bit counter of the timer
resides. The value of the counter is stored here
and it increases automatically each clock cycle.
Data can be both read/written from this
register. The initial value of the counter is set by
writing it.
Timer 0 Register
 Output Compare Register – OCR0
 The Output Compare Register contains an 8-bit
value that is continuously compared with the
counter value (TCNT0). A match can be used to
generate an output compare interrupt, or to
generate a waveform output on the OC0 pin.
Timer 0 Register
 Timer/Counter Interrupt Mask Register –
TIMSK
 TOIE0: Timer Overflow Interrupt Enable
 OCIE0: Output Compare Match Interrupt Enable
Timer 0 Register
 Timer/Counter Interrupt Flag Register – TIFR

 TOV0:
 The bit TOV0 is set (one) when an overflow occurs in Timer/Counter0.
TOV0 is cleared by hardware when executing the corresponding
interrupt handling vector. When the SREG I-bit, TOIE0
(Timer/Counter0 Overflow Interrupt Enable), and TOV0 are set (one),
the Timer/Counter0 Overflow interrupt is executed.
 OCF0
 The OCF0 bit is set (one) when a compare match occurs between the
Timer/Counter0 and the data in OCR0 – Output Compare Register0.
OCF0 is cleared by hardware when executing the corresponding
interrupt handling vector. When the I-bit in SREG, OCIE0
(Timer/Counter0 Compare Match Interrupt Enable), and OCF0 are set
(one), the Timer/Counter0 Compare Match Interrupt is executed.
Timer 0 Modes
 Normal Mode (Overflow)
 A timer overflow means that the counter(TCTNx)
has counted up to its maximum value and is reset to
zero in the next timer clock cycle.
 The resolution of the timer determines the
maximum value of that timer.
 The timer overflow event causes the Timer Overflow
Flag (TOVx) to be set in the Timer Interrupt Flag
Register (TIFR).
Timer 0 Modes
 Timer compare mode :
 In compare mode we load a register called Output Compare
Register OCRx with a value of our choice and the timer will
compare the current value of timer TCTNx with that of Output
Compare Register continuously and when they match the
following things can be configured to happen:

 In Clear Timer on Compare mode (CTC) timer is configured to


clear its count register TCNTx to “0” when matching occurs
with the output compare register OCRx.

 A related Output Compare Pin can be made to go high, low or


toggle automatically. This mode is ideal for generating square
waves of different frequency.

 It can be used to generate PWM signals used to implement a


DAC digital to analog converter which can be used to control
the speed of DC motors.
CTC Mode
Compare Match Interrupts
 A compare match interrupt is called when the value
of the timer equals a specific value, set by the user.
 This value is set by setting the value of OCR register.
 Before incrementing, the value of the timer is
compared to OCR. If the two are equal, a COMPARE
MATCH interrupt is generated
Interrupts – Overflow and Compare
Match
CTC Mode Statistics
 If clock time period is t:
 1. Timer cycle time period = ( +1)×
 2. Frequency = 1/( +1)×
PWM (Pulse Width Modulation)

Gaurav Verma
Assistant Professor
Department of Electronics and Communication Engineering
Jaypee Institute of Information and Technology
Sector-62, Noida, Uttar Pradesh, India

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Motor
DC Supply
DC Supply
DC Supply
50% Duty Cycle
25% Duty Cycle
75% Duty Cycle
PWM Generation
Modes of PWM
 Inverted Mode(A)
 Non-Inverted Mode(B)
 Toggle Mode
PWM
PWM Modes of Operation
 Fast PWM
 Phase Correct PWM
 Frequency and Phase Correct PWM
Fast PWM
Phase Correct PWM
TCCR0

Bit 6,3 – WGM01:0 – Waveform Generation Mode


TCCR0

Bit 5,4 – COM01:0 – Compare Match Output


Mode

Compare Output Mode, Fast PWM Mode


TCCR0

Bit 5,4 – COM01:0 – Compare Match Output


Mode

Compare Output Mode, Phase Correct PWM Mode


OCR0 – Output Compare Register
 Used to store the compare value.
 In PWM: Used to store Duty Cycle

OCR0 = 45% of 255 = 114.75 = 115


LED Flasher
Microcontroller Communication

Gaurav Verma
Assistant Professor
Department of Electronics and Communication Engineering
Jaypee Institute of Information and Technology
Sector-62, Noida, Uttar Pradesh, India
Types of Communication
 Computers transfer data in two ways:
 Parallel: Often 8 or more lines (wired conductors) are used to transfer
data to a device that is only a few feet away. Example: PCI, ARM Bus.

 Serial: To transfer to a device located many meters away, the serial


method is used (wired or wireless). The data is sent one bit at a time.
Example: SPI, RS232, I2C,USB, Bluetooth, Zigbee, IrDA

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How data sent serially
Basics of Serial Communication
 Serial data communication uses two methods
 Synchronous method transfers a block of data at a time

 Asynchronous method transfers a single byte at a time

 There are special IC’s made by many manufacturers for serial


communications.
 UART (universal asynchronous Receiver transmitter)

 USART (universal synchronous-asynchronous Receiver-transmitter)

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Asynchronous – Start & Stop Bit
 Asynchronous serial data communication is widely used for
character-oriented transmissions
 Each character is placed in between start and stop bits, this is called
framing.
 Block-oriented data transfers use the synchronous method.

 The start bit is always one bit, but the stop bit can be one or
two bits

 The start bit is always a 0 (low) and the stop bit(s) is 1


(high)

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Asynchronous – Start & Stop Bit

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Data Transfer Rate
 The rate of data transfer in serial data communication is stated in bps
(bits per second).

 Another widely used terminology for bps is baud rate.


 It is modem terminology and is defined as the number of signal
changes per second
 In modems, there are occasions when a single change of signal transfers
several bits of data

 As far as the conductor wire is concerned, the baud rate and


bps are the same.

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Communication Modes
Serial Communication Protocols
 SPI – Serial Peripheral Interface
 Three wire interface
 Slave Select line for communication of multiple ICs
 I2C – Inter-Integrated Circuit
 Invented by Philips
 Advanced USART
 Two wire interface
 FireWire
 Developed by Apple Computers
 High speed busses capable of Audio/Video Transmission
FireWire
 Ethernet:
 Used mostly in LAN connections
 bus consists of 8 lines, or 4 Tx/Rx pairs
 Universal serial bus (USB):
 RS-232 :
 Recommended Standard 232
 typically connected using a DB9
 Total 9 pins (3 output+5 input + GND)
 Approved by the Electronic Industries Association
Interfacing IC

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Interfacing to PC through RS232

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How to program on chip USART
 Initialize USART
 Set baud rate value : 9600
 Register Used: UBRR (USART Baud Rate Register)
 Enable Receive & Transmit mode
 Register Used: UCSRB (USART Control & Status Register)
 Set the 8 bit frame format
 Register Used: UCSRC (USART Control & Status Register)
 Transmit Data
 Put data in UDR Register and check UDRE bit in UCSRA register
until all the data gets transmitted.
 Receive Data
 Check RXC bit in UCSRA register until all the data get received in
UDR register.
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UBBR(USART Baud Rate Register)
UCSRB: USART Control and Status Register B

• Bit 7: RXCIE – RX Complete Interrupt Enable


• Bit 6: TXCIE – TX Complete Interrupt Enable
• Bit 5: UDRIE – USART Data Register Empty
Interrupt Enable
• Bit 4: RXEN – Receiver Enable
• Bit 3: TXEN – Transmitter Enable
• Bit 2: UCSZ2 – Character Size
• Bit 1: RXB8 – Receive Data Bit 8
• Bit 0: TXB8 – Transmit Data Bit 8
UCSRC: USART Control and Status Register C

• Bit 7: URSEL – USART Register Select


• Bit 6: UMSEL – USART Mode Select
• Bit 5:4: UPM1:0– Parity Mode
• Bit 3: USBS – Stop Bit Select
• Bit 2:1: UCSZ1:0 – Character Size
• Bit 0: UCPOL – Clock Polarity
UDR
UCSRA: USART Control and Status Register A

• Bit 7: RxC – USART Receive Complete Flag


• Bit 6: TxC – USART Transmit Complete Flag
• Bit 5: UDRE – USART Data Register Empty
• Bit 4: FE – Frame Error
• Bit 3: DOR – Data Overrun Error
• Bit 2: PE – Parity Error
• Bit 1: U2X – Double Transmission Speed
• Bit 0: MPCM – Multi-Processor Communication
Mode
UCSRC
UCSRC
Bluetooth

Gaurav Verma
Assistant Professor
Department of Electronics and Communication Engineering
Jaypee Institute of Information and Technology
Sector-62, Noida, Uttar Pradesh, India

108 Copyright to gaurav verma


Bluetooth
 Bluetooth is a wireless technology standard for exchanging data
over short distances (using short-wavelength UHF radio waves in
the ISM band from 2.4 to 2.485 GHz) from fixed and mobile
devices, and building personal area networks (PANs).
 Invented by telecom vendor Ericsson in 1994.
 It is a standard for a small, cheap radio chip to be plugged into
electronic devices to enable wireless communication between
them.
 Named after a late tenth century king Herald Bluetooth, King of
Denmark and Norway, known for his unification of previously
warring tribes.
 Bluetooth intended to unify different technologies.
 Unlike IrDA, it does not need line-of-sight and one-to-one
communication
 Transmits data through low-power radio waves at a frequency of
2.45GHz (between 2.402 – 2.480 GHz)
 Frequency band has been internationally earmarked for use of
industrial, scientific, and medical devices
 Avoids interfering with other systems by sending weak signals of
about 1 mw, making range of Bluetooth transmission restricted to
10m
 Wall cannot stop a Bluetooth signal, making it useful for controlling
several devices in different rooms
 Can connect upto 8 devices simultaneously
 Devices do not interfere with each other, due to the use of spread
spectrum frequency hopping.
 A device uses 79 individual, randomly chosen frequencies within a
designated range, changing from one frequency to another 1600
times per second on a regular basis
Bluetooth Network Establishment
 Electronic conversation takes place between devices to determine
whether they have data to share, or whether one needs to control
another
 Devices form a Personal Area Network (PAN) called a piconet
 A piconet has one major device and upto 7 slave devices
 A piconet is an ad-hoc computer network
 Upto another 255 devices can be inactive, or parked, which a master
device can bring into active status at any time
 Two or more piconets can be connected together to form a scatternet,
some devices acting as bridge
 Every device has a 48-bit address, however, the device names are
conveniently used.
HC 06 Bluetooth Module
 It consists of bluetooth serial interface module and bluetooth adapter.
 This module has two modes: master and slave mode. This Bluetooth
connection is like a serial port line connection including RXD, TXD
signals and they can communicate with each other.
HC 06 Bluetooth Module
Interfacing with ATmega16
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