Combinational Logic Review

Digital Devices was a LONG, LONG time ago in a galaxy FAR,

FAR, AWAY for many of you.

We don’t expect you to remember everything you learned in

Digital Devices, but you need to remember > 0%.

We will review some to help you remember. You also need to

go back and look at old notes. After a couple of days of review,
we will expect you to be up to speed, and then we will ZOOM
along.
Ask QUESTIONS during CLASS to SLOW things down.
V 0.4 1
 Binary Representation
• The basis of all digital data is binary representation.
• Binary - means ‘two’
– 1, 0
– True, False
– Hot, Cold
– On, Off
• We must be able to handle more than just values for
real world problems
– 1, 0, 56
– True, False, Maybe
– Hot, Cold, LukeWarm, Cool
– On, Off, Leaky
V 0.4 2
 Number Systems
• To talk about binary data, we must first talk about
number systems
• The decimal number system (base 10) you should
be familiar with!
– A digit in base 10 ranges from 0 to 9.
– A digit in base 2 ranges from 0 to 1 (binary number
system). A digit in base 2 is also called a ‘bit’.
– A digit in base R can range from 0 to R-1
– A digit in Base 16 can range from 0 to 16-1
(0,1,2,3,4,5,5,6,7,8,9,A,B,C,D,E,F). Use letters A-F to
represent values 10 to 15. Base 16 is also called
Hexadecimal or just ‘Hex’.
V 0.4 3
 Positional Notation
Value of number is determined by multiplying each digit by a
weight and then summing. The weight of each digit is a
POWER of the BASE and is determined by position.

953.78 = 9 * 102 + 5 * 101 + 3 * 100 + 7 * 10-1 + 8 * 10-2

= 900 + 50 + 3 + .7 + .08 = 953.78

0b1011.11 = 1*23 + 0*22 + 1*21 + 1*20 + 1*2-1 + 1*2-2

= 8 + 0 + 2 + 1 + 0.5 + 0.25
= 11.75

0xA2F = 10*162 + 2*161 + 15*160

= 10 * 256 + 2 * 16 + 15 * 1
= 2560 + 32 + 15 = 2607
V 0.4 4
 Base 10, Base 2, Base 16
The textbook uses subscripts to represent different
bases (ie. A2F16 , 953.7810, 1011.112 )
I will use special symbols to represent the different bases.
The default base will be decimal, no special symbol for
base 10.
The ‘0x’ will be used for base 16 ( 0xA2F)
The ‘0b’ will be used for base 2 (0b10101111)

If ALL numbers on a page are the same base (ie, all in base
16 or base 2 or whatever) then no symbols will be used and
a statement will be present that will state the base (ie, all
numbers on this page are in base 16).

V 0.4 5
 Common Powers
2-3 = 0.125
2-2 = 0.25 160 = 1 = 20
2-1 = 0.5 161 = 16 = 24
20 = 1 162 = 256 = 28
21 = 2
22 = 4
163 = 4096 = 212
23 = 8
24 = 16
25 =32
26 = 64
27 = 128 210 = 1024 = 1 K
28 = 256 220 = 1048576 = 1 M (1 Mega) = 1024 K = 210 * 210
29 = 512 230 = 1073741824 = 1 G (1 Giga)
210 = 1024
211 = 2048
212 = 4096
V 0.4 6
 Conversion of Any Base to Decimal
Converting from ANY base to decimal is done by multiplying
each digit by its weight and summing.

Binary to Decimal

0b1011.11 = 1*23 + 0*22 + 1*21 + 1*20 + 1*2-1 + 1*2-2

= 8 + 0 + 2 + 1 + 0.5 + 0.25
= 11.75

Hex to Decimal

0xA2F = 10*162 + 2*161 + 15*160

= 10 * 256 + 2 * 16 + 15 * 1
= 2560 + 32 + 15 = 2607
V 0.4 7
 Conversion of Decimal Integer
To ANY Base
Divide Number N by base R until quotient is 0. Remainder at
EACH step is a digit in base R, from Least Significant digit to
Most significant digit.
Convert 53 to binary
53/2 = 26, rem = 1 Least Significant Digit
26/2 = 13, rem = 0
13/2 = 6 , rem = 1
6 /2 = 3, rem = 0
3/2 = 1, rem = 1
1/2 = 0, rem = 1 Most Significant Digit

53 = 0b 110101
= 1*25 + 1*24 + 0*23 + 1*22 + 0*21 + 1*20
= 32 + 16 + 0 + 4 + 0 + 1 = 53
V 0.4 8
 Least Significant Digit
Most Significant Digit

53 = 0b 110101

Most Significant Digit Least Significant Digit

(has weight of 25 or (has weight of 20 or 1).
32). For base 2, also For base 2, also called
called Most Significant Least Significant Bit
Bit (MSB). Always (LSB). Always
LEFTMOST digit. RIGHTMOST digit.
V 0.4 9
 More Conversions
Convert 53 to Hex

53/16 = 3, rem = 5
3 /16 = 0 , rem = 3
53 = 0x35
= 3 * 161 + 5 * 160
= 48 + 5 = 53

V 0.4 10
 Hex (base 16) to Binary Conversion

Each Hex digit represents 4 bits. To convert a Hex number to

Binary, simply convert each Hex digit to its four bit value.

Hex Digits to binary: Hex Digits to binary (cont):

0x0 = 0b 0000 0x9 = 0b 1001
0x1 = 0b 0001 0xA = 0b 1010
0x2 = 0b 0010 0xB = 0b 1011
0x3 = 0b 0011 0xC = 0b 1100
0x4 = 0b 0100 0xD = 0b 1101
0x5 = 0b 0101 0xE = 0b 1110
0x6 = 0b 0110 0xF = 0b 1111
0x7 = 0b 0111
0x8 = 0b 1000
V 0.4 11
 Hex to Binary, Binary to Hex
0xA2F = 0b 1010 0010 1111

0x345 = 0b 0011 0100 0101

Binary to Hex is just the opposite, create groups of 4 bits

starting with least significant bits. If last group does not
have 4 bits, then pad with zeros for unsigned numbers.

0b 1010001 = 0b 0101 0001 = 0x51

Padded with a zero

V 0.4 12
 A Trick!
If faced with a large binary number that has to be
converted to decimal, I first convert the binary number
to HEX, then convert the HEX to decimal. Less work!

0b 110111110011 = 0b 1101 1111 0011

= D F 3
= 13 * 162 + 15 * 161 + 3*160
= 13 * 256 + 15 * 16 + 3 * 1
= 3328 + 240 + 3
= 3571

Of course, you can also use the binary, hex conversion feature
on your calculator. Too bad calculators won’t be allowed on
the first test, though…...
V 0.4 13
 Binary Numbers Again
Recall than N binary digits (N bits) can represent unsigned
integers from 0 to 2N-1.

4 bits = 0 to 15
8 bits = 0 to 255
16 bits = 0 to 65535
Besides simply representation, we would like to also do
arithmetic operations on numbers in binary form.
Principle operations are addition and subtraction.

V 0.4 14
 Binary Arithmetic, Subtraction
The rules for binary arithmetic The rules for binary subtraction
are: are:
0 + 0 = 0, carry = 0 0 - 0 = 0, borrow = 0
1 + 0 = 1, carry = 0 1 - 0 = 1, borrow = 0
0 + 1 = 1, carry = 0 0 - 1 = 1, borrow = 1
1 + 1 = 0, carry = 1 1 - 1 = 0, borrow = 0

Borrows, Carries from digits to left of current of digit.

Binary subtraction, addition works just the same as
decimal addition, subtraction.
V 0.4 15
 Binary, Decimal addition
Binary
Decimal
0b 101011
34
+ 0b 000001
+ 17 ---------------
------ 101100
51 From LSB to MSB:
from LSD to MSD: 1+1 = 0, carry of 1
7+4 = 1; with carry out of 1 1 (carry)+1+0 = 0, carry of 1
to next column 1 (carry)+0 + 0 = 1, no carry
1 +0 = 1
0+0=0
1 (carry) + 3 + 1 = 5.
1+0=1
answer = 51.
answer = % 101100
V 0.4 16
 Subtraction
Decimal Binary
900 0b 100
- 001 - 0b 001
------- -------
899 011

0-1 = 9; with borrow of 1 0-1 = 1; with borrow of 1

from next column from next column
0 -1 (borrow) - 0 = 9, with 0 -1 (borrow) - 0 = 1, with
borrow of 1 borrow of 1
9 - 1 (borrow) - 0 = 8. 1 - 1 (borrow) - 0 = 0.
Answer = 899. Answer = % 011.

V 0.4 17
 Hex Addition
Decimal check.
0x3A
0x3A = 3 * 16 + 10
+ 0x28 = 58
-------- 0x28 = 2 * 16 + 8
0x62 = 40
58 + 40 = 98
A+8 = 2; with carry out of
1 to next column
0x62 = 6 * 16 + 2
= 96 + 2 = 98!!
1 (carry) + 3 + 2 = 6.
answer = 0x62

V 0.4 18
 Hex addition again
Why is 0xA + 0x8 = 2 with a carry out of 1?

The carry out has a weight equal to the BASE (in this case
16). The digit that gets left is the excess (BASE - sum).

Ah + 8h = 10 + 8 = 18.
18 is GREATER than 16 (BASE), so need a carry out!
Excess is 18 - BASE = 18 - 16 = 2, so ‘2’ is digit.
Exactly the same thing happens in Decimal.
5 + 7 = 2, carry of 1.
5 + 7 = 12, this is greater than 10!.
So excess is 12 - 10 = 2, carry of 1.
V 0.4 19
 Hex Subtraction
Decimal check.
0x34
0x34 = 3 * 16 + 4
- 0x27 = 52
-------- 0x27 = 2 * 16 + 7
0x0D = 39
52 - 39 = 13
4-7 = D; with borrow of 1
from next column
0x0D = 13 !!
3 - 1 (borrow) - 2 = 0.
answer = 0x0D.

V 0.4 20
 Hex subtraction again

Why is 0x4 – 0x7 = 0xD with a borrow of 1?

The borrow has a weight equal to the BASE (in this case
16).

BORROW +0x4 – 0x7 = 16 + 4 -7 = 20 -7 = 13 = 0xD.

0xD is the result of the subtraction with the borrow.
Exactly the same thing happens in decimal.
3 - 8 = 5 with borrow of 1
borrow + 3 - 8 = 10 + 3 - 8 = 13 - 8 = 5.

V 0.4 21
 Fixed Precision
With paper and pencil, I can write a number with as many digits as
I want:
1,027,80,032,034,532,002,391,030,300,209,399,302,992,092,920
A microprocessor or computing system usually uses FIXED
PRECISION for integers; they limit the numbers to a fixed
number of bits:
0x AF4500239DEFA231 64 bit number, 16 hex digits
0x 9DEFA231 32 bit number, 8 hex digits
0x A231 16 bit number, 4 hex digits
0x 31 8 bit number, 2 hex digits

High end microprocessors use 64 or 32 bit precision; low end

microprocessors use 16 or 8 bit precision.
V 0.4 22
 Unsigned Overflow
In this class I will use 8 bit precision most of the time, 16 bit
occasionally.

Overflow occurs when I add or subtract two numbers, and the

correct result is a number that is outside of the range of
allowable numbers for that precision. I can have both
unsigned and signed overflow (more on signed numbers later)

8 bits -- unsigned integers 0 to 28 -1 or 0 to 255.

16 bits -- unsigned integers 0 to 216-1 or 0 to 65535

V 0.4 23
 Unsigned Overflow Example
Assume 8 bit precision; ie. I can’t store any more than 8 bits for
each number.
Lets add 255 + 1 = 256. The number 256 is OUTSIDE the
range of 0 to 255! What happens during the addition?
255 = 0x FF
/= means Not Equal
+ 1 = 0x 01
-------------------
256 /= 0x00

0xF + 1 = 0, carry out

0xF + 1 (carry) + 0 = 0, carry out
Carry out of MSB falls off end, No place to put it!!!
Final answer is WRONG because could not store carry out.
V 0.4 24
 Unsigned Overflow

A carry out of the Most Significant Digit (MSD) or Most

Significant Bit (MSB) is an OVERFLOW indicator for addition
of UNSIGNED numbers.
The correct result has overflowed the number range for that
precision, and thus the result is incorrect.
If we could STORE the carry out of the MSD, then the answer
would be correct. But we are assuming it is discarded because
of fixed precision, so the bits we have left are the incorrect
answer.

V 0.4 25
 Binary Codes (cont.)
N bits (or N binary Digits) can represent 2N different values.
(for example, 4 bits can represent 24 or 16 different values)

N bits can take on unsigned decimal values from 0 to 2N-1.

Codes usually given in tabular form.

000 black
001 red
010 pink
011 yellow
100 brown
101 blue
110 green
111 white V 0.4 26
 Codes for Characters
Also need to represent Characters as digital data.
The ASCII code (American Standard Code for
Information Interchange) is a 7-bit code for Character
data. Typically 8 bits are actually used with the 8th bit
being zero or used for error detection (parity checking).
8 bits = 1 Byte.

‘A’ = % 01000001 = 0x41

‘&’ = % 00100110 = 0x26

7 bits can only represent 27 different values (128). This

enough to represent the Latin alphabet (A-Z, a-z, 0-9,
punctuation marks, some symbols like $), but what about
other symbols or other languages?
V 0.4 27
 ASCII
American Standard
Code for Information
Interchange

V 0.4 28
 UNICODE
UNICODE is a 16-bit code for representing alphanumeric data.
With 16 bits, can represent 216 or 65536 different symbols.
16 bits = 2 Bytes per character (the extended version uses 32-bits
per character, or 4 bytes, for 4,294,967,296 different symbols).
0x0041-005A A-Z
0x0061-4007A a-z
Some other alphabet/symbol ranges
0x3400-3d2d Korean Hangul Symbols
0x3040-318F Hiranga, Katakana, Bopomofo, Hangul
0x4E00-9FFF Han (Chinese, Japanese, Korean)

UNICODE used by Web browsers, Java, most software these

days.
V 0.4 29
 Basic Logic Gates

Copyright 2005. Thomson/Delmar Learning, All rights

reserved.
V 0.4 30
 Majority Gate (and-or) form

Copyright 2005. Thomson/Delmar Learning, All rights

reserved.

V 0.4 31
 DeMorgan’s Law

Copyright 2005. Thomson/Delmar Learning, All rights

reserved.

V 0.4 32
 Majority Gate (nand-nand) form

Copyright 2005. Thomson/Delmar Learning, All rights

reserved.

V 0.4 33
 Representing ‘1’ and ‘0’

• In the electrical world, two ways of representing ‘0’ and ‘1’

are (these are not the only ways):
– Presence or absence of electrical current
– Different Voltage levels
• Different voltage levels are the most common
– Usually 0v for logic ‘0’, some non-zero voltage for logic ‘1’ (I.e.
> 3 volts)
• Can interface external sources to digital systems in many
ways
– Switches, buttons, other human controlled input devices
– Transducers (change a physical quantity like temperature into a
digital quantity).

V 0.4 34
 Switch Inputs
High True switch Vdd is power
Vdd Vdd supply voltage,
typically 5V or
3.3V

L H

Gnd is 0 V
Gnd Gnd

Switch open Switch closed (asserted),

(negated), output is L output is H
V 0.4 35
 Examples of high, low signals
Vdd Vdd
Low True switch

H L

Gnd Gnd

Switch open (negated), Switch closed (asserted),

output is H output is L
V 0.4 36
 CMOS Transistors (P, N)

S: source
G: gate
D: drain

transistor
operation of P, N
types is
complementary
to each other

Copyright 2005. Thomson/Delmar Learning, All rights

reserved. V 0.4 37
 Inverter gate - takes 2 Transistors

PMOS is open (off)

PMOS is closed (on)

NMOS is Closed (on) NMOS is Open (off)

Copyright 2005. Thomson/Delmar Learning, All rights

reserved.

V 0.4 38
 Buffer - takes 4 Transistors

Copyright 2005. Thomson/Delmar Learning, All rights

reserved.

In digital logic, NMOS must be connected to ground, PMOS to

VDD. V 0.4 39
 NAND gate - takes 4 Transistors

AB Y
L L H
L H H
H L H
H H L

AB Y
0 0 1
0 1 1
1 0 1
1 1 0

V 0.4 40
 How do we make an AND gate?
The only way with CMOS transistors is to connect an inverter
after a NAND gate.

Copyright 2005. Thomson/Delmar Learning, All rights

reserved.

Takes 6 transistors! In CMOS technology, NAND gates are

preferable to AND gates because they take less transistors, are
faster, and consume less power.
V 0.4 41
 Tri State Buffer
There is another way to drive a line or bus from multiple
sources. Use a TRISTATE buffer.

EN EN
A Y
A Y

When EN = 1, then Y = A.
When EN = 0, then Y = ??????
Y is undriven, this is called the high impedance state.
Designate high impedance by a ‘Z’.
When EN = 0, then Y = ‘Z’ (high impedance)

V 0.4 42
 Using TriState Buffers (cont)
Only A or B is enabled at a time.

S
A

Implements 2/1 Mux function

If S=0 then Y = A
If S=1 then Y = B
V 0.4 43
 Combinational Building Blocks, Mux

V 0.4 44
Copyright 2005. Thomson/Delmar Learning, All rights
reserved.
 Binary Adder
F (A,B,C) = A xor B xor C G = AB + AC + BC

These equations look familiar. These define a Binary Full

Adder :
A B
Sum = A xor B xor Cin

A B
Cout = AB + Cin A + Cin B
Cout Cin = AB + Cin (A + B)
Co Ci
S

Full Adder (FA)

Sum

V 0.4 45
 4 Bit Ripple Carry Adder
A(3) B(3) A(2) B(2) A(1) B(1) A(0) B(0)

Cout C(4) A B
C(3)
A B
C(2)
A B
C(1)
A B
C(0)
Co Ci Co Ci Co Ci Co Ci Cin
S S S S

Sum(3) Sum(2) Sum(1) Sum(0)

A[3:0]
SUM[3:0]
B[3:0]
+

V 0.4 46
 Incrementer
A(3) A(2) A(1) A(0)
EN

xor xor xor xor

Y(3) Y(2) Y(1) Y(0)

If EN = 1 then Y = A + 1
A[3:0] inc Y[3:0]
If EN = 0 then Y = A
EN
V 0.4 47
 Combinational Right Shifter
A combinational block that can either shift right or pass data
unchanged

Copyright 2005. Thomson/Delmar Learning, All rights

reserved.

V 0.4 48
 Understanding the shift operation
MSB LSB
0x85 = 1 0 0 0 0 1 0 1
SI = 0

0x42 = 0 1 0 0 0 0 1 0 1st right shift

SI = 0

0x21 = 0 0 1 0 0 0 0 1 2nd right shift

SI = 0

0x10 = 0 0 0 1 0 0 0 0 3rd right shift

Etc….
V 0.4 49
 Right Shift vs Left Shift
A right shift is MSB to LSB

In: D7 D6 D5 D4 D3 D2 D1 D0
SIN

Out: SIN D7 D6 D5 D4 D3 D2 D1

A left shift is LSB to MSB

In: D7 D6 D5 D4 D3 D2 D1 D0
SI
Out: D6 D5 D4 D3 D2 D1 D0 SI

V 0.4 50
 Recall Basic Memory Definition
KxN

Address[log2(K)-1:0] Data[N-1:0]
M
E
M

K locations, N bits per location

Address bus has log2(K) address lines, data bus has N data
lines.

V 0.4 51
 Memory: Implement Logic or Store Data
F (A,B,C) = A xor B xor C G = AB + AC + BC
8 x 2 Memory
ABC F G A A2 F
00 0 0 0 D1
B A1 G
00 1 1 0 DO
C
01 0 1 0 A0
01 1 0 1
10 0 1 0 LookUp Table (LUT)
10 1 0 1 A[2:0] is 3 bit address
11 0 0 1
11 1 1 1 bus, D[1:0] is 2 bit
output bus.
Recall that Exclusive OR (xor) is
Location 0 has “00”,
AB Y
0 0 0 Location 1 has “10”,
0 1 1
Y = A⊕B Location 2 has “10”,
1 0 1
1 1 0 = A xor B etc….
V 0.4 52
 Clock Signal Review

Pw
rising edge falling edge
voltage
τ - period (in seconds) Pw - pulse width (in seconds)

time
f - frequency pulse width (in Hertz) f = 1/τ

duty cycle - ratio of pulse width to period (in %) duty cycle = Pw /τ

millisecond (ms) Kilohertz (KHz)

-3 3
10 10
microsecond (µs) Megahertz (MHz)
-6 6
10 10
nanosecond (ns) Gigahertz (GHz)
-9 9
10 10
V 0.4 53
Slide by Prof Mitch Thornton
 Storage Element: The D Flip-Flop

D: data input
CK: clock input
S : set input (asynchronous, low true)
R: reset input (asynchronous, lowV 0.4
true) 54
 Synchronous vs Asynchronous Inputs
Synchronous input: Output will change after active clock edge
Asychronous input: Output changes independent of clock

State elements often have async set, reset control.

S
D input is synchronous with respect to Clk
D
Q
C S, R are asynchronous. Q output affected by S, R
R independent of C. Async inputs are dominant over
Clk.

V 0.4 55
 Registers
The most common sequential building block is the register. A
register is N bits wide, and has a load line for loading in a new
value into the register.

Note that DFF simply loads old value when LD = 0. DFF

is loaded every clock cycle.
V 0.4 56
Copyright 2005. Thomson/Delmar Learning, All rights
reserved.
 Counter
Very useful sequential building block. Used to generate memory
addresses, or keep track of the number of times a datapath
operation is performed.

Copyright 2005. Thomson/Delmar Learning, All rights

reserved.

V 0.4 57
 Shift Register
Very useful sequential building block. Used to perform either
parallel to serial data conversion or serial to parallel data
conversion.

Copyright 2005. Thomson/Delmar Learning, All rights

reserved.

V 0.4 58
 What do you need to Know?
• Convert hex, binary integers to Decimal
• Convert decimal integers to hex, binary
• Convert hex to binary, binary to Hex
• N binary digits can represent 2N values, unsigned
integers 0 to 2N-1.
• Addition, subtraction of binary, hex numbers
• Detecting unsigned overflow

V 0.4 59
 What do you need to know? (cont)
• ASCII, UNICODE are binary codes for character
data
• Basic two-input Logic Gate operation
• NMOS/PMOS Transistor Operations
• Inverter/NAND transistor configurations
• Tri-state buffer operation
• Mux, Memory, Adder operation
• Clock signal definition
• DFF, Register, Counter, Shifter register operation

V 0.4 60