DM74LS83A 4-Bit Binary Adder with Fast Carry

August 1986
Revised March 2000

DM74LS83A
4-Bit Binary Adder with Fast Carry
General Description Features
These full adders perform the addition of two 4-bit binary ■ Full-carry look-ahead across the four bits
numbers. The sum (∑) outputs are provided for each bit ■ Systems achieve partial look-ahead performance with
and the resultant carry (C4) is obtained from the fourth bit. the economy of ripple carry
These adders feature full internal look ahead across all four
■ Typical add times
bits. This provides the system designer with partial look-
ahead performance at the economy and reduced package Two 8-bit words 25 ns
count of a ripple-carry implementation. Two 16-bit words 45 ns
The adder logic, including the carry, is implemented in its ■ Typical power dissipation per 4-bit adder 95 mW
true form meaning that the end-around carry can be
accomplished without the need for logic or level inversion.

Ordering Code:
Order Number Package Number Package Description
DM74LS83AN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Connection Diagram

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DM74LS83A
Truth Table

H = HIGH Level, L = LOW Level

Input conditions at A1, B1, A2, B2, and C0 are used to determine outputs ∑1 and ∑2 and the value of the internal carry C2. The values at C2, A3, B3, A4, and
B4 are then used to determine outputs ∑3, ∑4, and C4.

Logic Diagram

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 DM74LS83A
Absolute Maximum Ratings(Note 1)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
Supply Voltage 7V the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Input Voltage 7V Characteristics tables are not guaranteed at the absolute maximum ratings.
Operating Free Air Temperature Range 0°C to +70°C The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Storage Temperature Range −65°C to +150°C

Recommended Operating Conditions

Symbol Parameter Min Nom Max Units
VCC Supply Voltage 4.75 5 5.25 V
VIH HIGH Level Input Voltage 2 V
VIL LOW Level Input Voltage 0.8 V
IOH HIGH Level Output Current −0.4 mA
IOL LOW Level Output Current 8 mA
TA Free Air Operating Temperature 0 70 °C

Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Typ
Symbol Parameter Conditions Min Max Units
(Note 2)
VI Input Clamp Voltage VCC = Min, II = −18 mA −1.5 V
VOH HIGH Level VCC = Min, IOH = Max
2.7 3.4 V
Output Voltage VIL = Max, VIH = Min
VOL LOW Level VCC = Min, IOL = Max
0.35 0.5
Output Voltage VIL = Max, VIH = Min V
IOL = 4 mA, VCC = Min 0.25 0.4
II Input Current @ Max VCC = Max A or B 0.2
mA
Input Voltage VI = 7V C0 0.1
IIH HIGH Level VCC = Max A or B 40
µA
Input Current VI = 2.7V C0 20
IIL LOW Level VCC = Max A or B −0.8
mA
Input Current VI = 0.4V C0 −0.4
IOS Short Circuit Output Current VCC = Max (Note 3) −20 −100 mA
ICC1 Supply Current VCC = Max (Note 4) 19 34 mA
ICC2 Supply Current VCC = Max (Note 5) 22 39 mA
Note 2: All typicals are at VCC = 5V, TA = 25°C.
Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 4: ICC1 is measured with all outputs open, all B inputs LOW and all other inputs at 4.5V, or all inputs at 4.5V.
Note 5: ICC2 is measured with all outputs OPEN and all inputs grounded.

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DM74LS83A
Switching Characteristics
at VCC = 5V and TA = 25°C
From (Input) RL = 2 kΩ
Symbol Parameter To (Output) CL = 15 pF CL = 50 pF Units
Min Max Min Max
tPLH Propagation Delay Time
C0 to ∑1 or ∑2 24 28 ns
LOW-to-HIGH Level Output
tPHL Propagation Delay Time
C0 to ∑1 or ∑2 24 30 ns
HIGH-to-LOW Level Output
tPLH Propagation Delay Time
C0 to ∑3 24 28 ns
LOW-to-HIGH Level Output
tPHL Propagation Delay Time
C0 to ∑3 24 30 ns
HIGH-to-LOW Level Output
tPLH Propagation Delay Time
C0 to ∑4 24 28 ns
LOW-to-HIGH Level Output
tPHL Propagation Delay Time
C0 to ∑4 24 30 ns
HIGH-to-LOW Level Output
tPLH Propagation Delay Time
Ai, Bi to ∑i 24 28 ns
LOW-to-HIGH Level Output
tPHL Propagation Delay Time
Ai, Bi to ∑i 24 30 ns
HIGH-to-LOW Level Output
tPLH Propagation Delay Time
C0 to C4 17 24 ns
LOW-to-HIGH Level Output
tPHL Propagation Delay Time
C0 to C4 17 25 ns
HIGH-to-LOW Level Output
tPLH Propagation Delay Time
Ai, Bi to C4 17 24 ns
LOW-to-HIGH Level Output
tPHL Propagation Delay Time
Ai, Bi to C4 17 26 ns
HIGH-to-LOW Level Output

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 DM74LS83A 4-Bit Binary Adder with Fast Carry
Physical Dimensions inches (millimeters) unless otherwise noted

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Package Number N16E

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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