EC8691 (R-2017) V Sem Cse & It: Microprocessors and Microcontrollers
EC8691 (R-2017) V Sem Cse & It: Microprocessors and Microcontrollers
EC8691
MICROPROCESSORS AND MICROCONTROLLERS
(R-2017)
QUESTION BANK
Prepared By,
Mr. S. Suresh Kumar M.E.,
Asst. Prof / ECE
EC 8691 – Microprocessors and Microcontrollers Department of CSE&IT 2019-2020
Part A/Unit 1
THE 8086 MICROPROCESSOR 9
Introduction to 8086 – Microprocessor architecture – Addressing modes - Instruction set
and assembler directives – Assembly language programming – Modular Programming -
Linking and Relocation - Stacks - Procedures – Macros – Interrupts and interrupt service
routines – Byte and String Manipulation.
1 What are the types of instruction sets of 8086 microprocessor?
There are eight types of instructions. They are
Data copy/Transfer instructions
Arithmetic & Logical instructions
Branch instructions
Loop instructions
Machine control instructions
Flag manipulation instructions
Shift & rotate instructions
String instructions
2 What are flag manipulation instructions?
The instructions that directly modify the flags of 8086 are called as the flag manipulation
instructions. E.g.: CLC --- clear carry flag, CMC --- complement carry flag, STC ---
set carry flag , CLD --- clear direction flag
3 Explain the instructions LODS & STOS.
a)LODS: Load String Byte or String Word
The LODS instruction loads the AL/AX register by the content of a string
pointed to by DS: SI registers pair.
The SI is modified automatically depending on direction flag. If it is a byte
transfer (LODSB), the SI is modified by one & if it is a word transfer
(LODSW), the SI is modified by two.
No other flags are affected by this instruction.
b)STOS: Store String Byte or String Word
The STOS instruction stores the AL/AX register contents to a location in the
string pointed by ES: DI register pair.
The DI is modified accordingly.
No flags are modified by this instruction.
4 Define control transfer instruction & explain their types.
The instructions that transfer the flow of execution of the program to a new address
specified in the instruction directly or indirectly are called the control transfer or branching
instructions.
They are of two types.
Unconditional control transfer instructions: In these types of instructions, the execution
control is transferred to the specified location independent of any status or condition.
Conditional control transfer instructions: In these instructions, The control is transferred to
the specified location provided the result of the previous operation satisfies a particular
condition, otherwise, the execution continues in normal flow sequence.
5 What are assembler directives? Give example.
The assembler is a program used to convert an assembly language program into the
equivalent machine code modules that may be further converted to executable codes.
Therefore the hints given to the assembler to complete all these tasks in some predefined
alphabetical strings is called an assembler directive. E.g.: DB------define byte, END----end of
program, EQU-----equate
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EC 8691 – Microprocessors and Microcontrollers Department of CSE&IT 2019-2020
6 What is the function of parity flag? (Nov 2013)
The parity flag is set, if the result of the byte operation or lower byte of the word operation
contains an even number of ones.
7 Define a MACRO.
A number of instructions appearing again & again in the main program can be assigned as
a macro definition (i.e.) a label is assigned to the repeatedly appearing string of instructions.
The process of assigning a label or macro name to the string is called defining a macro. A
macro within a macro is called a nested macro.
8 Which interrupt has got the highest priority among all the external interrupts?
The Non-Maskable Interrupt pin of 8086 has got the highest priority among the external
Interrupts.
9 What are the segments registers present in 8086?
There are four segment registers in 8086.They are
i. Code Segment register (CS)
ii. Data Segment register (DS)
iii. Extra Segment register (ES)
iv. Stack Segment register (SS)
10 What do you mean by instruction pipelining?
While the execution unit executes the previously decoded instruction, the Bus Interface
Unit fetches the next instruction and places it in the pre fetched instruction byte queue. This
forms a pipeline.
11 What is the use of the Trap flag in the flag register of 8086?
When the Trap flag is set, the processor enters the single step execution mode. A trap
interrupt is generated after execution of each instruction. The processor executes the current
instruction and the control is transferred to the Trap interrupt service routine.
12 List the instruction formats in 8086 instruction set.
There are six general formats of instruction in 8086.They are
One byte instruction.
Register to Register.
Register to/from Memory with no Displacement.
Register to/from memory with Displacement.
Immediate operand to Register.
Immediate operand to Memory with 16-bit Displacement.
13 What are the addressing modes of sequence control transfer instructions in 8086? Give
example.(Apr/May 2018)
Immediate eg: Mov AX,0005H.
Direct eg:Mov AX,[5000H].
Register eg:Mov BX,AX.
Register Indirect eg:Mov AX,[Bx].
Indexed eg:Mov AX,[SI].
Register Relative eg:Mov AX,50H[BX].
Based Indexed eg:Mov AX,[Bx] [SI].
Relative Based Indexed eg: Mov AX,50H [BX] [SI].
14 Give the operation of CBW and TEST instructions of 8086? (Nov 2013)
CBW instruction converts the byte in AL to word value in AX by extending the sign of
AL throughout the register AH. TEST instruction performs logical AND operation of the
two operands updating the flag registers without saving the result
15 What do you mean by addressing modes? (May 2014)
The addressing modes clearly specify the location of the operand and also how its location
may be determined.
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EC 8691 – Microprocessors and Microcontrollers Department of CSE&IT 2019-2020
16 How is the physical address generated in 8086? (or) How 16 bit address is converted into
20 bit address in 8086? (Nov 2013) (Apr/May 2017)
The content of the segment register called as segment address is shifted Left bit-wise four
times and to this result, content of an offset register also called as offset address is added, to
produce a 20-bit physical address.
eg: segment address 1005H
Offset address 5555H
Segment address 0001 0000 0000 0101
Shifted by 4 bit positions 0001 0000 0000 0101 0000
+
Offset address 0101 0101 0101 0101
Physical address 0001 0101 0101 1010 0101
1 5 5 A 5
17 What are intersegment and intra segment modes of addressing?
For control transfer instructions, if the location to which the control is transferred lies in a
different segment other than the current one, the mode is called intersegment mode.
If the destination location lies in the same segment, the mode is called intra segment mode.
18 Explain XLAT instruction.
The XLAT (Translate) instruction replaces a byte in the AL register with a byte
from a 256-byte, user coded translation table.
XLAT is useful for translating characters from one code to another like ASCII to
EBCDIC and ASCII to HEX etc.
19 Draw the PSW format for 8086.(May/June 2016)
B1 B1 B1 B1 B1 B1 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
5 4 3 2 1 0
U U U U OF DF IF TF SF ZF U AF U PF U CF
U: Undefined; CF : Carry flag - Set by carry out of MSB
PF: Parity flag- set if result has even parity; AF : Auxiliary carry flag - used for BCD
operation; ZF: Zero flag - set if result = 0; SF : Sign flag - set if result is –ve.
TF : Trap flag - set to enable single step execution mode. IF: Interrupt flag- set to enable
interrupt ;DF : Direction flag - set to enable auto decrement mode for string operation ;OF:
Overflow flag - used for signed arithmetic operation
20 Explain the function of TEST pin in 8086
This input is examined by a “WAIT” instruction. When the processor executes WAIT
instruction, it enters into wait state (Idle state). If the TEST pin goes low, the processor will
come out from the idle state and continues the execution; otherwise it remains in an idle
state.
21 What is meant by a vectored interrupt? (May 2014)
There is an interrupt vector table which stores the information regarding the location of
interrupt service routine (ISR) of various interrupt. Whenever an interrupt occurs the
memory location of ISR is determined using the vector table and the program control
branches to ISR after saving the flags and the program location.
22 What are control transfer instructions?
These instructions transfer control to some predefined address specified in the instruction
after their execution. Eg: CALL, INT, RET & JUMP instructions.
23 Define a MACRO. (Nov/Dec 2017)
A number of instructions appearing again & again in the main program can be assigned as
a macro definition (i.e.) a label is assigned to the repeatedly appearing string of instructions.
The process of assigning a label or macro name to the string is called defining a macro. A
macro within a macro is called a nested macro.
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EC 8691 – Microprocessors and Microcontrollers Department of CSE&IT 2019-2020
24 What are the advantages of the segmented memory scheme in 8086?
The following are the advantages of the segmented memory scheme
Allows the memory capacity to be 1 Mbytes although the actual addresses to
be handled are of 16-bit size.
Allows the placing of code, data and stack portions of the same program in
different parts of memory, for data and code protection.
25 Write about the different types of interrupts supported in 8086. . (May 2015)
Interrupts in 8086 are classified into three. They are:
Pre defined interrupt
Type 0 to Type 4 interrupts.
Hardware interrupt
Mask able interrupt and Non Mask able interrupt
Software interrupt(INT n)
256 types of software interrupt.
26 Define Stack. (May/June 2016) (Apr/May 2018)
A stack pointer is a small register that stores the address of the last program request in
a stack. A stack is a specialized buffer which stores data from the top down. As new
requests come in, they "push down" the older ones.
27 List the modes of operation of 8086.(Nov/Dec 2017)
Maximum mode and minimum mode.
28 What is the need for interrupts in microprocessor operation?(Nov/Dec 2018)
Interrupts are signals sent to the CPU by external devices, normally I/O devices. They tell
the CPU to stop its current activities and execute the appropriate part of the operating
system. Hardware Interrupts are generated by hardware devices to signal that
they need some attention from the OS.
29 What are Byte and String Manipulations? (Nov/Dec 2018)
String is a series of data byte or word available in memory at consecutive locations. It is
either referred as byte string or word string. Their memory is always allocated in a
sequential order. Instructions used to manipulate strings are called string
manipulation instructions. The string instructions of the 8086 permit a programmer to
implement operations such as to move data from one block of memory to a block elsewhere
in memory. A second type of operation that is easily performed is to scan a string and data
elements stored in memory looking for a specific value.
PART B/ UNIT I
1 Discuss in detail the three types of interrupt system of Intel 8086/ Describe the interrupts of
8086 and its types with service routine (May 2014) (Apr/May 2018)(Nov/Dec 2017)
2 Explain the memory concepts of Intel 8086 and explain how data transfer takes place.
3 Describe the addressing modes 8086 with examples from instruction set of 8086.
(Apr/May 2016)(Nov/Dec 2018)
4 Write an 8086 ALP to find the sum of numbers in an array of 10 elements.(7)
(Apr/May 2016)
5 Write an 8086 ALP to logically shift a 16 bit number stored in location starting at 8000H
twice to the right. Store the result in A000 H.
6 Explain the different instruction used for input and output operation in I/O mapped I/O
mode of 8086.
7 Discuss in detail the hardware and software feature of 8086 interrupt structure.
(Apr/May 2016)
8 i) Write an 8086 ALP to sort out any given ten numbers in ascending and descending order.
(Nov 2013)
ii) Give the functions of NMI, BHE and TEST pins of 8086. (4) (Nov 2013)
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EC 8691 – Microprocessors and Microcontrollers Department of CSE&IT 2019-2020
9 What is meant by memory segmentation? What are the advantages of memory
segmentation?
10 i)Explain briefly about internal hardware architecture of 8086 microprocessor with a neat
diagram.(10) (Nov/Dec 2017) (Apr/May 2018)
ii) Write a 8086 assembly language program to convert BCD data - Binary data.(6) (May
2015) (Apr/May 2017)
11 i) Explain about ASSUME, EQU, DD assembler directives.(8)
ii) Explain briefly about interrupt handling process in 8086.(8) (May 2015)
12 For 8086 Microprocessor what are the instruction set and assembler directives?(Nov/Dec
2018)
Part A/Unit II
8086 SYSTEM BUS STRUCTURE 9
8086 signals – Basic configurations – System bus timing –System design using 8086 – I/O
programming – Introduction to Multiprogramming – System Bus Structure -
Multiprocessor configurations – Coprocessor, Closely coupled and loosely Coupled
configurations – Introduction to advanced processors.
1 What is meant by multiprocessor system?
If a microprocessor system contains two or more components that can execute instructions
independently then the system is called as multiprocessor system.
2 What is meant by multiprogramming? (Apr/May 2017)( Apr/May 2018)
Multitasking has the same meaning of multiprogramming but in a more general sense, as it
refers to having multiple (programs, processes, tasks, threads) running at the same time.
This term is used in modern operating systems when multiple tasks share a common
processing resource (e.g., CPU and Memory). Multiprogramming is a rudimentary form of
parallel processing in which several programs are run at the same time on a uniprocessor.
Since there is only one processor, there can be no true simultaneous execution of different
programs.
3 What is closely coupled configuration?
If the processor supporting processor, clock generator, bus control logic, memory and I/O
System, communicate shared memory then it is called closely coupled system.
4 What the advantages are of loosely coupled?
Better system throughput by having more than one processor.
A greater degree of parallel processing can be achieved.
System structure is more flexible.
A failure in one module does not cause any breakdown of the system.
5 What is meant by cross bar switch?
If the number of buses in a common bus system is increased, a point is reached at which
there is a separate path available for each memory module. This interconnection is called as
crossbar switch.
6 Mention some network topologies?
The bus.
The star.
The star wires ring (Token Ring)
7 Compare closely coupled and loosely coupled configurations. (Apr/May 2016)
It perform better and size is small when Less expensive
compared
More expensive Here single standalone processor is used
connected via interconnected network
It contains multiple CPUs Data rate is low.
Data rate is high Data rate is low.
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EC 8691 – Microprocessors and Microcontrollers Department of CSE&IT 2019-2020
7 What is meant by memory contention & hot spot contention?
A memory module can handle only one access request at a time. Hence when several
processors request the same memory module it gives rise to memory contention.
When several processors repeatedly across the same memory location, it gives rise to
hot spot contention.
8 Name some techniques for reducing contentions
Local memories.
Better interconnection network.
Cache memory.
Memory Allocation.
9 What is meant by bus arbitration?
The mechanism which decides the selection of current master to access bus is known as bus
arbitration.
10 What are the advantages of Daisy Chaining?
It is simple and cheaper method
It requires the least number of lines and this number is independent of the number of
masters in the system.
11 What is meant by bus arbitration?
The mechanism which decides the selection of current master to access bus ia called bus
arbitration.
12 What is meant by Numeric processor?
The numeric processor 8087 is a coprocessor which has been specially designed to work
under the control of the processor 8086 and to support additional numeric processing
capabilities.
13 On which data types can memory operands operate?
1. Word integer, 2.Short integer, 3.Long integer, 4.Packed BCD, 5.Short real, 6Long Real
7. Temporary real
14 What is the use of TC STOP Mode?
If the TC Stop bit is set the channel is disabled after the TC output goes high, thus
automatically preventing further DMA Operation on that channel.
15 What are advantages of coprocessor? (May 2014)
The co-processors & supplementary processors which can fetch operands & execute it. It
can read CPU status & queue status, make bus and interrupt request, receive reset & ready
signals, receive bus grants, maintain an instruction queue decode the external op code.
16 What is co-processor? (Nov 2013)
The 8086/8088 must be supplemented with co-processors that extend the instruction set to
allow the necessary special computations to be accomplished more efficiently. Eg: 8087
Numeric Data Processor.
17 What is a Floating point Coprocessor? (Nov 2013)
The floating point coprocessor uses real data types or floating point types of the following
format: Real data X=±2exp×mantissa, which may vary from extremely small to extremely
large values.
18 What is meant by loosely coupled configuration? (May 2014) (Apr/May 2016)
In a loosely coupled multiprocessor system each CPU has its own bus control logic and bus
arbitration is resolved by extending this logic and adding external logic that is common to
all the modules.
19 Write some example for advanced processor. (Apr/May 2017)(Nov/Dec 2017)
ARM Processor
AMD Processor
SHARC processor.
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EC 8691 – Microprocessors and Microcontrollers Department of CSE&IT 2019-2020
20 Differentiate external vs. internal bus. (Apr/May 2016)
The internal data bus is the one responsible for transferring the data between the data
registers and each other or between the data registers and the CPU. The external data bus
transfers the data between the internal registers and the external memory or directly to the
output.
21 Define Bus. Why Bus request and cycle stealing are required? (May 2015)
Bus is a group of parallel conductors which carries data, address and control signals from
one unit to another unit. Bus request and Cycle stealing are required to access the RAM
without interfering with the CPU. It is similar to DMA for allowing I/O controllers to read
or write RAM without CPU intervention.
22 Define system bus.(Nov/Dec 2018)
The system bus is a pathway composed of cables and connectors used to carry data between
a computer microprocessor and the main memory. The busprovides a communication path
for the data and control signals moving between the major components of the
computer system.
23 Draw the read cycle timing diagram for minimum mode. (May 2015)
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EC 8691 – Microprocessors and Microcontrollers Department of CSE&IT 2019-2020
22 What is bus stealing? (Nov/Dec 2013)
During DMA data transfer, the I/O component connected to the system bus is given control
of the system bus for a bus cycle. This is called bus stealing or cycle stealing.
23 What are the advantages of Programmable Interval Timer/Counter IC? (May/Jun 2014)
Interrupt a time sharing operating system at evenly spaced intervals.
Output precisely timed signals with programmed period to an I/O device.
Count the number of times an event occurs in an external experiment.
Cause the processor to be interrupted after a programmable number of external
events have occurred.
24 Give the Various modes and Applications of 8254. (May/Jun 2015)(Apr/May 2018)
MODE 0 : Interrupt on terminal Count ( can be used as Interrupt).
MODE 1 : Hardware re trigger able One shot (For generating One shot Pulse)
MODE 2 : Rate Generator ( The mode is used to generate a pulse equal to
given clock period at a given interval.)
MODE 3: Square wave generator ( For generating continuous square wave)
MODE 4: Software triggered strobe ( To trigger after a specific count)
MODE 5: Hardware triggered strobe ( To Trigger by a hardware event)
25 Draw the format of read back command register of 8254. (Apr/May 2017)
This register is accessed when lines A0 & A1 are at logic 1. It is used to write a command
word, which specifies the counter to be used, its mode, and either a read or write operation.
Following table shows the result for various control inputs.
A1 A0 RD WR CS Result
0 0 1 0 0 Write Counter 0
0 1 1 0 0 Write Counter 1
1 0 1 0 0 Write Counter 2
1 1 1 0 0 Write Control Word
0 0 0 1 0 Read Counter 0
0 1 0 1 0 Read Counter 1
1 0 0 1 0 Read Counter 2
1 1 0 1 0 No operation
X X 1 1 0 No operation
X X X X 1 No operation
26 What is meant by Direct Memory Access?
Direct Memory Access (DMA) is a capability provided by some computer bus architectures
that allows data to be sent directly from an attached device (such as a disk drive) to the
memory on the allows data to be sent directly from an attached device (such as a disk drive)
to the memory on the computer's motherboard. The microprocessor is freed from
involvement with the data transfer, thus speeding up the overall computer.
27 What is meant by control register?
A control register is a processor register which changes or controls the general behavior of
a CPU or other digital device. Common tasks performed by control registers include
interrupt control, switching the addressing mode, paging control, and coprocessor control.
28 What are the differences between LED display and LCD display?(Nov/Dec 2018)
LED LED
PN-Junction device which discharge visible PN-Junction device which discharge visible
lights when an electrical charge passes lights when an electrical charge passes
through it. through it.
No backlight No backlight
High Resolution High Resolution
Small display area Small display area
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EC 8691 – Microprocessors and Microcontrollers Department of CSE&IT 2019-2020
29 Write a 16 bit delay program in 8086 (Apr/May 2018)
LOOP1: MOV DI, 01ADH
LOOP: MOV BP, FFFFH
NOP
NOP
NOP
DEC BP
JNZ LOOP1
DEC DI
JNZ LOOP
30 What are the handshake signals used in Mode – 2 configuration of 8255? (Nov/Dec 2017)
Only port A can be initialized in this mode. Port A can be used for bidirectional
handshake data transfer. This means that data can be input or output on the same eight
lines (PA0 - PA7). Pins PC3 - PC7 are used as handshake lines for port A. The remaining
pins of port C (PC0 - PC2) can be used as input/output lines if group B is initialized in
mode 0 or as handshaking for port B if group B is initialized in mode 1. In this mode, the
8255 may be used to extend the system bus to a slave microprocessor or to transfer data
bytes to and from a floppy disk controller. Acknowledgement and handshaking signals are
provided to maintain proper data flow and synchronization between the data transmitter
and receiver.
31 How DMA operation is performed with 8086. (Nov/Dec 2017)
The 8086 microprocessor receives bus requests through its HOLD pin and issues grants
from the hold acknowledge (HLDA) pin. A request is made when a potential master sends a
1 to the HOLD pin. Normally, after the current bus cycle is complete the 8086 will respond
by putting a 1 on the HLDA pin. When the requesting device receives this grant signal it
becomes the master. It will remain master until it drops the signal to the HOLD pin, at
which time the 8086 will drop the grant on the HLDA pin.
32 Why is memory interfacing required?(Nov/Dec 2018)
While executing an instruction, there is a necessity for the microprocessor to
access memory frequently for reading various instruction codes and data stored in
the memory. The interfacing circuit aids in accessing the memory. Memory requires some
signals to read from and write to registers.
Part B/Unit III
1 With a block diagram of internal structure of 8255 PPI and explain the functions of each
block Illustrate the 8255 mode 1 output and input port timings. (Apr/May 2017)
2 With a neat block diagram explain the function of each block of a programmable
interrupt controller. (Nov/Dec 2018)
3 Draw the block diagram of DMA controller IC and explain the function of each block.
(May 2015) & (May 2014) (Apr/May 2016) (Apr/May 2017)(Nov/Dec 2018)
4 With a block schematic explain how a (4x4) matrix hex keyboard can be interfaced to a CPU
using 8279 keyboard display controller? (Nov 2013)(Nov/Dec 2017)(Apr/May 2018)
5 Interface a D/A converter and A/D convertor with a microprocessor. Explain with a
Program, how to generate a sine wave using this. (May 2015)(Nov/Dec 2018)
6 Describe with MODE 0 and MODE 3 configurations of 8254 timer in detail.(8)
(ii) Draw and explain the operation of a sample and hold circuit. (4)
(iii) Show the control word format of 8255 and explain how each bit is
programmed.(4)
7 (i) Explain the mode 0 operation of 8255 Programmable Peripheral interface. (8) (May
2014)
(ii) Explain the different modes of operation of timer. (8)
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8 (i) Bring about the features of 8251. (6) (Nov 2013)
(ii) Discuss how 8251 is used for serial data communication. (6)
(iii) Explain the advantages of using the USART chips in microprocessor based
systems. (4)
9 Draw and explain the block diagram of alarm controller. (Apr/May 2016)(Apr/May
2018)
10 Explain design of Traffic Light Controller using 8086 microprocessor in detail. Write the
algorithm and ALP for traffic light control system. (May 2015)(Apr/May 2018)
11 Draw and explain the functional diagram of 8251.(Nov/Dec 2017)(Apr/May 2018)
Part A/Unit IV
MICROCONTROLLER 9
Architecture of 8051 – Special Function Registers(SFRs) - I/O Pins Ports and Circuits -
Instruction set - Addressing modes - Assembly language programming.
1 Discuss the salient features of 8051 family of controllers?
Eight-bit CPU with registers A (the accumulator) and B.
Sixteen-bit program counter (PC)
Data pointer (DPTR).
Eight-bit program status word (PSW)
Eight-bit stack pointer (SP).
Internal ROM or EPROM (4 KB)
Internal RAM (128 bytes)
Four register banks (each 8 registers)
16 bytes, which may be addressed at bit level
Eighty bits of general purpose data memory
Two 16-bit timer / counters: T0 & T1
Full duplex serial data receivers / transmitter (SBUF)
Control registers: TCON, TMOD, SCON, PCON, IP and IE.
2 What is the size of RAM in 8051?
The size of the RAM is 128 bytes
1. Four register banks (each 8 registers)
2. 16 bytes, which may be addressed at bit level
3. Eighty bits of general purpose data memory
3 How many ports are available in 8051 micro controller?
There are mainly four ports available in this 8051 micro controller. They are
Port0: serve as inputs, outputs, or, when used together, as a bi-directional low
order address and as data bus for external memory.
Port1: has got no dual functions.
Port2: may be used as an input / output port similar in operation to port 1. The
alternate use of port2 is to supply a high-order address byte in conjunction with the
Port0 low-order byte to address external memory.
Port3: is an input / output pin similar to the Port 1. In this case each and every pin
has an additional function.
4 How to select the register bank of Intel 8051. (May 2015)
RS0 and RS1 are the D3 and D4 bits present in the 8-bit register of the PSW
0 0 BANK 0 is selected from Internal ROM
0 1 BANK 1 is selected from Internal ROM
1 0 BANK 2 is selected from Internal ROM
1 1 BANK 3 is selected from Internal ROM
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5 What is meant by microcontroller?
A device which contains the microprocessor with integrated peripherals like memory, serial
ports, parallel ports, timer/counter, interrupt controller, data acquisition interfaces like
ADC, DAC on single chip is called microcontroller.
6 List the flags of 8051 and give their usage.
Status flags: These flags are modified according to the result of arithmetic and logical
operations. 1. Carry flag, 2. Auxiliary carry flag, 3. Overflow flag, 4. Parity flag and
General purpose user flags: These flags can be set or cleared by the programmer as desired
1. Flag 0, 2. GF0, 3. GF1
7 What is the difference between microprocessor and microcontroller? (May 2014)(Nov/Dec
2018)
It has only CPU It has CPU, memory, timers, parallel and
serial I/O port on single chip
It has few bit manipulating instructions It has large number of bit manipulating
instructions
It has more number of instructions for It has only few instructions for transferring
transferring data from external memory. data from external memory.
No special function registers are available Special functions registers are available
8 Draw the PSW of 8051. (May 2015)
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EC 8691 – Microprocessors and Microcontrollers Department of CSE&IT 2019-2020
26 Write a program to perform multiplication of 2 numbers using 8051?
MOV A, #data1
MOV B, #data2
MUL AB
MOV DPTR, # 4500H
MOVX @ DPTR, A
INC DPTR
MOV A,B
MOVX @ DPTR, A
STOP : SJMP STOP
27 Write a program to perform 2’s complement of a given number using 8051?
MOV DPTR, # 4500H
MOVX A, @ DPTR
CPL A
ADD A,#01H
INC DPTR
STOP : SJMP STOP
28 Which port used as multifunction port? List the signals. (Apr/May 2017)
Port 3 has multifunction port. Each pin of port 3 has i/o or as of one of the alternate
function.
Signals are:
P3.0– RXD
P3.1– TXD
P3.4– T0
P3.5- T1
29 Illustrate the CJNE instruction (Apr/May 2017)
CJNE- Compare and jump if not equal. This instruction compares the magnitudes of the
source byte and the destination byte.
30 Illustrate the DJNZ instruction? (Nov/Dec 2017)
The DJNZ instruction decrements the byte indicated by the first operand and, if the
resulting value is not zero, branches to the address specified in the second operand. Eg:
DJNZ Rn, offset.
31 Draw the pin diagram of 8051.(Apr/May 2018)
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2 What is the relation between RPM and steps per second in stepper motor interfacing?
Steps per second= (rpm × steps per revolution)/60
3 Write short notes on interrupts in 8051?
Interrupts may be generated by internal chip operations or provided by external interrupts
sources. Five interrupts are provided in 8051. Three of these interrupts are generated
automatically by internal operations: Timer flag 0, Timer flag 1, and the serial port
interrupts (RI or TI). Two interrupts are triggered by external signals provided by the
circuitry that is connected to the pins INT0 and INT1 (port pins P3.2 and P3.3).
4 What is the purpose of Interrupt priority (IP) Control register in 8051?
Register IP bits determine if any interrupt is to have a high or low priority. Bits set to 1 give
the accompanying interrupt a high priority; a 0 assigns a low priority. If two interrupts with
the same priority occur at the same time, then they have the following ranking:
1.IE0, 2.TF0, 3.IE1, 4.TF1,5.Serial = RI or TI.
5 What is the purpose of counters in 8051 micro controller?
The counters have been included on the chip to relieve the processor of timing and control
chores. When the program wishes to count a certain number of internal pulses or external
events, a number is placed in one of the counters. The number represents the
following:(Maximum count)-(Desired count) + 1. The counter increments from the initial
number to the maximum and then rolls over to zero on the final pulse.
6 What is the basic difference between a timer and a counter? (May 2015)
The only difference between a timer and a counter is the source of clock pulses to the
counters. When used as a timer, the clock pulses are sourced from the oscillator through the
divide-by-12d circuit. When used as a counter, pin T0 (P3.4) supplies pulses to counter 0,
and pin T1(P3.5) to counter 1.
7 Explain the operating mode 0 of 8051 serial port?
Mode 0 of 8051 serial port is shift register mode.
Serial data enters and exits through RXD pin.
Pin TXD is connected to the internal shift frequency pulse source.
8-bits are transmitted and received.
The baud rate is fixed at 1/12 of the crystal frequency.
8 Define watch dog timer.
Watch dog timer is a dedicated timer to take care of system malfunction. It can be
used to reset the controller during software malfunction, which is referred to as
“Hanging”. A watchdog timer contains a timer that expires after a certain interval
unless it is restarted.
It resets the microcontroller and starts the software over from the beginning if the
software does not restart it periodically.
9 What is the function of the TMOD register?
TMOD (Timer mode) register is used to set the various timer operation modes. TMOD is
dedicated solely to the two timers (T0 & T1) and can be considered to be two duplicate 4-bit
registers, each of which controls the action of the timers.
10 List out the advantages of LCD over LED.
Declining prices of LED,
Ability to display numbers, characters and graphics
Incorporating a refreshing controller.
Ease of programming for characters and graphics.
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EC 8691 – Microprocessors and Microcontrollers Department of CSE&IT 2019-2020
11 What is the significance of BUSY flag in LCD interfacing?
When D7 pin=1 and RS pin=0 the BUSY flag is set which means that LCD is busy taking
care of internal operations and will not accept any new information. Therefore we have to
check BUSY flag before writing data to LCD.
12 How a pressed key is detected in keyboard interfacing?
The keyboards are organized in a matrix of rows and columns. The microcontroller
grounds all rows by providing zero to the output latch then reads the columns.
13 What is the significance of WR and INTR pin in ADC chip?
WR is an active low input and when it undergoes low to high transition the Start of
conversion signal is given. INTR is an active low output pin. It is normally high when the A
to D conversion is finished. It goes low to signal EOC.
14 Write an ALP to generate a saw tooth waveform.
MOV A.#00H
MOV P1,A
BACK: INC A
SJMP BACK
15 What is the significance of PSEN in memory interfacing?
PSEN (Program Store Enable) is an output signal for the 8051 microcontroller, which is
connected to the OE pin of external ROM containing the program code. This is used when
external ROM has to be accessed.
16 What is SBUF?
SBUF stands for SERIAL BUFFER. SBUF is physically two registers. One is write only and is
used to hold the data to be transmitted out of the 8051 via TXD. The other one is read only
and holds the received data from external sources via RXD.
17 What are the serial communication modes available in 8051?
Mode 0, Mode 1, Mode 2, Mode 3 is the serial communication modes available in 8051.
18 What are the contents of SCON register? (May 2015)
SM0 - Serial port mode bit 0, SM1 - Serial port mode bit 1, SM2 - Serial port mode 2 bit
multiprocessor communication enable bit; REN - Reception Enable bit.
TB8 - Transmitter bit 8. RB8 - Receiver bit 8 or the 9th bit received in modes 2 and 3, TI -
Transmit Interrupt flag & RI - Receive Interrupt flag.
7 6 5 4 3 2 1 0
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EC 8691 – Microprocessors and Microcontrollers Department of CSE&IT 2019-2020
22 Define Baud rate of 8051. (Apr/May 2016)
In serial communication the data is rate known as the baud rate, which simply means the
number of bits transmitted per second. In the serial port modes that allow variable baud
rates, this baud rate is set by timer 1. The 8051 serial port is full duplex.
23 Write a program to generate a 10 KHz square wave using 8051?
MOV TMOD,#00000001B
MAIN: SETB P1.0
ACALL DELAY
CLR P1.0
ACALL DELAY
SJMP MAIN
DELAY: MOV TH0,#0FFH
MOV TL0,#0CEH
SETB TR0
HERE:JNB TF0,HERE
CLR TR0
CLR TF0
SETB P1.0
RET
END
24 What is the function of IE register in 8051?
The Interrupt Enable SFR is used to enable and disable specific interrupts. The low 7 bits of
the SFR are used to enable/disable the specific interrupts, where as the highest bit is used to
enable or disable ALL interrupts. Thus, if the high bit of IE is 0 all interrupts are disabled
regardless of whether an individual interrupt is enabled by setting a lower bit.
25 Compare polling and interrupt. (Apr/May 2016)
Interrupt is a signal to the microprocessor from a device that requires attention. The
microprocessor will respond by setting aside execution of its current task and deal with the
interrupting device. When the interrupting device has been dealt with, the microprocessor
continues with its original task as if it had never been interrupted.
In Polling the processor continuously polls or tests every device in turn as to whether it
requires attention (e.g. has data to be transferred). The polling is carried out by a polling
program that shares processing time with the currently running task.
26 Write a program to generate a 1ms delay using 8051?
DELAY: MOV TMOD,#00000001B
MOV TH0,#0FCH
MOV TL0,#018H
SETB TR0
HERE: JNB TF0,HERE
CLR TR0
CLR TF0
RET
27 List the 8051 interrupts with its priority (Apr/May 2018)(Nov/Dec 2017)
Types of Interrupts in 8051 Microcontroller
The 8051 microcontroller can recognize five different events that cause the main program to
interrupt from the normal execution. These five sources of interrupts in 8051are:
1. Timer 0 overflow interrupt- TF0
2. Timer 1 overflow interrupt- TF1
3. External hardware interrupt- INT0
4. External hardware interrupt- INT1
5. Serial communication interrupt- RI/TI
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EC 8691 – Microprocessors and Microcontrollers Department of CSE&IT 2019-2020
28 What are the applications of stepper motor?
Industrial Machines – Stepper motors are used in automotive gauges and machine tooling
automated production equipment’s. Security – new surveillance products for the security industry.
Medical – Stepper motors are used inside medical scanners, samplers, and also found inside digital
dental photography, fluid pumps, respirators and blood analysis machinery. Consumer
Electronics Stepper motors in cameras for digital camera focus and zooming
29 Give two examples of sensors and its uses.(Nov/Dec 2017)
The different types of sensors that can be interfaced with microprocessors are Temperature
Sensors, IR Sensors, Ultrasonic Sensors, Touch Sensors, Proximity Sensors, Pressure
Sensors, Level Sensors, Smoke and Gas Sensors etc.
30 How to program 8051 Timers?(Nov/Dec 2018)
The programming of 8051 Timers can be done by using either polling method or by using
interrupt. In polling, the microcontroller keeps monitoring the status of Timer flag. While
doing so, it does no other operation and consumes all its processing time in checking the
Timer flag until it is raised on a rollover. In interrupt method controller responds to only
when the Timer flag is raised. The interrupt method prevents the wastage of controller’s
processing time unlike polling method.
Polling is mostly used for time delay generation and interrupt method is more useful when
waveforms are to be generated or some action has to be repeated in fixed delays.
31 What are the types of ADC?(Nov/Dec 2018)
The different types of ADCs available in different speeds, interfaces and accuracy, namely a
Flash type ADC, Counter type ADC, sigma-delta ADC and successive approximation ADC.
PART-B/Unit V
1 Draw the block diagram of Intel 8051 timer/counter and explain its different modes of
operations. (May 2015)(Apr/May 2018)
2 What are the different timer mode operations of 8051? Explain them in detail.
3 Explain how to interface ADC and DAC with 8051 in detail with neat diagram.(Nov/Dec
2017)
4 Compare PIC microcontroller and ARM processor.
5 Explain how to interface external memory devices with 8051.(Nov/Dec 2018)
6 With necessary hardware & software details explain how to interface LCD’S with 8051
(May 2015)
7 Explain the different modes of operation of serial port in 8051, indicating various registers
associated with it./ Illustrate the serial communication of 8051, SCON (Apr/May
2016)(Nov/Dec 2017)(Nov/Dec 2018)
8 (i)How do you interface 8051 microcontroller with keyboard? Explain in detail.
(ii) How do you interface 8051 microcontroller with ADC? Explain in detail. (Dec 2013)
9 (i) Vin=2.25V, Vref=5V, NO. of data lines are 5. Convert the given analog quantity to its
equivalent digital output quantity. (May 2014)
(ii) Explain the different techniques to convert digital quantity to its equivalent analog
quantity.
10 Explain in detail the procedure to interface stepper motor with 8051 and write an ALP to
run the stepper motor in both forward and reverse direction with delay. (May
2015)(Apr/May 2018).
11 Write a program for generation of unipolar square waveform of 1KHZ frequency using Timer 0 of
8051 in mode 0. Consider the system frequency as 12 MHZ. (Apr/May 2017)(Nov/Dec 2017)
12 How Microprocessor and Microcontrollers are different from computer based controllers?(Nov/Dec
2018)
13 How Microprocessor and Microcontrollers can help to Control a Process or a Machine
tool?(Nov/Dec 2018)
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