MCS9865 Gpio An

MCS9865
GPIO Application Note
1. Introduction
This application note describes details of MCS9865 GPIO lines & how to access / use same for
system control. Up to four General Purpose I/O (GPIO) pins are present in MCS9865.
2. Description of Registers content
On 'Power on reset' all GPIO lines will work in input mode
GPIO control registers: [offset 11’hxxx] *
GPIO control registers

Offset(Hex)Register Bit Access Description
11’h3C0 PIN [3:0] R/W When DIR bit (s) is one, then corresponding bit
of PIN[4:1] will be read for input state.
When DIR bit is zero, Data need to be sent out
on the GPIO lines should be programmed in
the “PIN” register.
11’h3C4 DIR [3:0] R/W Pin [4:1] direction (0 – output, 1 – input)
Default all pins are in input mode.
*Note: “11” indicated number of bits used for addressing the offset register. To indicate
hexadecimal value “h” is used followed by address value.
3. GPIO Mode of Operation
GPIO lines of MCS9865 support Polling mode of operation.

Polling Mode
GPIO lines in output mode

a) When any of the GPIO lines need to be set in output direction, then particular bit in the
“DIR” register should be programmed as zero.
b) Data need to be sent out on the GPIO lines should be programmed in the “PIN” register.
Ver0.2 Preliminary 14th May2008 Page 1

MCS9865
GPIO lines in input mode

a) When any of the GPIO lines need to be set in input direction, then particular bit in “DIR”
register should be programmed as one.
b) Data on the GPIO lines can be read from the “PIN” register.
4. Example to Accessing GPIO Registers

GPIO control Registers as shown in table-1 is located at an offset from Base Address Register-4
(BAR-4) as shown in figure-1. BAR-4 Address can be from any one of the enumerated Serial
COM port.
For Example:
“PIN” register of GPIO Control register is located at 0x3C0
Base Address-4 is allocated by the system with address 0xE1007000 as shown in Figure-1. Same
can be seen in Figure-2 (second BAR).
To the BAR-4 address location add 0x3C0 to access “PIN” Register of GPIO.
“PIN” register Address = 0xE10073C0.
Figure-1

MCS9865
Figure-2 shows the BAR-4 starting address i.e. 0xE100700 in the MCS9865 Serial port Property
sheet.
Figure-2

MCS9865
5. Contact information
Contact [email protected] for commercial details
Write to [email protected] for technical queries
6. Revision history
Date Reason for change Version

th
14 April 2008 Initial draft 0.1
14th May 2008 Updated per internal review feedback 0.2

MCS9865
IMPORTANT NOTICE
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devices or systems. Life support devices are applications that may involve potential risks of death, personal injury or
severe property or environmental damages. These critical components are semiconductor products whose failure to
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the customer apply sufficient safeguards and guard bands in both the design and operating parameters. MosChip
Semiconductor Technology LTD assumes No liability for customer’s applications assistance or for any customer’s
product design(s) that use MosChip Semiconductor Technology, LTD’s products.
MosChip Semiconductor Technology, LTD warrants the performance of its products to the current Specifications in
effect at the time of sale per MosChip Semiconductor Technology, LTD standard limited warranty. MosChip
Semiconductor Technology, LTD imposes testing and quality control processes that it deems necessary to support
this warranty. The customer should be aware that not all parameters are 100% tested for each device. Sufficient
testing is done to ensure product reliability in accordance with MosChip Semiconductor Technology LTD’s
warranty.
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information contained herein is subject to change without notice and no responsibility is assumed by MosChip
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Copyright © 2008 MosChip Semiconductor Technology Limited.

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MCS9865

GPIO Application Note

2. Description of Registers content

On 'Power on reset' all GPIO lines will work in input mode

GPIO control registers: [offset 11’hxxx] *

GPIO control registers

3. GPIO Mode of Operation

GPIO lines of MCS9865 support Polling mode of operation.

GPIO lines in output mode

Ver0.2 Preliminary 14th May2008 Page 1

GPIO lines in input mode

4. Example to Accessing GPIO Registers

Ver0.2 Preliminary 14th May2008 Page 2

Ver0.2 Preliminary 14th May2008 Page 3

Contact [email protected] for commercial details

Write to [email protected] for technical queries

Date Reason for change Version

14th May 2008 Updated per internal review feedback 0.2

Ver0.2 Preliminary 14th May2008 Page 4

Copyright © 2008 MosChip Semiconductor Technology Limited.

Ver0.2 Preliminary 14th May2008 Page 5

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