Fujitsu Siemens Esprimo Mobile V6535 Wistron D45 - D46 RevSA Schematic PDF

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A B C D E

SYSTEM DC/DC
Project code: 91.4J001.001--D45
D45/D46 Block Diagram
TPS51125 34
91.4K001.001--D46 INPUTS OUTPUTS
PCB P/N : 07248 DCBATOUT
5V_S5(5A)
3D3V_S5(5A)
REVISION : SA
CLK GEN.
Mobile CPU SYSTEM DC/DC
4 4
ICS9LPRS365YGLFT-GP Penryn G7921 TPS51124 36
20
3 PCB STACKUP INPUTS OUTPUTS
RTM875T-606-VD-GRT
4, 5 1D05V_M(11A)
TOP DCBATOUT
1D8V_S3(10A)
HOST BUS 667/800/[email protected] VCC
S RT9026 35
800/667MHz WXGA/SXGA+ S DDR_VREF_S0
DDR2 socket Cantiga LVDS
15"LCD 14 GND 1D8V_S3
(1.5A)

12,13
AGTL+ CPU I/F ATI BOTTOM
DDR_VREF_S3

DDR Memory I/F PCI-EG M82M RGB CRT


CRT G9131 35
INTEGRATED GRAHPICS VRAMx4 256MB 13
800/667MHz LVDS, CRT I/F 41~47 3D3V_S0 2D5V_S0
DDR2 socket 71.CNTIG.00U 6,7,8,9,10,11
S-Video
S-Video
(300mA)

13
12,13 X4 DMI APL5912 35
3 C-Link0 3
400MHz 1D8V_S3 1D5V_S0
Headphone Out
Codec AZALIA
ALC269 ICH9M NB DC/DC
PCI-E/USB 2.0 New card G577 ISL6263A 37
29 6 PCIe ports
25
25
MIC In INPUTS OUTPUTS
PCI/PCI BRIDGE
ACPI 1.1 MS/MS Pro/
29 DCBATOUT GFX_CORE
4 SATA PCI-E USB Cardreader
INT.MIC JMICRO380 26 MMC/SD
12 USB 4 in 1 26

1394 CHARGER
29 BQ24745 38
High Definition Audio PCI-E
RJ45 INPUTS OUTPUTS
INT.SPKR LPC I/F LAN 23 TXFM24 24
2 Serial Peripheral I/F TRL8111C CHG_PWR 2
18V 4.0A
PCI-E /USB 2.0 DCBATOUT
Mini Card UP+5V
Kedron a/b/g/n 25 5V 100mA
PCI-E /USB 2.0 Mini Card
UMTS(3G) 25
MODEM 71.ICH9M.00U CPU DC/DC
RJ11 MDC Card 16,17,18,19
LPC BUS ISL6266A
22 33
SATA

USB0

USB

INPUTS OUTPUTS
SATA

SATA

KBC SPI I/F BIOS LPC


BlueTooth Winbond 4M byte DEBUG VCC_CORE_S0
22 DCBATOUT
WPC773 28 0~1.3V 47A
28 CONN. 27

1 Touch INT. <Core Design>


1
HDD CDROM eSATA USB CAMERA Pad 27 KB 27
21 21
3 Port22 Wistron Corporation
/USB 22 14 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
BLOCK DIAGRAM
Size Document Number Rev
A3 PD
D45/D46
Date: Friday, March 14, 2008 Sheet 1 of 47

A B C D E
A B C D E
ICH9M Integrated Pull-up Cantiga chipset and ICH9M I/O controller
ICH9M Functional Strap Definitions page 92 Hub strapping configuration
Signal
ICH9 EDS 642879 Rev.1.5
Usage/When Sampled Comment
and Pull-down Resistors Montevina Platform Design guide 22339
page 218
0.5
ICH9 EDS 642879 Rev.1.5
HDA_SDOUT XOR Chain Entrance/ Allows entrance to XOR Chain testing when TP3 Pin Name Strap Description Configuration
PCIE Port Config1 bit1, pulled low.When TP3 not pulled low at rising edge SIGNAL Resistor Type/Value
Rising Edge of PWROK of PWROK,sets bit1 of RPC.PC(Config Registers: CL_CLK[1:0] PULL-UP 20K CFG[2:0] FSB Frequency 000 = FSB1067
Select 011 = FSB667
offset 224h). This signal has weak internal pull-down 010 = FSB800
CL_DATA[1:0] PULL-UP 20K
others = Reserved
4 HDA_SYNC PCIE config1 bit0,
Rising Edge of PWROK.
This signal has a weak internal pull-down.
Sets bit0 of RPC.PC(Config Registers:Offset 224h)
CL_RST0# PULL-UP 20K
CFG[4:3] Reserved
4
DPRSLPVR/GPIO16 PULL-DOWN 20K CFG8
GNT2#/ PCIE config2 bit2, This signal has a weak internal pull-up. CFG[15:14]
GPIO53 Rising Edge of PWROK. Sets bit2 of RPC.PC2(Config Registers:Offset 0224h) ENERGY_DETECT PULL-UP 20K CFG[18:17]
GPIO20 Reserved This signal should not be pulled high. HDA_BIT_CLK PULL-DOWN 20K
CFG5 DMI x2 Select 0 = DMI x2
GNT1#/ ESI Strap (Server Only) ESI compatible mode is for server platforms only. HDA_DOCK_EN#/GPIO33 PULL-UP 20K 1 = DMI x4 (Default)
GPIO51 Rising Edge of PWROK This signal should not be pulled low for desttop CFG6 iTPM Host 0= The iTPM Host Interface is enabled(Note2)
and mobile. HDA_RST# PULL-DOWN 20K Interface 1=The iTPM Host Interface is disalbed(default)
HDA_SDIN[3:0] PULL-DOWN 20K 0 = Transport Layer Security (TLS) cipher
Top-Block Sampled low:Top-Block Swap mode(inverts A16 for CFG7 Intel Management suite with no confidentiality
GNT3#/ Swap Override. all cycles targeting FWH BIOS space). HDA_SDOUT PULL-DOWN 20K engine Crypto strap 1 = TLS cipher suite with
GPIO55 Rising Edge of PWROK. Note: Software will not be able to clear the confidentiality (default)
Top-Swap bit until the system is rebooted HDA_SYNC PULL-DOWN 20K
0 = Reverse Lanes,15->0,14->1 ect..
without GNT3# being pulled down. GLAN_DOCK# The pull-up or pull-down active when configured for nativeCFG9 PCIE Graphics Lane 1= Normal operation(Default):Lane
GLAN_DOCK# functionality and determined by LAN controller Numbered in order
GNT0#: Boot BIOS Destination Controllable via Boot BIOS Destination bit GNT[3:0]#/GPIO[55,53,51] PULL-UP 20K
SPI_CS1#/ Selection 0:1. (Config Registers:Offset 3410h:bit 11:10). 0 = Enable (Note 3)
GPIO58 Rising Edge of PWROK. GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC. GPIO[20] PULL-DOWN 20K CFG10 PCIE Loopback enable 1= Disabled (default)
Integrated TPM Enable, Sample low: the Integrated TPM will be disabled. GPIO[49] PULL-UP 20K 00 = Reserve
Rising Edge of CLPWROK Sample high: the MCH TPM enable strap is sampled CFG[13:12] XOR/ALL 10 = XOR mode Enabled
SPI_MOSI low and the TPM Disable bit is clear, the LDA[3:0]#/FHW[3:0]# PULL-UP 20K 01 = ALLZ mode Enabled (Note 3)
11 = Disabled (default)
Integrated TPM will be enable.
LAN_RXD[2:0] PULL-UP 20K
3 DMI Termination Voltage, The signal is required to be low for desktop LDRQ[0] PULL-UP 20K
CFG16 FSB Dynamic ODT 0 = Dynamic ODT Disabled
1 = Dynamic ODT Enabled (Default) 3
Rising Edge of PWROK. applications and required to be high for
GPIO49 mobile applications. LDRQ[1]/GPIO23 PULL-UP 20K 0 = Normal operation(Default):
CFG19 DMI Lane Reversal Lane Numbered in Order
PME# PULL-UP 20K
1 = Reverse Lanes
PCI Express Lane Signal has weak internal pull-up. Sets bit 27 PWRBTN# PULL-UP 20K DMI x4 mode[MCH -> ICH]:(3->0,2->1,1->2and0->3)
SATALED# Reversal. Rising Edge of MPC.LR(Device 28:Function 0:Offset D8) DMI x2 mode[MCH -> ICH]:(3->0,2->1)
of PWROK. SATALED# PULL-UP 15K
SPKR No Reboot. If sampled high, the system is strapped to the SPI_CS1#/GPIO58/CLGPIO6 PULL-UP 20K Digital Display Port 0 = Only Digital Display Port
Rising Edge of PWROK. "No Reboot" mode(ICH9 will disable the TCO Timer (SDVO/DP/iHDMI) or PCIE is operational (Default)
system reboot feature). The status is readable SPI_MOSI PULL-DOWN 20K CFG20 Concurrent with PCIe 1 =Digital display Port and PCIe are
via the NO REBOOT bit. operting simulataneously via the PEG port
SPI_MISO PULL-UP 20K
0 =No SDVO Card Present (Default)
TP3 XOR Chain Entrance. This signal should not be pull low unless using SPKR PULL-DOWN 20K SDVO_CTRLDATA SDVO Present
Rising Edge of PWROK. XOR Chain testing. 1 = SDVO Card Present
TACH_[3:0] PULL-UP 20K
0 = LFP Disabled (Default)
GPIO33/ Flash Descriptor Sampled low:the Flash Descriptor Security will be TP[3] PULL-UP 20K Local Flat Panel
HDA_DOCK Security Override Strap overridden. If high,the security measures will be L_DDC_DATA (LFP) Present 1= LFP Card Present; PCIE disabled
_EN# Rising Edge of PWROK in effect.This should only be enabled in manufacturing USB[11:0][P,N] PULL-DOWN 15K
environments using an external pull-up resister. NOTE:
1. All strap signals are sampled with respect to the leading edge of
the (G)MCH Power OK (PWROK) signal.
2. iTPM can be disabled by a 'Soft-Strap' option in the
2 Flash-decriptor section of the Firmware. This 'Soft-Strap' is 2
activated only after enabling iTPM via CFG6.
Only one of the CFG10/CFG/12/CFG13 straps can be enabled at any time.

SMBus
SMBC_G792 Thermal

MXM
KBC
BAT_SCL
BATTERY
page 17
USB Table
PCI Routing USB
IDSEL INT REQ GNT Pair Device
G:CARDBUS 0 0 0 Combo(ESATA/USB)
TI7412 AD22 B:1394
F:Flash Media 1 NC
G:SD Host 2 USB2
SMB_CLK
3 USB4 LAN UMA
1 ICH9M 1
4 USB3
PCIE Routing 5 BLUETOOTH Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
6 WEBCAM Taipei Hsien 221, Taiwan, R.O.C.

LANE2 MiniCard WLAN 7 FT Title


SMBC_ICH CK505
LANE3 NewCard WLAN 8 MINICARD Reference
Size Document Number Rev
9 NEW1 DDR D45/D46 PD
Date: Friday, March 14, 2008 Sheet 2 of 47

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WWW.AliSaler.Com
A B C D E

3D3V_S0
3D3V_S0
3D3V_S0
3D3V_CLKGEN_S0 1 2
1 2 3D3V_48MPWR_S0
R582 3D3V_CLKPLL_S0 2 1 R2790R0603-PAD

1
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
0R0603-PAD R2820R0603-PAD C393 C719 C723 C703 C701 C397

SC4D7U6D3V3KX-GP
1

1
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
C730 C721 EC110 C704 C400 C702 C724 C718 C722 C399

SC1U16V3ZY-GP
DY SC4D7U10V5ZY-3GP

2
SC4D7U10V5ZY-3GP

2
PD DY

4 4

U18
3D3V_S0
3D3V_CLKGEN_S0 2 63
VDDPCI SDATA SMBD_ICH 12,19
3D3V_48MPWR_S0 9 64 SMBC_ICH 12,19
VDD48 SCLK
16 VDDPLL3 UMA
2

2
DY R296VGA_27M_PH
R294 DY
R292 R286
61 VDDREF
13 DREFCLK_1 4 1 RN39 DREFCLK 7
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP SRCT0/DOTT_96 DREFCLK#_1
39 VDDSRC SRCC0/DOTC_96 14 3 2 SRN0J-6-GP DREFCLK# 7
55 VDDCPU DREFSSCLK_1
UMA
17 2 3 RN40 DREFSSCLK 7
1

1
27MHZ_NONSS/SRCT1/SE1
3D3V_CLKPLL_S0 12 VDD96_IO 27MHZ_SS/SRCC1/SE2 18 DREFSSCLK#_1 1 4 SRN0J-6-GP DREFSSCLK# 7
PCLKCLK2 20
PCLKCLK3 VDDPLL3_IO CLK_PCIE_SATA_1 RN41
26 VDDSRC_IO SRCT2/SATAT 21 2 3 CLK_PCIE_SATA 16
PCLKCLK4 36 22 CLK_PCIE_SATA_1# 1 4 SRN0J-6-GP
VDDSRC_IO SRCC2/SATAC CLK_PCIE_SATA# 16
PCLKCLK5 45 VDDSRC_IO CLK_MCH_3GPLL_1 RN42
R283 1
DY 49 VDDCPU_IO SRCT3/CR#_C 24 2 3
SRN0J-6-GP CLK_MCH_3GPLL 7
7 CLK_MCH_OE# 2475R2F-L1-GP PCLKCLK0 1 PCI0/CR#_A SRCC3/CR#_D 25 CLK_MCH_3GPLL_1# 1 4 CLK_MCH_3GPLL# 7
2

R289 R288 DY R287 DY R284 TP127 PCLKCLK1 3 27 CLK_PCIE_MINI_12 2 3 RN43 CLK_PCIE_MINI1 25


10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP PCI1/CR#_B SRCT4 CLK_PCIE_MINI_12# SRN0J-6-GP
SRCC4 28 1 4 CLK_PCIE_MINI1# 25
UMA TP68 PCLKCLK2 4 PCI2/TME
38 PM_STPPCI# 17
1

R291 2 PCLKCLK3 PCI_STOP#


27 PCLK_FWH 1 5 PCI3 CPU_STOP# 37 PM_STPCPU# 17
22R2J-2-GP
28 PCLK_KBC R293 2 1 PCLKCLK4 6 41 CLK_PCIE_ICH_1 1 4 RN35 CLK_PCIE_ICH 17
22R2J-2-GP PCI4/27_SELECT SRCT6 CLK_PCIE_ICH_1# SRN0J-6-GP
CL=20pF±0.2pF SRCC6 40 2 3 CLK_PCIE_ICH# 17
C382 17 PCLK_ICH R295 2 1 PCLKCLK5 7 SB
3 SC27P50V2JN-2-GP 22R2J-2-GP PCI_F5/ITP_EN CLK_PCIE_CARD_R RN60 3
SRCT7/CR#_F 44 1 4 CLK_PCIE_CARD 26
GEN_XTAL_IN R268 2 1 10MR2J-L-GP CLK_PCIE_CARD#_R SRN0J-6-GP
1 2
1
DYR267
2 GEN_XTAL_OUT
59
60
X2 SRCC7/CR#_E 43 2 3 CLK_PCIE_CARD# 26
X1
1

0R0402-PAD 47 CLK_CPU_XDP_R 1 4 RN34 CLK_PCIE_MINI2 25


X4 R298 2 CPUT2_ITP/SRCT8
17 CLK48_ICH 1 33R2J-2-GP CLK48 10 USB_48MHZ/FSLA CPUC2_ITP/SRCC8 46 CLK_CPU_XDP#_R 2 3 SRN0J-6-GP CLK_PCIE_MINI2# 25
X-14D31818M-35GP 4,7 CPU_SEL0 2 R299
1
C381 2K2R2J-2-GP 57 51 CLK_MCH_BCLK_1 1 4 RN33
4,7 CPU_SEL1 CLK_MCH_BCLK 6
2

GEN_XTAL_OUT_R FSLB/TEST_MODE CPUT1_F CLK_MCH_BCLK_1# SRN0J-6-GP


1 2 CPUC1_F 50 2 3 CLK_MCH_BCLK# 6
4,7 CPU_SEL2 R273 2 1 CPU_SEL2_R 62
SC27P50V2JN-2-GP 10KR2J-3-GP REF0/FSLC/TEST_SEL CLK_CPU_BCLK_1 RN32
CPUT0 54 1 4 CLK_CPU_BCLK 4
17 CLK_ICH14 R274 2 1 8 53 CLK_CPU_BCLK_1# 2 3 SRN0J-6-GP CLK_CPU_BCLK# 4
33R2J-2-GP GNDPCI CPUC0
11 GND48
15 GND
19 56 3D3V_S0
GND CK_PWRGD/PD# CLK_PWRGD 17
23 GNDSRC
42 GNDSRC NC#48 48
PCLK_FWH 52 1 DY R270
2
PCLK_KBC GNDCPU 10KR2J-3-GP
58 GNDREF
PCLK_ICH 30 CLK_PCIE_NEW_R 2 3 RN44 CLK_PCIE_NEW 25
SRCT9
CLK48_ICH
SRCC9 31 CLK_PCIE_NEW#_R 1 4 SRN0J-6-GP CLK_PCIE_NEW# 25
CLK_ICH14 29 GNDSRC CLK_PCIE_LAN_R RN38
SRCC11/CR#_G 32 2 3 CLK_PCIE_LAN 23
1

EC51 EC52 EC53 EC54 EC49


SRCT11/CR#_H 33 CLK_PCIE_LAN#_R 1 4 SRN0J-6-GP CLK_PCIE_LAN# 23
SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

PD 34 CLK_PCIE_PEG_1 2 3 RN36 CLK_PCIE_PEG 41


VGA
2

SRCT10 CLK_PCIE_PEG_1#
SRCC10 35 1 4 SRN0J-6-GP CLK_PCIE_PEG# 41
CLK_PCIE_MINI2 CLK_PCIE_MINI2#

ICS9LPRS365YGLFT-GP VGA_27M
2 71.09365.00W 2
R581 33R2J-2-GP
1

1
DREFSSCLK_1 1 2 VGA_XIN1 VGA_XIN1 42
DY C372
DY C375
ICS9LPRS365YGLFT setting table
SC15P50V2JN-2-GP

SC15P50V2JN-2-GP
2

2
PIN NAME DESCRIPTION SB VGA_27MSS
R580 33R2J-2-GP
Byte 5, bit 7 DREFSSCLK#_1 1 2 OSC_SPREAD
0 = PCI0 enabled (default) OSC_SPREAD 42
1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair
PCI0/CR#_A Byte 5, bit 6 PD
0 = CR#_A controls SRC0 pair (default),
1= CR#_A controls SRC2 pair
SEL2 SEL1 SEL0
Byte 5, bit 5 CPU FSB
0 = PCI1 enabled (default) PIN NAME DESCRIPTION FSC FSB FSA
1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair
PCI1/CR#_B Byte 5, bit 4 Byte 5, bit 1
100M X
0 = CR#_B controls SRC1 pair (default) 0 = SRC3 enabled (default) 1 0 1
1= CR#_B controls SRC4 pair 1= CR#_D enabled. Byte 5, bit 0 controls whether CR#_D controls SRC1 or SRC4 pair
SRCC3/CR#_D Byte 5, bit 0 0 0 1 133M 533M
0 = Overclocking of CPU and SRC Allowed 0 = CR#_D controls SRC1 pair (default)
PCI2/TME 1 = Overclocking of CPU and SRC NOT allowed 1= CR#_D controls SRC4 pair 0 1 1 166M 667M
Byte 6, bit 7 0 1 0 200M 800M
PCI3 0 = SRC7# enabled (default)
266M 1067M
SRCC7/CR#_E 1= CR#_F controls SRC6 0 0 0
0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96#
1
PCI4/27M_SEL 1 = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0# Byte 6, bit 6
UMA 1

0 = SRC7 enabled (default)


0 =SRC8/SRC8# SRCT7/CR#_F 1= CR#_F controls SRC8
PCI_F5/ITP_EN 1 = ITP/ITP# Wistron Corporation
Byte 6, bit 5 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Byte 5, bit 3 0 = SRC11# enabled (default) Taipei Hsien 221, Taiwan, R.O.C.
0 = SRC3 enabled (default) SRCC11/CR#_G 1= CR#_G controls SRC9
1= CR#_C enabled. Byte 5, bit 2 controls whether CR#_C controls SRC0 or SRC2 pair Title
SRCT3/CR#_C Byte 5, bit 2 Byte 6, bit 4 Clock Generator
0 = CR#_C controls SRC0 pair (default), 0 = SRC11 enabled (default)
1= CR#_C controls SRC2 pair SRCT11/CR#_H 1= CR#_H controls SRC10 Size Document Number Rev
D45/D46 PD
Date: Tuesday, March 18, 2008 Sheet 3 of 47
A B C D E
A B C D E

H_A#[35..3]
6 H_A#[35..3]
H_DINV#[3..0]
H_DINV#[3..0] 6
U35A 1 OF 4 TP20 H_DSTBN#[3..0]
H_DSTBN#[3..0] 6
H_A#3 J4 H1 1D05V_S0 H_DSTBP#[3..0]
A3# ADS# H_ADS# 6 H_DSTBP#[3..0] 6
H_A#4 L5 E2 H_BNR# 6
H_A#5 A4# BNR# H_D#[63..0]
L4 A5# BPRI# G5 H_BPRI# 6 H_D#[63..0] 6

ADDR GROUP 0
4 H_A#6 K5 4
A6#

1
H_A#7 M3 H5 H_DEFER# 6
H_A#8 A7# DEFER# R93 Place testpoint on
N2 F21

CONTROL
A8# DRDY# H_DRDY# 6
H_A#9 J1 E1 56R2J-4-GP H_IERR# with a GND
A9# DBSY# H_DBSY# 6
H_A#10 N3 0.1" away
H_A#11 A10#
P5 F1 H_BREQ#0 6

2
H_A#12 A11# BR0#
P2 A12#
H_A#13 L2 D20 H_IERR# TP25
H_A#14 A13# IERR#
P4 A14# INIT# B3 H_INIT# 16,27
H_A#15 P1
H_A#16 A15#
R1 A16# LOCK# H4 H_LOCK# 6
M1 H_CPURST# 6 U35B 2 OF 4
6 H_ADSTB#0 ADSTB0#
6 H_REQ#[4..0] RESET# C1 H_RS#[2..0] 6
H_REQ#0 K3 F3 H_RS#0 H_D#0 E22 Y22 H_D#32
H_REQ#1 REQ0# RS0# H_RS#1 H_THERMDA H_D#1 D0# D32# H_D#33
H2 REQ1# RS1# F4 F24 D1# D33# AB24
H_REQ#2 K2 G3 H_RS#2 H_D#2 E26 V24 H_D#34
REQ2# RS2# D2# D34#

1
H_REQ#3 J3 G2 H_TRDY# 6 H_D#3 G22 V26 H_D#35
H_REQ#4 REQ3# TRDY# C113 H_D#4 D3# D35# H_D#36
L1 REQ4# F23 D4# D36# V23

DATA GRP0
SC2200P50V2KX-2GP H_D#5 H_D#37

DATA GRP2
G6 H_HIT# 6 G25 T22

2
H_A#17 HIT# H_THERMDC H_D#6 D5# D37# H_D#38
Y2 A17# HITM# E4 H_HITM# 6 DY E25 D6# D38# U25
H_A#18 U5 H_D#7 E23 U23 H_D#39
H_A#19 A18# XDP_BPM#0 TP3 H_D#8 D7# D39# H_D#40
R3 A19# BPM0# AD4 K24 D8# D40# Y25
H_A#20 W6 AD3 XDP_BPM#1 TP2 H_D#9 G24 W22 H_D#41

XDP/ITP SIGNALS
A20# BPM1# D9# D41#

ADDR GROUP 1
H_A#21 U4 AD1 XDP_BPM#2 TP4 H_D#10 J24 Y23 H_D#42
H_A#22 A21# BPM2# XDP_BPM#3 TP7 H_D#11 D10# D42# H_D#43
Y5 A22# BPM3# AC4 J23 D11# D43# W24
H_A#23 U1 AC2 XDP_BPM#4 TP6 H_D#12 H22 W25 H_D#44
H_A#24 A23# PRDY# XDP_BPM#5 TP5 H_D#13 D12# D44# H_D#45
R4 A24# PREQ# AC1 F26 D13# D45# AA23
H_A#25 T5 AC5 XDP_TCK TP8 H_D#14 K22 AA24 H_D#46
H_A#26 A25# TCK XDP_TDI TP12 H_D#15 D14# D46# H_D#47
T3 A26# TDI AA6 H23 D15# D47# AB25
3 H_A#27 W2 AB3 XDP_TDO TP11 J26 Y26 H_DSTBN#2 6
3
A27# TDO 6 H_DSTBN#0 DSTBN0# DSTBN2#
H_A#28 W5 AB5 XDP_TMS TP9 H26 AA26 H_DSTBP#2 6
A28# TMS 6 H_DSTBP#0 DSTBP0# DSTBP2#
H_A#29 Y4 AB6 XDP_TRST# TP10 H25 U22 H_DINV#2 6
A29# TRST# 6 H_DINV#0 DINV0# DINV2#
H_A#30 U2 C20 XDP_DBRESET# TP26
H_A#31 A30# DBR#
V4 A31#
H_A#32 W3 2 R92 1 1D05V_S0 H_D#16 N22 AE24 H_D#48
H_A#33 A32# 68R2-GP H_D#17 K25 D16# D48# H_D#49
AA4 A33# THERMAL D17# D49# AD24
H_A#34 AB2 H_D#18 P26 AA21 H_D#50
H_A#35 A34# CPU_PROCHOT#_R H_D#19 R23 D18# D50# H_D#51
AA3 A35# PROCHOT# D21 CPU_PROCHOT#_R 32 D19# D51# AB22
V1 A24 H_THERMDA 20 H_D#20 L23 AB21 H_D#52
6 H_ADSTB#1 ADSTB1# THRMDA D20# D52#
B25 H_THERMDC 20 H_D#21 M24 AC26 H_D#53
THRMDC D21# D53#

DATA GRP1
DATA GRP3
16 H_A20M# A6 H_D#22 L22 AD20 H_D#54
A20M# R98 H_D#23 M23 D22# D54# H_D#55
16 H_FERR# A5 FERR# THERMTRIP# C7 2 1 PM_THRMTRIP-A# 7,16 D23# D55# AE22
ICH

16 H_IGNNE# C4 0R0402-PAD H_D#24 P25 AF23 H_D#56


IGNNE# H_D#25 P23 D24# D56# H_D#57
D25# D57# AC25
16 H_STPCLK# 2 R95 1 H_STPCLK#_R D5 H_D#26 P22 AE21 H_D#58
0R2J-2-GP STPCLK# H_D#27 T24 D26# D58# H_D#59
16 H_INTR C6 LINT0 HCLK BCLK0 A22 CLK_CPU_BCLK 3 D27# D59# AD21
16 H_NMI B4 A21 CLK_CPU_BCLK# 3 H_D#28 R24 AC22 H_D#60
LINT1 BCLK1 H_D#29 L25 D28# D60# H_D#61
16 H_SMI# A3 SMI# D29# D61# AD23
PM_THRMTRIP# 1D05V_S0 H_D#30 T25 AF22 H_D#62
TP18 RSVD_CPU_1 should connect to H_D#31 N25 D30# D62# H_D#63
M4 RSVD#M4 D31# D63# AC23

2
TP17 RSVD_CPU_2 N5 ICH9 and MCH L26 AE25 H_DSTBN#3 6
RSVD#N5 6 H_DSTBN#1 DSTBN1# DSTBN3#
TP16 RSVD_CPU_3 T2 without T-ing R386 M26 AF24 H_DSTBP#3 6
RESERVED

RSVD#T2 1KR2F-3-GP 6 H_DSTBP#1 DSTBP1# DSTBP3#


TP13 RSVD_CPU_4 V3 ( No stub) Layout Note: N24 AC20 H_DINV#3 6
RSVD#V3 "CPU_GTLREF0" 6 H_DINV#1 DINV1# DINV3#
TP31 RSVD_CPU_5 B2
TP29 RSVD_CPU_6 RSVD#B2 0.5" max length. CPU_GTLREF0 COMP0 R404 27D4R2F-L1-GP
C3 AD26 R26 1 2

1 1
TP24 RSVD_CPU_7 RSVD#C3 TEST1 GTLREF COMP0 COMP1 R403 54D9R2F-L1-GP
D2 RSVD#D2 C23 TEST1 MISC COMP1 U26 1 2

1
SC1KP50V2KX-1GP
TP30 RSVD_CPU_8 D22 DY C475 TEST2 D25 AA1 COMP2 R79 1 2 27D4R2F-L1-GP
TP27 RSVD_CPU_9 RSVD#D22 R387 TP28 RSVD_CPU_12 C24 TEST2 COMP2 COMP3 R80 54D9R2F-L1-GP
D3 RSVD#D3 TEST3 COMP3 Y1 1 2
2 TP22 RSVD_CPU_10 TEST4 2
F6 AF26

2
RSVD#F6 TEST4

2KR2F-3-GP
TP78 RSVD_CPU_13 AF1 E5 H_DPRSTP# 7,16,32
TP32 RSVD_CPU_11 TP86 RSVD_CPU_14 A26 TEST5 DPRSTP#
B1 B5 H_DPSLP# 16

2
KEY_NC TEST6 DPSLP#
DPWR# D24 H_DPWR# 6
BGA479-SKT6-GPU3 3,7 CPU_SEL0 B22 D6 H_PWRGD 16
BSEL0 PWRGOOD
62.10079.001 3,7 CPU_SEL1 B23 BSEL1 SLP# D7 H_CPUSLP# 6
3,7 CPU_SEL2 C21 BSEL2 PSI# AE6 PSI# 32

SB use 62.10053.401 1D05V_S0 BGA479-SKT6-GPU3

Layout Note:
1 DY 2 TEST1 Comp0, 2 connect with Zo=27.4 ohm, make
XDP_TMS R67 1 2 R99 1KR2J-1-GP trace length shorter than 0.5" .
54D9R2F-L1-GP Net "TEST4" as short as possible, Comp1, 3 connect with Zo=55 ohm, make
XDP_TDI R75 1 2 1 2 TEST2
DY 1KR2J-1-GP trace length shorter than 0.5" .
54D9R2F-L1-GP R411 make sure "TEST4" routing is
XDP_BPM#5 R60 1 2 reference to GND and away other
54D9R2F-L1-GP 2 1 TEST4
XDP_TDO R72 noisy signals
1 DY 2 54D9R2F-L1-GP C471DY
SCD1U10V2KX-4GP
H_CPURST# R97 1 DY 2 54D9R2F-L1-GP
3D3V_S0

XDP_DBRESET# R96 1 DY 2
150R2F-1-GP
1 ZZZZ 1

XDP_TCK R64 1 2
54D9R2F-L1-GP Wistron Corporation
XDP_TRST# R74 1 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
54D9R2F-L1-GP Taipei Hsien 221, Taiwan, R.O.C.
All place within 2" to CPU
Title

CPU (1 of 2)
Size Document Number Rev

D45/D46 PD
Date: Friday, March 14, 2008 Sheet 4 of 47
A B C D E

WWW.AliSaler.Com
A B C D E

VCC_CORE U35D 4 OF 4

VCC_CORE VCC_CORE A4 P6
VSS VSS
4 A8 VSS VSS P21 4
U35C 3 OF 4 A11 P24
VSS VSS
A14 VSS VSS R2

1
A7 AB20 C54 C105 C106 C55 A16 R5
VCC VCC VSS VSS

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
A9 VCC VCC AB7 DY A19 VSS VSS R22
A10 AC7 A23 R25

2
VCC VCC VSS VSS
A12 VCC VCC AC9 AF2 VSS VSS T1
A13 VCC VCC AC12 B6 VSS VSS T4
A15 VCC VCC AC13 B8 VSS VSS T23
A17 VCC VCC AC15 B11 VSS VSS T26
A18 VCC VCC AC17 B13 VSS VSS U3
A20 VCC VCC AC18 B16 VSS VSS U6
B7 VCC VCC AD7 B19 VSS VSS U21
B9 VCC VCC AD9 B21 VSS VSS U24
B10 VCC VCC AD10 B24 VSS VSS V2
B12 VCC VCC AD12 C5 VSS VSS V5
B14 VCC VCC AD14 C8 VSS VSS V22
B15 AD15 VCC_CORE C11 V25
VCC VCC VSS VSS
B17 VCC VCC AD17 C14 VSS VSS W1
B18 VCC VCC AD18 C16 VSS VSS W4
B20 AE9 C100 C91 C486 C487 C491 C80 C490 C97 C81 C19 W23
VCC VCC VSS VSS

1
C9 VCC VCC AE10 C2 VSS VSS W26

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP
C10 VCC VCC AE12 DY DY DY C22 VSS VSS Y3
C12 AE13 C25 Y6

2
VCC VCC VSS VSS
C13 VCC VCC AE15 D1 VSS VSS Y21
C15 VCC VCC AE17 D4 VSS VSS Y24
C17 VCC VCC AE18 D8 VSS VSS AA2
C18 VCC VCC AE20 D11 VSS VSS AA5
D9 VCC VCC AF9 D13 VSS VSS AA8
3 D10 AF10 D16 AA11 3
VCC VCC VSS VSS
D12 VCC VCC AF12 D19 VSS VSS AA14
D14 VCC VCC AF14 D23 VSS VSS AA16
D15 VCC VCC AF15 D26 VSS VSS AA19
D17 VCC VCC AF17 E3 VSS VSS AA22
D18 VCC VCC AF18 E6 VSS VSS AA25
E7 AF20 1D05V_S0 E8 AB1
VCC VCC VSS VSS
E9 VCC E11 VSS VSS AB4
E10 VCC VCCP G21 CPU_G21 1 R94 2 0R0402-PAD E14 VSS VSS AB8
E12 V6 CPU_V6 1 2 E16 AB11
VCC VCCP R81 0R0402-PAD VSS VSS
E13 VCC VCCP J6 E19 VSS VSS AB13
E15 K6 C104 E21 AB16
VCC VCCP VSS VSS
1

1
SCD1U10V2KX-4GP

E17 M6 C69 E24 AB19


VCC VCCP VSS VSS
SCD1U10V2KX-4GP

E18 J21 TC16 F5 AB23


VCC VCCP ST220U6D3VDM-15GP VSS VSS
E20 K21 F8 AB26
2

VCC VCCP VSS VSS


F7 VCC VCCP M21 F11 VSS VSS AC3
F9 N21 1D05V_S0 F13 AC6
VCC VCCP VSS VSS
F10 VCC VCCP N6 F16 VSS VSS AC8
F12 VCC VCCP R21 layout note: "1D5V_VCCA_S0" F19 VSS VSS AC11
F14 R6 F2 AC14
F15
VCC VCCP
T21
as short as possible F22
VSS VSS
AC16
VCC VCCP VSS VSS
F17 VCC VCCP T6 F25 VSS VSS AC19

1
F18 V21 1D5V_S0 C77 C84 C82 C102 C67 C78 C99 C94 G4 AC21
VCC VCCP 1D5V_VCCA_S0 VSS VSS

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
F20 VCC VCCP W21 L21 G1 VSS VSS AC24

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
AA7 G23 AD2

2
VCC VSS VSS
AA9 VCC VCCA B26 1 2 G26 VSS VSS AD5
AA10 C26 HCB1608KF121T30-GP H3 AD8
VCC VCCA VSS VSS
1

AA12 H_VID[6..0] 32 C500 H6 AD11


VCC H_VID0 C501 VSS VSS
SCD01U16V2KX-3GP

AA13 VCC VID0 AD6 H21 VSS VSS AD13


2 H_VID1 VCC_CORE SC10U6D3V5MX-3GP 2
AA15 AF5 H24 AD16
2

VCC VID1 H_VID2 VSS VSS


AA17 VCC VID2 AE5 J2 VSS VSS AD19
AA18 AF4 H_VID3 J5 AD22
VCC VID3 VSS VSS
1

AA20 AE3 H_VID4 J22 AD25


VCC VID4 H_VID5 R58 VSS VSS
AB9 VCC VID5 AF3 J25 VSS VSS AE1 TP77
AC10 AE2 H_VID6 100R2F-L1-GP-U K1 AE4
VCC VID6 VSS VSS
AB10 VCC K4 VSS VSS AE8
AB12 K23 AE11
2

VCC VSS VSS


AB14 VCC VCCSENSE AF7 VCC_SENSE 32 K26 VSS VSS AE14
AB15 VCC L3 VSS VSS AE16
AB17 VCC L6 VSS VSS AE19
AB18 VCC VSSSENSE AE7 VSS_SENSE 32 L21 VSS VSS AE23
L24 VSS VSS AE26 TP79
1

Layout Note: M2 A2 TP33


R65 VSS VSS
M5 VSS VSS AF6
BGA479-SKT6-GPU3 100R2F-L1-GP-U VCCSENSE and VSSSENSE lines M22 AF8
should be of equal length. VSS VSS
M25 VSS VSS AF11
N1 AF13
2

VSS VSS
N4 VSS VSS AF16
Layout Note: N23 AF19
Provide a test point (with VSS VSS
N26 VSS VSS AF21
no stub) to connect a P3 A25 TP87
differential probe VSS VSS
VSS AF25
between VCCSENSE and
VSSSENSE at the location
where the two 54.9ohm BGA479-SKT6-GPU3
resistors terminate the
55 ohm transmission line.
1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (2 of 2)
Size Document Number Rev

D45/D46 PD
Date: Friday, March 14, 2008 Sheet 5 of 47
A B C D E
5 4 3 2 1

U43A 1 OF 10
H_A#[35..3]
H_A#[35..3] 4
H_D#[63..0] A14 H_A#3
4 H_D#[63..0] H_A#_3
H_D#0 F2 C15 H_A#4
H_D#1 H_D#_0 H_A#_4 H_A#5
G8 H_D#_1 H_A#_5 F16
H_D#2 F8 H13 H_A#6
H_D#3 H_D#_2 H_A#_6 H_A#7
E6 H_D#_3 H_A#_7 C18
H_D#4 G2 M16 H_A#8
1D05V_S0 H_D#5 H_D#_4 H_A#_8 H_A#9
D H_SWING routing Trace width and H6 H_D#_5 H_A#_9 J13 D
H_D#6 H2 P16 H_A#10
Spacing use 10 / 20 mil H_D#_6 H_A#_10

1
H_D#7 F6 R16 H_A#11
R438 H_D#8 H_D#_7 H_A#_11 H_A#12
D4 H_D#_8 H_A#_12 N17
221R2F-2-GP H_D#9 H3 M13 H_A#13
H_D#10 H_D#_9 H_A#_13 H_A#14
H_SWING Resistors and M9 H_D#_10 H_A#_14 E17
H_D#11 M11 P17 H_A#15

2
Capacitors close MCH H_D#12 J1
H_D#_11 H_A#_15
F17 H_A#16
H_SWING H_D#13 H_D#_12 H_A#_16 H_A#17
500 mil ( MAX ) J2 H_D#_13 H_A#_17 G20
H_D#14 N12 B19 H_A#18
H_D#_14 H_A#_18

1
H_D#15 H_A#19

SCD1U10V2KX-4GP
J6 H_D#_15 H_A#_19 J16
1

C519
R437 H_D#16 P2 E20 H_A#20
100R2F-L1-GP-U H_D#17 H_D#_16 H_A#_20 H_A#21
L2 H_D#_17 H_A#_21 H16
H_D#18 R2 J20 H_A#22
2

H_D#19 H_D#_18 H_A#_22 H_A#23


N9 L17

2
H_D#20 H_D#_19 H_A#_23 H_A#24
L6 H_D#_20 H_A#_24 A17
H_D#21 M5 B17 H_A#25
H_D#22 H_D#_21 H_A#_25 H_A#26
J3 H_D#_22 H_A#_26 L16
H_D#23 N2 C21 H_A#27
H_D#24 H_D#_23 H_A#_27 H_A#28
R1 H_D#_24 H_A#_28 J17
H_D#25 N5 H20 H_A#29
H_D#26 H_D#_25 H_A#_29 H_A#30
N6 H_D#_26 H_A#_30 B18
H_D#27 P13 K17 H_A#31
H_D#28 H_D#_27 H_A#_31 H_A#32
N8 H_D#_28 H_A#_32 B20
H_D#29 L7 F21 H_A#33
H_D#30 H_D#_29 H_A#_33 H_A#34
N10 H_D#_30 H_A#_34 K21
H_D#31 M3 L20 H_A#35
H_D#32 H_D#_31 H_A#_35
Y3 H_D#_32
H_D#33 AD14 H12 H_ADS# 4
C H_D#34 H_D#_33 H_ADS# C
Y6 H_D#_34 H_ADSTB#_0 B16 H_ADSTB#0 4
H_D#35 Y10 G17 H_ADSTB#1 4
H_D#36 H_D#_35 H_ADSTB#_1
Y12 H_D#_36 H_BNR# A9 H_BNR# 4
H_D#37 Y14 F11 H_BPRI# 4
H_D#38 H_D#_37 H_BPRI#
Y7 G12

HOST
H_D#_38 H_BREQ# H_BREQ#0 4
H_D#39 W2 E9 H_DEFER# 4
H_D#40 H_D#_39 H_DEFER#
AA8 H_D#_40 H_DBSY# B10 H_DBSY# 4
H_D#41 Y9 AH7 CLK_MCH_BCLK 3
H_D#42 H_D#_41 HPLL_CLK
AA13 H_D#_42 HPLL_CLK# AH6 CLK_MCH_BCLK# 3
H_D#43 AA9 J11 H_DPWR# 4
H_D#44 H_D#_43 H_DPWR#
AA11 H_D#_44 H_DRDY# F9 H_DRDY# 4
H_RCOMP routing Trace width and H_D#45 AD11 H9 H_HIT# 4
H_D#46 H_D#_45 H_HIT#
AD10 E12 H_HITM# 4
Spacing use 10 / 20 mil H_D#47 AD13
H_D#_46 H_HITM#
H11
H_D#_47 H_LOCK# H_LOCK# 4
H_D#48 AE12 C9 H_TRDY# 4
H_D#49 H_D#_48 H_TRDY#
AE9 H_D#_49
1 2 H_RCOMP H_D#50 AA2 H_D#_50
R138 24D9R2F-L-GP H_D#51 AD8
H_D#52 H_D#_51 H_DINV#[3..0]
AA3 H_D#_52 H_DINV#[3..0] 4
H_D#53 AD3 J8 H_DINV#0
H_D#54 H_D#_53 H_DINV#_0 H_DINV#1
AD7 H_D#_54 H_DINV#_1 L3
H_D#55 AE14 Y13 H_DINV#2
H_D#56 H_D#_55 H_DINV#_2 H_DINV#3
Place them near to the chip ( < 0.5") H_D#57
AF3
AC1
H_D#_56 H_DINV#_3 Y1
H_DSTBN#[3..0]
H_D#_57 H_DSTBN#[3..0] 4
H_D#58 AE3 L10 H_DSTBN#0
H_D#59 H_D#_58 H_DSTBN#_0 H_DSTBN#1
AC3 H_D#_59 H_DSTBN#_1 M7
H_D#60 AE11 AA5 H_DSTBN#2
H_D#61 H_D#_60 H_DSTBN#_2 H_DSTBN#3
AE8 H_D#_61 H_DSTBN#_3 AE6
H_D#62 AG2 H_DSTBP#[3..0]
B H_D#_62 H_DSTBP#[3..0] 4 B
H_D#63 AD6 L9 H_DSTBP#0
H_D#_63 H_DSTBP#_0 H_DSTBP#1
H_DSTBP#_1 M8
AA6 H_DSTBP#2
H_DSTBP#_2 H_DSTBP#3
H_DSTBP#_3 AE5
H_REQ#[4..0] 4
1D05V_S0 B15 H_REQ#0
H_SWING H_REQ#_0 H_REQ#1
C5 H_SWING H_REQ#_1 K13
H_RCOMP E3 F13 H_REQ#2
H_RCOMP H_REQ#_2
2

B13 H_REQ#3
R445 H_REQ#_3 H_REQ#4
4 H_CPURST# C12 H_CPURST# H_REQ#_4 B14
1KR2F-3-GP E11
4 H_CPUSLP# H_CPUSLP# H_RS#[2..0] 4
B6 H_RS#0
H_RS#_0 H_RS#1
F12
1

H_AVREF H_RS#_1 H_RS#2


A11 H_AVREF H_RS#_2 C8
1 R444 2 H_DVREF B11
0R0402-PAD H_DVREF
1

DY C524
R442 PD CANTIGA-GM-GP-U-NF
SCD1U16V2ZY-2GP

2KR2F-3-GP
2

71.CNTIG.00U
2

D45 SB use 71.CNTIG.H0U

A
D46 SB use 71.CNTIG.G0U A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number


Cantiga (1 of 6) Rev

D45/D46 PD
Date: Friday, March 14, 2008 Sheet 6 of 47
5 4 3 2 1

WWW.AliSaler.Com
5 4 3 2 1

U43B 2 OF 10

M36 U43C 3 OF 10 1D05V_S0

DDR CLK/ CONTROL/COMPENSATION


RESERVED#M36
N36 RESERVED#N36 SA_CK_0 AP24 M_CLK_DDR0 12
1D8V_S3 R33 AT21 TP45 LBKLT_CTRL L32 FOR Cantiga:49.9 ohm
RESERVED#R33 SA_CK_1 M_CLK_DDR1 12 L_BKLT_CTRL
T33 AV24 M_CLK_DDR2 12 28 GMCH_BL_ON G32 T37 PEG_CMP 2 1 Teenah: 24.9 ohm
RESERVED#T33 SB_CK_0 LCTLA_CLK L_BKLT_EN PEG_COMPI R225 49D9R2F-GP
AH9 RESERVED#AH9 SB_CK_1 AU20 M_CLK_DDR3 12 M32 L_CTRL_CLK PEG_COMPO T36

1
AH10 TP44
R452 RESERVED#AH10 TP47 LCTLB_DATA
AH12 RESERVED#AH12 SA_CK#_0 AR24 M_CLK_DDR#0 12 M33 L_CTRL_DATA PEG_RXN[15..0] 41
80D6R2F-L-GP AH13 AR21 M_CLK_DDR#1 12 14 CLK_DDC_EDID CLK_DDC_EDID K33 H44 PEG_RXN0
RESERVED#AH13 SA_CK#_1 DAT_DDC_EDID L_DDC_CLK PEG_RX#_0 PEG_RXN1
Cantiga K12 RESERVED#K12 SB_CK#_0 AU24 M_CLK_DDR#2 12 14 DAT_DDC_EDID J33 L_DDC_DATA PEG_RX#_1 J46
TP48 ME_JTAG_TCK AL34 AV20 M_CLK_DDR#3 12 L44 PEG_RXN2

2
M_RCOMPP TP49 ME_JTAG_TDI RESERVED#AL34 SB_CK#_1 PEG_RX#_2 PEG_RXN3
AK34 RESERVED#AK34 PEG_RX#_3 L40
TP46 ME_JTAG_TDO AN35 BC28 M_CKE0 12,13 14 GMCH_LCDVDD_ON GMCH_LCDVDD_ON M29 N41 PEG_RXN4
TP51 ME_JTAG_TMS RESERVED#AN35 SA_CKE_0 LIBG L_VDD_EN PEG_RX#_4 PEG_RXN5
AM35 RESERVED#AM35 SA_CKE_1 AY28 M_CKE1 12,13 C44 LVDS_IBG PEG_RX#_5 P48
M_RCOMPN T24 AY36 M_CKE2 12,13 TP97 L_LVBG B43 N44 PEG_RXN6
RESERVED#T24 SB_CKE_0 LVDS_VBG PEG_RX#_6 PEG_RXN7
D
SB_CKE_1 BB36 M_CKE3 12,13 E37 LVDS_VREFH PEG_RX#_7 T43 D

RSVD
B31 E38 U43 PEG_RXN8
R450 RESERVED#B31 LVDS_VREFL PEG_RX#_8 PEG_RXN9
B2 RESERVED#B2 SA_CS#_0 BA17 M_CS0# 12,13 14 GMCH_TXACLK- C41 LVDSA_CLK# PEG_RX#_9 Y43
80D6R2F-L-GP M1 AY16 M_CS1# 12,13 14 GMCH_TXACLK+ C40 Y48 PEG_RXN10
RESERVED#M1 SA_CS#_1 LVDSA_CLK PEG_RX#_10 PEG_RXN11
Cantiga SB_CS#_0 AV16 M_CS2# 12,13 14 GMCH_TXBCLK- B37 LVDSB_CLK# PEG_RX#_11 Y36
AR13 M_CS3# 12,13 14 GMCH_TXBCLK+ A37 AA43 PEG_RXN12

2
SB_CS#_1 LVDSB_CLK PEG_RX#_12

LVDS
AY21 AD37 PEG_RXN13
RESERVED#AY21 PEG_RX#_13 PEG_RXN14
SA_ODT_0 BD17 M_ODT0 12,13 14 GMCH_TXAOUT0- H47 LVDSA_DATA#_0 PEG_RX#_14 AC47
AY17 M_ODT1 12,13 14 GMCH_TXAOUT1- E46 AD39 PEG_RXN15
SA_ODT_1 LVDSA_DATA#_1 PEG_RX#_15
SB_ODT_0 BF15 M_ODT2 12,13 14 GMCH_TXAOUT2- G40 LVDSA_DATA#_2 PEG_RXP[15..0] 41
BG23 AY13 1D8V_S3 TP96 GMCH_TXAOUT3-A40 H43 PEG_RXP0
M_ODT3 12,13

GRAPHICS
RESERVED#BG23 SB_ODT_1 LVDSA_DATA#_3 PEG_RX_0 PEG_RXP1
BF23 RESERVED#BF23 PEG_RX_1 J44
BH18 BG22 M_RCOMPP 14 GMCH_TXAOUT0+ H48 L43 PEG_RXP2
RESERVED#BH18 SM_RCOMP LVDSA_DATA_0 PEG_RX_2

1
3D3V_S0 BF18 BH21 M_RCOMPN 14 GMCH_TXAOUT1+ D45 L41 PEG_RXP3
RESERVED#BF18 SM_RCOMP# R238 LVDSA_DATA_1 PEG_RX_3 PEG_RXP4
14 GMCH_TXAOUT2+ F40 LVDSA_DATA_2 PEG_RX_4 N40
R196 1 DY 2 2K21R2F-GP CFG18 SM_RCOMP_VOH BF28 SM_RCOMP_VOH DY TP95 GMCH_TXAOUT3+B40
LVDSA_DATA_3 PEG_RX_5 P47 PEG_RXP5
BH28 SM_RCOMP_VOL DDR_VREF_S3 1KR2F-3-GP N43 PEG_RXP6
SM_RCOMP_VOL PEG_RX_6
R183 1 DY 2 4K02R2F-GP CFG19 14 GMCH_TXBOUT0- A41 T42 PEG_RXP7

2
LVDSB_DATA#_0 PEG_RX_7 PEG_RXP8
SM_VREF AV42 14 GMCH_TXBOUT1- H38 LVDSB_DATA#_1 PEG_RX_8 U42
R177 1 DY 2 4K02R2F-GP CFG20 SM_PWROK AR36 14 GMCH_TXBOUT2- G37 LVDSB_DATA#_2 PEG_RX_9 Y42 PEG_RXP9

1
BF17 SM_REXT 1 R446 2 499R2F-2-GP TP53 GMCH_TXBOUT3- J37 W47 PEG_RXP10
SM_REXT DDR3_DRAMRST# R237 LVDSB_DATA#_3 PEG_RX_10 PEG_RXP11
SM_DRAMRST# BC36 PEG_RX_11 Y37
TP50 DY 14 GMCH_TXBOUT0+ B42 AA42 PEG_RXP12
R156 1 LVDSB_DATA_0 PEG_RX_12
DY 2 2K21R2F-GP CFG3 DPLL_REF_CLK B38 DREFCLK
DREFCLK 3
1KR2F-3-GP 14 GMCH_TXBOUT1+ G38 LVDSB_DATA_1 PEG_RX_13 AD36 PEG_RXP13
A38 DREFCLK# 14 GMCH_TXBOUT2+ F37 AC48 PEG_RXP14 PEG_TXN[15..0] 41

2
DPLL_REF_CLK# DREFCLK# 3 LVDSB_DATA_2 PEG_RX_14

PCI-EXPRESS
R155 1 DY 2 2K21R2F-GP CFG4 DPLL_REF_SSCLK E41 DREFSSCLK
DREFSSCLK 3
TP52 GMCH_TXBOUT3+K37
LVDSB_DATA_3 PEG_RX_15 AD40 PEG_RXP15
F41 DREFSSCLK#
DPLL_REF_SSCLK# DREFSSCLK# 3
R185 1 DY 2 2K21R2F-GP CFG5 PEG_TX#_0 J41 GTXN0 VGA
1 2 C325 SCD1U10V2KX-5GP PEG_TXN0
F43 M46 GTXN1 VGA
1 2 C598 SCD1U10V2KX-5GP PEG_TXN1

CLK
PEG_CLK CLK_MCH_3GPLL 3 PEG_TX#_1
R168 1 DY 2 2K21R2F-GP CFG6 PEG_CLK# E43 CLK_MCH_3GPLL# 3 TV_DACA F25 TVA_DAC PEG_TX#_2 M47 GTXN2 VGA
1 2 C596 SCD1U10V2KX-5GP PEG_TXN2
TV_DACB H25 M40 GTXN3 VGA
1 2 C327 SCD1U10V2KX-5GP PEG_TXN3
R167 1 TVB_DAC PEG_TX#_3
DY 2 2K21R2F-GP CFG7 TV_DACC K25 TVC_DAC PEG_TX#_4 M42 GTXN4 VGA
1 2 C335 SCD1U10V2KX-5GP PEG_TXN4
PEG_TX#_5 R48 GTXN5 VGA
1 2 C604 SCD1U10V2KX-5GP PEG_TXN5
R178 1 DY 2 2K21R2F-GP CFG8 AE41 DMI_TXN0 H24 N38 GTXN6 VGA
1 2 C338 SCD1U10V2KX-5GP PEG_TXN6
DMI_RXN_0 DMI_TXN0 17 TV_RTN PEG_TX#_6

TV
AE37 DMI_TXN1 T40 GTXN7 VGA
1 2 C321 SCD1U10V2KX-5GP PEG_TXN7
DMI_RXN_1 DMI_TXN1 17 PEG_TX#_7
R166 1 DY 2 2K21R2F-GP CFG9 DMI_RXN_2 AE47 DMI_TXN2
DMI_TXN2 17 PEG_TX#_8 U37 GTXN8 VGA
1 2 C340 SCD1U10V2KX-5GP PEG_TXN8
AH39 DMI_TXN3 U40 GTXN9 VGA
1 2 C324 SCD1U10V2KX-5GP PEG_TXN9
DMI_RXN_3 DMI_TXN3 17 PEG_TX#_9
R173 1 DY 2 2K21R2F-GP CFG10 1 2 TV_DCONSEL0 C31 TV_DCONSEL_0 PEG_TX#_10 Y40 GTXN10 VGA
1 2 C341 SCD1U10V2KX-5GP PEG_TXN10
AE40 DMI_TXP0 R206
1 0R2J-2-GP
2 TV_DCONSEL1 E32 AA46 GTXN11 VGA
1 2 C594 SCD1U10V2KX-5GP PEG_TXN11
DMI_RXP_0 DMI_TXP0 17 0R2J-2-GP TV_DCONSEL_1 PEG_TX#_11
R158 1 DY 2 2K21R2F-GP CFG11 3,4 CPU_SEL0 T25 CFG_0 DMI_RXP_1 AE38 DMI_TXP1
DMI_TXP1 17
R218
PEG_TX#_12 AA37 GTXN12 VGA
1 2 C320 SCD1U10V2KX-5GP PEG_TXN12
3,4 CPU_SEL1 R25 AE48 DMI_TXP2 AA40 GTXN13 VGA
1 2 C344 SCD1U10V2KX-5GP PEG_TXN13
R159 1 CFG_1 DMI_RXP_2 DMI_TXP2 17 PEG_TX#_13
C DY 2 2K21R2F-GP CFG12 3,4 CPU_SEL2 P25 CFG_2 DMI_RXP_3 AH40 DMI_TXP3
DMI_TXP3 17 PEG_TX#_14 AD43 GTXN14 VGA
1 2 C329 SCD1U10V2KX-5GP PEG_TXN14 C
CFG3 P20 AC46 GTXN15 VGA
1 2 C602 SCD1U10V2KX-5GP PEG_TXN15
R160 1 CFG_3 PEG_TX#_15
DY 2 2K21R2F-GP CFG13 CFG4 P24 CFG_4 DMI_TXN_0 AE35 DMI_RXN0
DMI_RXN0 17 PEG_TXP[15..0] 41

DMI
CFG5 C25 AE43 DMI_RXN1 15 GMCH_BLUE GMCH_BLUE E28 J42 GTXP0 VGA
1 2 C326 SCD1U10V2KX-5GP PEG_TXP0
CFG_5 DMI_TXN_1 DMI_RXN1 17 CRT_BLUE PEG_TX_0
R157 1 DY 2 2K21R2F-GP CFG14 CFG6 N24 CFG_6 DMI_TXN_2 AE46 DMI_RXN2
DMI_RXN2 17 PEG_TX_1 L46 GTXP1 VGA
1 2 C599 SCD1U10V2KX-5GP PEG_TXP1
CFG7 M24 AH42 DMI_RXN3 15 GMCH_GREEN GMCH_GREEN G28 M48 GTXP2 VGA
1 2 C597 SCD1U10V2KX-5GP PEG_TXP2
CFG_7 DMI_TXN_3 DMI_RXN3 17 CRT_GREEN PEG_TX_2

CFG
R169 1 DY 2 2K21R2F-GP CFG15 CFG8 E21 CFG_8 PEG_TX_3 M39 GTXP3 VGA
1 2 C328 SCD1U10V2KX-5GP PEG_TXP3
CFG9 C23 AD35 DMI_RXP0 15 GMCH_RED GMCH_RED J28 M43 GTXP4 VGA
1 2 C336 SCD1U10V2KX-5GP PEG_TXP4
CFG_9 DMI_TXP_0 DMI_RXP0 17 CRT_RED PEG_TX_4
R180 1 DY 2 2K21R2F-GP CFG16 CFG10 C24 CFG_10 DMI_TXP_1 AE44 DMI_RXP1
DMI_RXP1 17 PEG_TX_5 R47 GTXP5 VGA
1 2 C603 SCD1U10V2KX-5GP PEG_TXP5

VGA
CFG11 N21 AF46 DMI_RXP2 G29 N37 GTXP6 VGA
1 2 C337 SCD1U10V2KX-5GP PEG_TXP6
R179 1 CFG_11 DMI_TXP_2 DMI_RXP2 17 CRT_IRTN PEG_TX_6
DY 2 2K21R2F-GP CFG17 CFG12 P21 CFG_12 DMI_TXP_3 AH43 DMI_RXP3
DMI_RXP3 17 PEG_TX_7 T39 GTXP7 VGA
1 2 C322 SCD1U10V2KX-5GP PEG_TXP7
CFG13 T21 15 GMCH_DDCCLK GMCH_DDCCLK H32 U36 GTXP8 VGA
1 2 C339 SCD1U10V2KX-5GP PEG_TXP8
CFG14 CFG_13 GMCH_DDCDATA CRT_DDC_CLK PEG_TX_8
R20 CFG_14 15 GMCH_DDCDATA J32 CRT_DDC_DATA PEG_TX_9 U39 GTXP9 VGA
1 2 C323 SCD1U10V2KX-5GP PEG_TXP9
CFG15 M20 15 GMCH_HSYNC J29 Y39 GTXP10 VGA
1 2 C342 SCD1U10V2KX-5GP PEG_TXP10
CFG16 CFG_15 CRT_HSYNC PEG_TX_10
L21 CFG_16 GFX_VID[4..0] 36 E29 CRT_TVO_IREF PEG_TX_11 Y46 GTXP11 VGA
1 2 C595 SCD1U10V2KX-5GP PEG_TXP11

GRAPHICS VID
CFG17 H21 15 GMCH_VSYNC L29 AA36 GTXP12 VGA
1 2 C319 SCD1U10V2KX-5GP PEG_TXP12
CFG18 CFG_17 CRT_VSYNC PEG_TX_12
P29 CFG_18 SB PEG_TX_13 AA39 GTXP13 VGA
1 2 C343 SCD1U10V2KX-5GP PEG_TXP13
CFG19 R28 AD42 GTXP14 VGA
1 2 C330 SCD1U10V2KX-5GP PEG_TXP14
CFG20 CFG_19 GFX_VID0 CRT_IREF PEG_TX_14
T28 CFG_20 GFX_VID_0 B33 1 2 PEG_TX_15 AD46 GTXP15 VGA
1 2 C601 SCD1U10V2KX-5GP PEG_TXP15
B32 GFX_VID1 R207 1K02R2F-1-GP
GFX_VID_1 GFX_VID2
GFX_VID_2 G33
GFX_VID3
UMA
F33 CANTIGA-GM-GP-U-NF
GFX_VID_3 GFX_VID4
17 PM_SYNC# R29 PM_SYNC# GFX_VID_4 E33
4,16,32 H_DPRSTP# 1 2 H_DPRSTP#_MCH B7 FOR Cantiga: 1.02k_1% ohm
R440 0R0402-PADPM_EXTTS#0 PM_DPRSTP#
N33 PM_EXT_TS#_0 Teenah: 1.3k ohm
3D3V_S0 PM_EXTTS#1 P32 PM_EXT_TS#_1
PM
17,32 VGATE_PWRGD 2 DY 1 PWROK_GD AT40 C34 GFXVR_EN CRT_IREF routing Trace
R234 0R2J-2-GP RSTIN# PWROK GFX_VR_EN 1.25V_1.05V_CANTIGA
AT11
RN18 1 2 NB_THERMTRIP# T20
RSTIN# width use 20 mil
17,20 PWROK THERMTRIP# UMA

2
4 1 PM_EXTTS#0 R232 0R0402-PAD PM_DPRSLPVR R32
PM_EXTTS#1 DPRSLPVR R230
3 2 2 1
17,25,26,27,28 PLT_RST1#
R152 100R2J-2-GP
CL_CLK AH37 CL_CLK0 17
1KR2F-3-GP UMA UMA
1

SRN10KJ-5-GP AH36 GMCH_BL_ON 1 2


CL_DATA CL_DATA0 17
DY C166 BG48 AN36 CLPWROK_MCH 1 R229
2 UMA-VGA R214 100KR2J-1-GP
ME

PWROK 17,20

1
SC100P50V2JN-3GP NC#BG48 CL_PWROK 0R0402-PAD GMCH_BLUE GMCH_LCDVDD_ON
BF48 AJ35 CL_RST#0 17 1 2 1 UMA 2
2

3D3V_S0 NC#BF48 CL_RST# 150R2F-1-GP


BD48 NC#BD48 CL_VREF AH34 MCH_CLVREF FOR Cantiga:500 ohm R198 R197 100KR2J-1-GP
BC48 NC#BC48 Teenah: 392 ohm UMA

1
BH47 UMA-VGA LIBG 1 2
NC#BH47

1
RN16 4,16 PM_THRMTRIP-A# 1 2 BG47 C311 R223 GMCH_GREEN 1 2 R479 2K37R2F-GP
NC#BG47 1D8V_S3 150R2F-1-GP
1 LCTLA_CLK

SCD1U10V2KX-4GP
4 17,32 PM_DPRSLPVR R164 0R0402-PAD BE47 N28 499R2F-2-GP R201
NC#BE47 DDPC_CTRLCLK
3 2 LCTLB_DATA BH46 M28 R456 1KR2F-3-GP

2
B NC#BH46 DDPC_CTRLDATA B
BF46 G36 2 1 UMA-VGA

2
NC#BF46 SDVO_CTRLCLK
NC

SRN10KJ-5-GP BG45 E36 GMCH_RED 1 2


MISC

NC#BG45 SDVO_CTRLDATA CLK_MCH_OE# SM_RCOMP_VOH R202 150R2F-1-GP


UMA BH44 NC#BH44 CLKREQ# K36 CLK_MCH_OE# 3
BH43 NC#BH43 ICH_SYNC# H36 MCH_ICH_SYNC# 17

1
BH6 C549 C552
NC#BH6 1D05V_S0 R457
BH5 NC#BH5
FOR Discrete change R97,
BG4 B12 TSATN# 1 2 3K01R2F-3-GP SCD01U16V2KX-3GP SC2D2U6D3V3MX-1-GP R101& R104 to 0 ohm

2
NC#BG4 TSATN# R447 56R2J-4-GP
BH3 NC#BH3
BF3

2
NC#BF3 SM_RCOMP_VOL
BH2 NC#BH2
BG2 B28 HDA_BCLK
NC#BG2 HDA_BCLK R186

1
BE2 B30 HDA_RST# TP56 C543 C542
3D3V_S0 NC#BE2 HDA_RST# HDA_SDI TP62 R454 TV_DACA
BG1 NC#BG1 HDA_SDI B29 2 1
BF1 C29 HDA_SDO TP108 1KR2F-3-GP SCD01U16V2KX-3GP SC2D2U6D3V3MX-1-GP UMA_DIS R187

2
NC#BF1 HDA_SDO HDA_SYNC TP132 75R2J-1-GP
BD1 NC#BD1 HDA_SYNC A28 PD
1

HDA

BC1 TP135 2 1 TV_DACB

1
R215 NC#BC1
F1 NC#F1 UMA_DIS R188
10KR2J-3-GP A47 75R2J-1-GP
NC#A47 EC98 TV_DACC
2 1
1

UMA_DIS
2

SC22P50V2JN-4GP

CANTIGA-GM-GP-U-NF DY 75R2J-1-GP
CLK_MCH_OE#
2

71.CNTIG.00U FOR Discrete change R113,


R115& R116 to 0 ohm

DIS
GMCH_HSYNC 1 2
R204 0R2J-2-GP

DY DIS
DREFCLK 1 2 GMCH_VSYNC 1 2
R228 0R2J-2-GP 3D3V_S0 R203 0R2J-2-GP

DY DIS
DREFCLK#1 2 CRT_IREF 1 2
1

R227 0R2J-2-GP DY R199 0R2J-2-GP


R659
DY 30KR2F-GP
DREFSSCLK
1 2
A R233 0R2J-2-GP A
2

GFXVR_EN GFXVR_EN 36
DY
DREFSSCLK#
1 2
2

R235 0R2J-2-GP DY
R657
100KR2F-L1-GP
1

PD Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Cantiga (2 of 6)
Size Document Number Rev

D45/D46 PD
Date: Tuesday, March 25, 2008 Sheet 7 of 47
5 4 3 2 1
5 4 3 2 1

U43D 4 OF 10 U43E 5 OF 10
M_A_DQ[63..0] M_B_DQ[63..0]
12 M_A_DQ[63..0] 12 M_B_DQ[63..0]
M_A_DQ0 AJ38 BD21 M_A_BS#0 12,13 M_B_DQ0 AK47 BC16 M_B_BS#0 12,13
M_A_DQ1 SA_DQ_0 SA_BS_0 M_B_DQ1 SB_DQ_0 SB_BS_0
AJ41 SA_DQ_1 SA_BS_1 BG18 M_A_BS#1 12,13 AH46 SB_DQ_1 SB_BS_1 BB17 M_B_BS#1 12,13
M_A_DQ2 AN38 AT25 M_A_BS#2 12,13 M_B_DQ2 AP47 BB33 M_B_BS#2 12,13
M_A_DQ3 SA_DQ_2 SA_BS_2 M_B_DQ3 SB_DQ_2 SB_BS_2
AM38 SA_DQ_3 AP46 SB_DQ_3
M_A_DQ4 AJ36 BB20 M_A_RAS# 12,13 M_B_DQ4 AJ46
M_A_DQ5 SA_DQ_4 SA_RAS# M_B_DQ5 SB_DQ_4
AJ40 SA_DQ_5 SA_CAS# BD20 M_A_CAS# 12,13 AJ48 SB_DQ_5 SB_RAS# AU17 M_B_RAS# 12,13
M_A_DQ6 AM44 AY20 M_A_WE# 12,13 M_B_DQ6 AM48 BG16 M_B_CAS# 12,13
M_A_DQ7 SA_DQ_6 SA_WE# M_B_DQ7 SB_DQ_6 SB_CAS#
AM42 SA_DQ_7 AP48 SB_DQ_7 SB_WE# BF14 M_B_WE# 12,13
D M_A_DQ8 AN43 M_B_DQ8 AU47 D
M_A_DQ9 SA_DQ_8 M_B_DQ9 SB_DQ_8
AN44 SA_DQ_9 AU46 SB_DQ_9
M_A_DQ10 AU40 M_A_DM[7..0] M_B_DQ10 BA48
SA_DQ_10 M_A_DM[7..0] 12 SB_DQ_10
M_A_DQ11 AT38 AM37 M_A_DM0 M_B_DQ11 AY48 M_B_DM[7..0]
SA_DQ_11 SA_DM_0 SB_DQ_11 M_B_DM[7..0] 12
M_A_DQ12 AN41 AT41 M_A_DM1 M_B_DQ12 AT47 AM47 M_B_DM0
M_A_DQ13 SA_DQ_12 SA_DM_1 M_A_DM2 M_B_DQ13 SB_DQ_12 SB_DM_0 M_B_DM1
AN39 SA_DQ_13 SA_DM_2 AY41 AR47 SB_DQ_13 SB_DM_1 AY47
M_A_DQ14 AU44 AU39 M_A_DM3 M_B_DQ14 BA47 BD40 M_B_DM2
M_A_DQ15 SA_DQ_14 SA_DM_3 M_A_DM4 M_B_DQ15 SB_DQ_14 SB_DM_2 M_B_DM3
AU42 SA_DQ_15 SA_DM_4 BB12 BC47 SB_DQ_15 SB_DM_3 BF35
M_A_DQ16 AV39 AY6 M_A_DM5 M_B_DQ16 BC46 BG11 M_B_DM4
M_A_DQ17 SA_DQ_16 SA_DM_5 M_A_DM6 M_B_DQ17 SB_DQ_16 SB_DM_4 M_B_DM5
AY44 SA_DQ_17 SA_DM_6 AT7 BC44 SB_DQ_17 SB_DM_5 BA3

A
M_A_DQ18 BA40 AJ5 M_A_DM7 M_B_DQ18 BG43 AP1 M_B_DM6

B
M_A_DQ19 SA_DQ_18 SA_DM_7 M_A_DQS[7..0] M_B_DQ19 SB_DQ_18 SB_DM_6 M_B_DM7
BD43 SA_DQ_19 M_A_DQS[7..0] 12 BF43 SB_DQ_19 SB_DM_7 AK2
M_A_DQ20 AV41 AJ44 M_A_DQS0 M_B_DQ20 BE45 M_B_DQS[7..0]
SA_DQ_20 SA_DQS_0 SB_DQ_20 M_B_DQS[7..0] 12
M_A_DQ21 AY43 AT44 M_A_DQS1 M_B_DQ21 BC41 AL47 M_B_DQS0
M_A_DQ22 SA_DQ_21 SA_DQS_1 M_A_DQS2 M_B_DQ22 SB_DQ_21 SB_DQS_0 M_B_DQS1
BB41 SA_DQ_22 SA_DQS_2 BA43 BF40 SB_DQ_22 SB_DQS_1 AV48

MEMORY
M_A_DQ23 M_A_DQS3 M_B_DQ23 M_B_DQS2

MEMORY
BC40 SA_DQ_23 SA_DQS_3 BC37 BF41 SB_DQ_23 SB_DQS_2 BG41
M_A_DQ24 AY37 AW12 M_A_DQS4 M_B_DQ24 BG38 BG37 M_B_DQS3
M_A_DQ25 SA_DQ_24 SA_DQS_4 M_A_DQS5 M_B_DQ25 SB_DQ_24 SB_DQS_3 M_B_DQS4
BD38 SA_DQ_25 SA_DQS_5 BC8 BF38 SB_DQ_25 SB_DQS_4 BH9
M_A_DQ26 AV37 AU8 M_A_DQS6 M_B_DQ26 BH35 BB2 M_B_DQS5
M_A_DQ27 SA_DQ_26 SA_DQS_6 M_A_DQS7 M_A_DQS#[7..0] M_B_DQ27 SB_DQ_26 SB_DQS_5 M_B_DQS6
AT36 SA_DQ_27 SA_DQS_7 AM7 M_A_DQS#[7..0] 12 BG35 SB_DQ_27 SB_DQS_6 AU1
M_A_DQ28 AY38 AJ43 M_A_DQS#0 M_B_DQ28 BH40 AN6 M_B_DQS7 M_B_DQS#[7..0]
SA_DQ_28 SA_DQS#_0 SB_DQ_28 SB_DQS_7 M_B_DQS#[7..0] 12
M_A_DQ29 BB38 AT43 M_A_DQS#1 M_B_DQ29 BG39 AL46 M_B_DQS#0
M_A_DQ30 SA_DQ_29 SA_DQS#_1 M_A_DQS#2 M_B_DQ30 SB_DQ_29 SB_DQS#_0 M_B_DQS#1
AV36 SA_DQ_30 SA_DQS#_2 BA44 BG34 SB_DQ_30 SB_DQS#_1 AV47
M_A_DQ31 AW36 BD37 M_A_DQS#3 M_B_DQ31 BH34 BH41 M_B_DQS#2
M_A_DQ32 SA_DQ_31 SA_DQS#_3 M_A_DQS#4 M_B_DQ32 SB_DQ_31 SB_DQS#_2 M_B_DQS#3
BD13 SA_DQ_32 SA_DQS#_4 AY12 BH14 SB_DQ_32 SB_DQS#_3 BH37
M_A_DQ33 AU11 BD8 M_A_DQS#5 M_B_DQ33 BG12 BG9 M_B_DQS#4
M_A_DQ34 SA_DQ_33 SA_DQS#_5 M_A_DQS#6 M_B_DQ34 SB_DQ_33 SB_DQS#_4 M_B_DQS#5
BC11 SA_DQ_34 SA_DQS#_6 AU9 BH11 SB_DQ_34 SB_DQS#_5 BC2
M_A_DQ35 BA12 AM8 M_A_DQS#7 M_B_DQ35 BG8 AT2 M_B_DQS#6
SYSTEM
M_A_DQ36 SA_DQ_35 SA_DQS#_7 M_A_A[14..0] M_B_DQ36 SB_DQ_35 SB_DQS#_6 M_B_DQS#7

SYSTEM
AU13 SA_DQ_36 M_A_A[14..0] 12,13 BH12 SB_DQ_36 SB_DQS#_7 AN5
C M_A_DQ37 AV13 BA21 M_A_A0 M_B_DQ37 BF11 M_B_A[14..0] C
SA_DQ_37 SA_MA_0 SB_DQ_37 M_B_A[14..0] 12,13
M_A_DQ38 BD12 BC24 M_A_A1 M_B_DQ38 BF8 AV17 M_B_A0
M_A_DQ39 SA_DQ_38 SA_MA_1 M_A_A2 M_B_DQ39 SB_DQ_38 SB_MA_0 M_B_A1
BC12 SA_DQ_39 SA_MA_2 BG24 BG7 SB_DQ_39 SB_MA_1 BA25
M_A_DQ40 BB9 BH24 M_A_A3 M_B_DQ40 BC5 BC25 M_B_A2
M_A_DQ41 SA_DQ_40 SA_MA_3 M_A_A4 M_B_DQ41 SB_DQ_40 SB_MA_2 M_B_A3
BA9 SA_DQ_41 SA_MA_4 BG25 BC6 SB_DQ_41 SB_MA_3 AU25
M_A_DQ42 AU10 BA24 M_A_A5 M_B_DQ42 AY3 AW25 M_B_A4
M_A_DQ43 SA_DQ_42 SA_MA_5 M_A_A6 M_B_DQ43 SB_DQ_42 SB_MA_4 M_B_A5
AV9 SA_DQ_43 SA_MA_6 BD24 AY1 SB_DQ_43 SB_MA_5 BB28
M_A_DQ44 BA11 BG27 M_A_A7 M_B_DQ44 BF6 AU28 M_B_A6
M_A_DQ45 SA_DQ_44 SA_MA_7 M_A_A8 M_B_DQ45 SB_DQ_44 SB_MA_6 M_B_A7
BD9 SA_DQ_45 SA_MA_8 BF25 BF5 SB_DQ_45 SB_MA_7 AW28
M_A_DQ46 AY8 AW24 M_A_A9 M_B_DQ46 BA1 AT33 M_B_A8
M_A_DQ47 SA_DQ_46 SA_MA_9 M_A_A10 M_B_DQ47 SB_DQ_46 SB_MA_8 M_B_A9
BA6 SA_DQ_47 SA_MA_10 BC21 BD3 SB_DQ_47 SB_MA_9 BD33
M_A_DQ48 M_A_A11 M_B_DQ48 M_B_A10
DDR

AV5 SA_DQ_48 SA_MA_11 BG26 AV2 SB_DQ_48 SB_MA_10 BB16


M_A_DQ49 M_A_A12 M_B_DQ49 M_B_A11

DDR
AV7 SA_DQ_49 SA_MA_12 BH26 AU3 SB_DQ_49 SB_MA_11 AW33
M_A_DQ50 AT9 BH17 M_A_A13 M_B_DQ50 AR3 AY33 M_B_A12
M_A_DQ51 SA_DQ_50 SA_MA_13 M_A_A14 M_B_DQ51 SB_DQ_50 SB_MA_12 M_B_A13
AN8 SA_DQ_51 SA_MA_14 AY25 AN2 SB_DQ_51 SB_MA_13 BH15
M_A_DQ52 AU5 M_B_DQ52 AY2 AU33 M_B_A14
M_A_DQ53 SA_DQ_52 M_B_DQ53 SB_DQ_52 SB_MA_14
AU6 SA_DQ_53 AV1 SB_DQ_53
M_A_DQ54 AT5 M_B_DQ54 AP3
M_A_DQ55 SA_DQ_54 M_B_DQ55 SB_DQ_54
AN10 SA_DQ_55 AR1 SB_DQ_55
M_A_DQ56 AM11 M_B_DQ56 AL1
M_A_DQ57 SA_DQ_56 M_B_DQ57 SB_DQ_56
AM5 SA_DQ_57 AL2 SB_DQ_57
M_A_DQ58 AJ9 M_B_DQ58 AJ1
M_A_DQ59 SA_DQ_58 M_B_DQ59 SB_DQ_58
AJ8 SA_DQ_59 AH1 SB_DQ_59
M_A_DQ60 AN12 M_B_DQ60 AM2
M_A_DQ61 SA_DQ_60 M_B_DQ61 SB_DQ_60
AM13 SA_DQ_61 AM3 SB_DQ_61
M_A_DQ62 AJ11 M_B_DQ62 AH3
M_A_DQ63 SA_DQ_62 M_B_DQ63 SB_DQ_62
AJ12 SA_DQ_63 AJ3 SB_DQ_63

B CANTIGA-GM-GP-U-NF CANTIGA-GM-GP-U-NF B

71.CNTIG.00U 71.CNTIG.00U

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number


Cantiga (3 of 6) Rev

D45/D46 PD
Date: Friday, March 14, 2008 Sheet 8 of 47
5 4 3 2 1

WWW.AliSaler.Com
5 4 3 2 1

7 OF 10 VCC_GFXCORE
1D8V_S3 U43G
R244
AP33 VCC_SM VCC_AXG_NCTF W28 1 2
AN33 V28 0R3-0-U-GP
VCC_SM VCC_AXG_NCTF
BH32 VCC_SM VCC_AXG_NCTF W26
BG32 V26 1D05V_S0 U43F 6 OF 10
BF32
VCC_SM VCC_AXG_NCTF
W25 VGA FOR VCC CORE
VCC_SM VCC_AXG_NCTF
BD32 VCC_SM VCC_AXG_NCTF V25
BC32 VCC_SM VCC_AXG_NCTF W24 AG34 VCC
BB32 VCC_SM VCC_AXG_NCTF V24 AC34 VCC
BA32 VCC_SM VCC_AXG_NCTF W23 AB34 VCC
C265 C228 C266

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AY32 VCC_SM VCC_AXG_NCTF V23 AA34 VCC

1
VCC_GFXCORE

C273

C261

C248

C281
AW32 VCC_SM VCC_AXG_NCTF AM21 Y34 VCC

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP
AV32 VCC_SM VCC_AXG_NCTF AL21 V34 VCC
AU32 AK21 U34

2
VCC_SM VCC_AXG_NCTF VCC
D AT32 VCC_SM VCC_AXG_NCTF W21 AM33 VCC D

SC1U10V2KX-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
SCD47U6D3V2KX-GP
AR32 VCC_SM VCC_AXG_NCTF V21 AK33 VCC

SCD22U10V2KX-1GP
1

1
C190

C189

C222

C230

C186
C246 C197 C191 C204 C227 C207 C226 1

POWER
AP32 VCC_SM VCC_AXG_NCTF U21 AJ33 VCC

1
AN32 VCC_SM VCC_AXG_NCTF AM20 AG33 VCC

SC10U6D3V5MX-3GP
SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP
BH31 AK20 2 AF33

2
VCC_SM VCC_AXG_NCTF VCC
BG31 W20

2
VCC_SM VCC_AXG_NCTF
BF31 VCC_SM VCC_AXG_NCTF U20 Coupling CAP 370 mils from the Edge AE33 VCC

VCC CORE
BG30 VCC_SM VCC_AXG_NCTF AM19 AC33 VCC
BH29 VCC_SM VCC_AXG_NCTF AL19 AA33 VCC
BG29 VCC_SM VCC_AXG_NCTF AK19 Y33 VCC
BF29 VCC_SM VCC_AXG_NCTF AJ19 W33 VCC
BD29 VCC_SM VCC_AXG_NCTF AH19 V33 VCC

VCC SM
BC29 VCC_SM VCC_AXG_NCTF AG19 Coupling CAP U33 VCC
BB29 VCC_SM VCC_AXG_NCTF AF19 AH28 VCC
BA29 VCC_SM VCC_AXG_NCTF AE19 Place on the Edge AF28 VCC

SCD1U10V2KX-4GP
AY29 VCC_SM VCC_AXG_NCTF AB19 AC28 VCC

C253
AW29 AA19 C267 AA28
VCC_SM VCC_AXG_NCTF VCC
AV29 VCC_SM VCC_AXG_NCTF Y19 AJ26 VCC

SC10U6D3V5MX-3GP
AU29 W19 AG26

2
VCC_SM VCC_AXG_NCTF VCC
AT29 VCC_SM VCC_AXG_NCTF V19 AE26 VCC
AR29 VCC_SM VCC_AXG_NCTF U19 AC26 VCC
AP29 VCC_SM VCC_AXG_NCTF AM17 AH25 VCC
AK17 VCC_GFXCORE AG25
VCC_AXG_NCTF VCC
BA36 VCC_SM/NC VCC_AXG_NCTF AH17 AF25 VCC
BB24 VCC_SM/NC VCC_AXG_NCTF AG17 AG24 VCC

POWER
SCD1U10V2KX-4GP
BD16 AF17 Coupling CAP AJ23
VCC GFX NCTF

VCC_SM/NC VCC_AXG_NCTF VCC

1
1D05V_S0

C350
BB21 VCC_SM/NC VCC_AXG_NCTF AE17 NEAR RN39 AH23 VCC
AW16 VCC_SM/NC VCC_AXG_NCTF AC17 AF23 VCC
AW13 AB17 AM32

2
VCC_SM/NC VCC_AXG_NCTF VCC_NCTF
AT13 VCC_SM/NC VCC_AXG_NCTF Y17 1 R220 2VCC_GMCH_35 T32 VCC VCC_NCTF AL32
W17 0R0402-PAD AK32
VCC_GFXCORE VCC_AXG_NCTF VCC_NCTF
VCC_AXG_NCTF V17 VCC_NCTF AJ32
VCC_AXG_NCTF AM16 VCC_NCTF AH32
Y26 VCC_AXG VCC_AXG_NCTF AL16 VCC_NCTF AG32
AE25 VCC_AXG VCC_AXG_NCTF AK16 VCC_NCTF AE32
AB25 VCC_AXG VCC_AXG_NCTF AJ16 VCC_NCTF AC32
AA25 VCC_AXG VCC_AXG_NCTF AH16 VCC_NCTF AA32
AE24 VCC_AXG VCC_AXG_NCTF AG16 VCC_NCTF Y32
AC24 VCC_AXG VCC_AXG_NCTF AF16 VCC_NCTF W32
AA24 VCC_AXG VCC_AXG_NCTF AE16 VCC_NCTF U32
Y24 VCC_AXG VCC_AXG_NCTF AC16 VCC_NCTF AM30
C AE23 VCC_AXG VCC_AXG_NCTF AB16 VCC_NCTF AL30 C
AC23 VCC_AXG VCC_AXG_NCTF AA16 VCC_NCTF AK30
AB23 VCC_AXG VCC_AXG_NCTF Y16 VCC_NCTF AH30
AA23 VCC_AXG VCC_AXG_NCTF W16 VCC_NCTF AG30
AJ21 VCC_AXG VCC_AXG_NCTF V16 VCC_NCTF AF30
AG21 VCC_AXG VCC_AXG_NCTF U16 VCC_NCTF AE30
AE21 VCC_AXG VCC_NCTF AC30
AC21 VCC_AXG
Place CAP where VCC_NCTF AB30
AA21 VCC_AXG LVDS and DDR2 taps VCC_NCTF AA30
Y21 VCC_AXG VCC_NCTF Y30
AH20 VCC_AXG VCC_NCTF W30

VCC NCTF
AF20 VCC_AXG FOR VCC SM VCC_NCTF V30
AE20 VCC_AXG VCC_NCTF U30
AC20 1D8V_S3 AL29
VCC_AXG VCC_NCTF
AB20 VCC_AXG VCC_NCTF AK29
AA20 VCC_AXG
SCD1U10V2KX-4GP
VCC_NCTF AJ29

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
T17 VCC_AXG VCC_NCTF AH29
1

1
C252

C282

C215
T16 TC21 C254 C255 AG29
VCC_AXG VCC_NCTF

ST330U6VDM-2-GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP
AM15 VCC_AXG VCC_NCTF AE29
AL15 AC29
2

2
VCC_AXG VCC_NCTF
AE15 VCC_AXG VCC_NCTF AA29
AJ15 VCC_AXG VCC_NCTF Y29
AH15 VCC_AXG VCC_NCTF W29
AG15 VCC_AXG VCC_NCTF V29
AF15 VCC_AXG VCC_NCTF AL28
AB15 VCC_AXG VCC_NCTF AK28
AA15 VCC_AXG
Place on the Edge VCC_NCTF AL26
VCC GFX

Y15 VCC_AXG VCC_NCTF AK26


V15 VCC_AXG VCC_NCTF AK25
U15 VCC_AXG VCC_NCTF AK24
AN14 VCC_AXG VCC_NCTF AK23
AM14 VCC_AXG
U14 VCC_AXG VCC_SM_LF AV44 SM_LF1_GMCH
VCC SM LF

T14 VCC_AXG VCC_SM_LF BA37 SM_LF2_GMCH CANTIGA-GM-GP-U-NF


VCC_SM_LF AM40 SM_LF3_GMCH
VCC_SM_LF AV21 SM_LF4_GMCH 71.CNTIG.00U
VCC_SM_LF AY5 SM_LF5_GMCH
VCC_SM_LF AM10 SM_LF6_GMCH
VCC_SM_LF BB13 SM_LF7_GMCH
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C312 C303 C313


1

1
C178

C170

SC1U10V2KX-1GP

SC1U10V2KX-1GP

C147 C216 1
SCD47U16V2ZY-GP

B
SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

AJ14 B
36 VCC_AXG_SENSE VCC_AXG_SENSE 2
AH14
2

36 VSS_AXG_SENSE VSS_AXG_SENSE

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

U93 close to U3

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Cantiga (4 of 6)
Size Document Number Rev

D45/D46 PD
Date: Monday, March 24, 2008 Sheet 9 of 47
5 4 3 2 1
5 4 3 2 1

5V_S0 Imax = 300 mA 3D3V_S0_DAC 73mA 1D05V_S0


3D3V_S0_DAC UMA L28
1 3D3V_CRTDAC_S0

SCD1U10V2KX-4GP
U43H 8 OF 10

SC2D2U6D3V3MX-1-GP
U39 2

SCD1U10V2KX-4GP
HCB1608K-181T20GP C550 C551

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SCD47U6D3V2KX-GP
1

1
C149

C514

C518

C512

C163

C175
R459 1

SCD01U16V2KX-3GP
1 5 UMA U13
2
VIN
GND
VOUT
UMA 0R2J-2-GP
VTT
VTT T13 TC17 852mA
3 4 B27 U12 2 ST220U6D3VDM-15GP
VGA

2
EN/EN# NC#4 SC4D7U6D3V3KX-GP VCCA_CRT_DAC VTT
A26 T12

2
VCCA_CRT_DAC VTT
SC1U16V3ZY-GP

SC1U16V3ZY-GP
VTT U11
1

1
RT9198-33PBR-GP C784 T11
BC1 74.09198.G7F BC2 M_VCCA_DAC_BG VTT
A25 U10
2.68mA

CRT
3D3V_S0_DAC VCCA_DAC_BG VTT
D B25 T10 D
2

2
L27 VSSA_DAC_BG VTT
UMA UMA VTT U9
M_VCCA_DAC_BG

SCD1U10V2KX-4GP
2 1 VTT T9
C546 C545 U8
VTT

1
M_VCCA_DPLLA

SCD01U16V2KX-3GP
HCB1608K-181T20GP UMA F47 T8
R455 VCCA_DPLLA VTT
U7

VTT
1D05V_S0 1.25V_1.05V_CANTIGA M_VCCA_DPLLB VTT
0R2J-2-GP L48 T7

2
VCCA_DPLLB VTT 1D05V_S0
UMA VGA VTT U6
1 R126
2 M_VCCA_HPLL AD1 T6 D21

PLL
2
0R0603-PAD VCCA_HPLL VTT 3D3V_S0 3D3V_HV_S0
VTT U5 1
M_VCCA_MPLL AE1 T5 10R2J-2-GP
1D8V_TXLVDS_S3 VCCA_MPLL VTT 1D05V_HV_S0 2

SCD1U10V2KX-4GP
R481 V3 2 1 2 R470
1
1.25V_1.05V_CANTIGA 0R2J-2-GP VTT R471 0R0402-PAD
1 2 U3
65mA VTT

C565
C606 UMA UMA 1D8V_TXLVDS
J48 V2 3
R638 VCCA_LVDS VTT
UMA UMA UMA UMA U2
13.2mA

A LVDS
M_VCCA_DPLLA VTT
SCD1U10V2KX-4GP

2 R240 1 SC1KP50V2KX-1GP 0R2J-2-GP J47 T2 BAT54-7-F-GP

2
0R3-0-U-GP VSSA_LVDS VTT
VGA VTT V1
1

2
C331 C316 C317 1D5V_S0 U1

2
VTT
SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

R236
0R2J-2-GP 1 R488 2 VCCA_PEG_BG AD48
2

0R2J-2-GP VCCA_PEG_BG
VGA

1
C614
65mA
1

UMA SCD1U10V2KX-4GP 1.25V_1.05V_CANTIGA


50mA

A PEG
2 R486 1 M_VCCA_DPLLB 1.25V_1.05V_CANTIGA
322mA

2
1D05V_RUN_PEGPLL
SCD1U10V2KX-4GP

0R3-0-U-GP AA48 2 R448


1
VCCA_PEG_PLL
1

C610 C600 1 R128


2 1D05V_SM 0R0603-PAD
2
SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

C532

SC1U10V3KX-3GP
C609 0R0603-PAD

1
C214

C199
SC1U10V3KX-3GP

SC1U10V3KX-3GP
R484 C133 C139 C194 AR20
2

VCCA_SM

1
SC4D7U6D3V3KX-GP
PD 0R2J-2-GP AP20 C534
480mA DY SC22U6D3V5MX-L2GP
VCCA_SM

SC22U6D3V5MX-L2GP
C AN20 SC10U6D3V5MX-3GP C
VGA
POWER

2
VCCA_SM
UMA AR17
1

2
VCCA_SM
UMA UMA AP17 VCCA_SM
AN17 VCCA_SM
1.25V_1.05V_CANTIGA AT16 VCCA_SM
AR16

A SM
VCCA_SM
1

AP16 VCCA_SM
R429
0R0603-PAD1D05V_SUS_MCH_PLL2 1.25V_1.05V_CANTIGA

1 R184
2 1D05V_SM_CK
2

SCD1U10V2KX-4GP
120ohm 100MHz 0R0603-PAD
24mA
1

1
1D8V_SUS_SM_CK 1D8V_S3

C251
C238
1
SC4D7U6D3V3KX-GP

L23 2 M_VCCA_HPLL C247 SC2D2U6D3V3MX-1-GP


1 AP28
24mA VCCA_SM_CK 200mA
SC22U6D3V5MX-L2GP

FCM1608KF-1-GP AN28 B22 2 R451


1
2

2
VCCA_SM_CK VCC_AXF
1

C515 C517 DY AP25 B21 0R0603-PAD

AXF
2

VCCA_SM_CK VCC_AXF

SCD1U10V2KX-4GP
SCD1U10V2KX-4GP AN25 A21 C528
VCCA_SM_CK VCC_AXF

C531
AN24 1 R449 2 1 2
2

VCCA_SM_CK 1R2F-GP
AM28 VCCA_SM_CK_NCTF
AM26 SC10U6D3V5MX-3GP

A CK

2
VCCA_SM_CK_NCTF
AM25
1 L22 2 M_VCCA_MPLL 139.2mA AL25
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF VCC_SM_CK BF21
FCM1608KF-1-GP AM24 BH20

SM CK
VCCA_SM_CK_NCTF VCC_SM_CK
1

C516 3D3V_S0_DAC 3D3VTVDAC


120ohm 100MHz AL24 VCCA_SM_CK_NCTF VCC_SM_CK BG20
1D8V_TXLVDS_S3 1D8V_S3
C513 SCD1U10V2KX-4GP L26 UMA AM23 BF20 R480
SC10U6D3V5MX-3GP VCCA_SM_CK_NCTF VCC_SM_CK 0R3-0-U-GP
2 1 AL23
119mA
2

VCCA_SM_CK_NCTF
SCD1U10V2KX-4GP

HCB1608K-181T20GP C538 2 UMA 1


1

180ohm 100MHz UMA

2
R453 K47 3D3V_HV_S0 C593
B 1.25V_1.05V_CANTIGA VCC_TX_LVDS B

SC22U6D3V5MX-L2GP
0R2J-2-GP B24 C607 R482
106mA
2

1D5V_S0 VCCA_TV_DAC SC1KP50V2KX-1GP


220ohm 100MHz A24 C35 0R2J-2-GP

TV
VGA

2
VCCA_TV_DAC VCC_HV
B35

HV
VGA
1

L8 R468 2 VCC_HDA VCC_HV


1
50mA A35 UMA

1
1D05V_RUN_PEGPLL 0R2J-2-GP VCC_HV
1 2 UMA
2

BLM18BB221SN1D-GP VCC_HDA A32 1D05V_S0


UMA C561 VCC_HDA
1

HDA
R467 V48
VCC_PEG 1782mA
1

SCD1U10V2KX-4GP

C334

SC4D7U6D3V3KX-GP
0R2J-2-GP VCC_PEG U48
SCD1U10V2KX-4GP V47

PEG
VGA
2

VCC_PEG

1
C621
UMA U47 C623 C624 C628

D TV/CRT
2

VCC_PEG

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP
1D5VRUN_TVDAC M25 U46
VCCD_TVDAC VCC_PEG

2
1D05V_SUS_MCH_PLL2 1D5VRUN_QDAC L28 VCCD_QDAC
VCC_DMI AH48
AF1 AF48 1D05V_S0

DMI
VCCD_HPLL VCC_DMI
AH47
1D5V_S0 58.7mA 157.2mA 1D05V_RUN_PEGPLLAA47
VCCD_PEG_PLL
VCC_DMI
VCC_DMI AG47 456mA
1

SCD1U10V2KX-4GP
C145 C333

1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

2 R189
1 1D5VRUN_TVDAC C612 C618 C615
0R0603-PAD 50mA M38

VTTLF
2

VCCD_LVDS
1

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP
LVDS

C235 C237 L37 A8 VTTLF1

2
VCCD_LVDS VTTLF VTTLF2
VTTLF L1
SCD01U16V2KX-3GP SCD1U10V2KX-4GP AB2 VTTLF3
2

VTTLF

CANTIGA-GM-GP-U-NF

SCD47U6D3V2KX-GP

SCD47U6D3V2KX-GP

SCD47U6D3V2KX-GP
1D8V_S3

C141

C144

C522
1 1 1
L5 UMA UMA 71.CNTIG.00U
A 1 2 1D5VRUN_QDAC SC4D7U6D3V3KX-GP 2 R231 11D8V_SUS_DLVDS 2 2 2 ZZZZ A
HCB1608K-181T20GP 0R3-0-U-GP
1

180ohm 100MHz C250 C249 C785 C304


60.3mA
SCD1U10V2KX-4GP

UMA UMA R195 UMA UMA C301


SC10U6D3V5MX-3GP Wistron Corporation
SCD1U10V2KX-4GP

SCD01U16V2KX-3GP 0R2J-2-GP 0R2J-2-GP


1 2
2

VGA 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


VGA R224 Taipei Hsien 221, Taiwan, R.O.C.
1

Title
UMA Cantiga (5 of 6)
Size Document Number Rev
A3 PD
D45/D46
Date: Monday, March 17, 2008 Sheet 10 of 47
5 4 3 2 1

WWW.AliSaler.Com
5 4 3 2 1

U43I 9 OF 10 U43J 10 OF 10
BG21 VSS VSS AH8
AU48 VSS VSS AM36 L12 VSS VSS Y8
AR48 VSS VSS AE36 AW21 VSS VSS L8
AL48 VSS VSS P36 AU21 VSS VSS E8
BB47 VSS VSS L36 AP21 VSS VSS B8
AW47 VSS VSS J36 AN21 VSS VSS AY7
AN47 VSS VSS F36 AH21 VSS VSS AU7
AJ47 VSS VSS B36 AF21 VSS VSS AN7
D AF47 VSS VSS AH35 AB21 VSS VSS AJ7 D
AD47 VSS VSS AA35 R21 VSS VSS AE7
AB47 VSS VSS Y35 M21 VSS VSS AA7
Y47 VSS VSS U35 J21 VSS VSS N7
T47 VSS VSS T35 G21 VSS VSS J7
N47 VSS VSS BF34 BC20 VSS VSS BG6
L47 VSS VSS AM34 BA20 VSS VSS BD6
G47 VSS VSS AJ34 AW20 VSS VSS AV6
BD46 VSS VSS AF34 AT20 VSS VSS AT6
BA46 VSS VSS AE34 AJ20 VSS VSS AM6
AY46 VSS VSS W34 AG20 VSS VSS M6
AV46 VSS VSS B34 Y20 VSS VSS C6
AR46 VSS VSS A34 N20 VSS VSS BA5
AM46 VSS VSS BG33 K20 VSS VSS AH5
V46 VSS VSS BC33 F20 VSS VSS AD5
R46 VSS VSS BA33 C20 VSS VSS Y5
P46 VSS VSS AV33 A20 VSS VSS L5
H46 VSS VSS AR33 BG19 VSS VSS J5
F46 VSS VSS AL33 A18 VSS VSS H5
BF44 VSS VSS AH33 BG17 VSS VSS F5
AH44 VSS VSS AB33 BC17 VSS VSS BE4
AD44 VSS VSS P33 AW17 VSS
AA44 L33 AT17 BC3
Y44
U44
VSS
VSS
VSS
VSS
VSS
VSS
H33
N32
R17
M17
VSS
VSS
VSS
VSS VSS
VSS
VSS
AV3
AL3
T44 K32 H17 R3
M44
F44
VSS
VSS
VSS
VSS VSS
VSS
VSS
F32
C32
C17
VSS
VSS
VSS
VSS
VSS
P3
F3
BC43 VSS VSS A31 BA16 VSS VSS BA2
C AV43 AN29 AW2 C
VSS VSS VSS
AU43 VSS VSS T29 AU16 VSS VSS AU2
AM43 VSS VSS N29 AN16 VSS VSS AR2
J43 VSS VSS K29 N16 VSS VSS AP2
C43 VSS VSS H29 K16 VSS VSS AJ2
BG42 VSS VSS F29 G16 VSS VSS AH2
AY42 VSS VSS A29 E16 VSS VSS AF2
AT42 VSS VSS BG28 BG15 VSS VSS AE2
AN42 VSS VSS BD28 AC15 VSS VSS AD2
AJ42 VSS VSS BA28 W15 VSS VSS AC2
AE42 VSS VSS AV28 A15 VSS VSS Y2
N42 VSS VSS AT28 BG14 VSS VSS M2
L42 VSS VSS AR28 AA14 VSS VSS K2
BD41 VSS VSS AJ28 C14 VSS VSS AM1
AU41 VSS VSS AG28 BG13 VSS VSS AA1
AM41 VSS VSS AE28 BC13 VSS VSS P1
AH41 VSS VSS AB28 BA13 VSS VSS H1
AD41 VSS VSS Y28
AA41 VSS VSS P28 VSS U24
Y41 VSS VSS K28 AN13 VSS VSS U28
U41 VSS VSS H28 AJ13 VSS VSS U25
T41 VSS VSS F28 AE13 VSS VSS U29
M41 VSS VSS C28 N13 VSS
G41 VSS VSS BF26 L13 VSS
B41 VSS VSS AH26 G13 VSS VSS_NCTF AF32
BG40 VSS VSS AF26 E13 VSS VSS_NCTF AB32
BB40 VSS VSS AB26 BF12 VSS VSS_NCTF V32
AV40 VSS VSS AA26 AV12 VSS VSS_NCTF AJ30
AN40 VSS VSS C26 AT12 VSS VSS_NCTF AM29
B B
H40 VSS VSS B26 AM12 VSS VSS_NCTF AF29
E40 BH25 AA12 AB29

VSS NCTF
VSS VSS VSS VSS_NCTF
AT39 VSS VSS BD25 J12 VSS VSS_NCTF U26
AM39 VSS VSS BB25 A12 VSS VSS_NCTF U23
AJ39 VSS VSS AV25 BD11 VSS VSS_NCTF AL20
AE39 VSS VSS AR25 BB11 VSS VSS_NCTF V20
N39 VSS VSS AJ25 AY11 VSS VSS_NCTF AC19
L39 VSS VSS AC25 AN11 VSS VSS_NCTF AL17
B39 VSS VSS Y25 AH11 VSS VSS_NCTF AJ17
BH38 VSS VSS N25 VSS_NCTF AA17
BC38 VSS VSS L25 Y11 VSS VSS_NCTF U17
BA38 VSS VSS J25 N11 VSS

A3,C1,A48,BH1,BH48
AU38 VSS VSS G25 G11 VSS
AH38 VSS VSS E25 C11 VSS NCTF_VSS_SCB#BH48 BH48 TP99

NCTF TEST PIN:


AD38 BF24 BG10 BH1 TP91

VSS SCB
VSS VSS VSS NCTF_VSS_SCB#BH1
AA38 VSS VSS AD12 AV10 VSS NCTF_VSS_SCB#A48 A48 TP98
Y38 VSS VSS AY24 AT10 VSS NCTF_VSS_SCB#C1 C1 TP89
U38 VSS VSS AT24 AJ10 VSS NCTF_VSS_SCB#A3 A3 TP90
T38 VSS VSS AJ24 AE10 VSS
J38 VSS VSS AH24 AA10 VSS NC#E1 E1
F38 VSS VSS AF24 M10 VSS NC#D2 D2
C38 VSS VSS AB24 BF9 VSS NC#C3 C3
BF37 VSS VSS R24 BC9 VSS NC#B4 B4
BB37 VSS VSS L24 AN9 VSS NC#A5 A5
AW37 VSS VSS K24 AM9 VSS NC#A6 A6
AT37 VSS VSS J24 AD9 VSS NC#A43 A43
AN37 VSS VSS G24 G9 VSS NC#A44 A44
AJ37 F24 B9 B45

NC
VSS VSS VSS NC#B45
A H37 VSS VSS E24 BH8 VSS NC#C46 C46 A
C37 VSS VSS BH23 BB8 VSS NC#D47 D47
BG36 VSS VSS AG23 AV8 VSS NC#B47 B47
BD36
AK15
VSS
VSS
VSS
VSS
Y23
B23
AT8 VSS NC#A46
NC#F48
A46
F48 Wistron Corporation
AU36 A23 E48 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VSS VSS NC#E48 Taipei Hsien 221, Taiwan, R.O.C.
VSS AJ6 NC#C48 C48
NC#B48 B48
Title
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
Size Document Number
Cantiga (6 of 6) Rev
71.CNTIG.00U
71.CNTIG.00U D45/D46 PD
Date: Friday, March 14, 2008 Sheet 11 of 47
5 4 3 2 1
A
B
C
D

SB

K2
DDR_VREF_S3_TP
SB

K3
1

TPAD79
DY
DY

TPAD79
K1
1 1 2 1 2 1 2

1
1
1D8V_S3
DDR_VREF_S3_TP

TPAD79

DDR_VREF_S3_TP

2
2
1
1

R614
R610
R245
DDR_VREF_S3_1

SMBD_ICH
SMBC_ICH
0R2J-2-GP
0R2J-2-GP
2
2
0R3-0-U-GP

DDR_VREF_S3_TP

K4
C354 SCD1U16V2ZY-2GP
7,13
7,13
8,13
8,13
8,13
7,13
7,13
7,13
7,13

5
5

C356 SC2D2U6D3V3MX-1-GP

TPAD79
C353 SCD1U16V2ZY-2GP

DM2

62.10017.A71
C355 SC2D2U6D3V3MX-1-GP

DDR2-200P-23-GP-U1
7,13
7,13

DM1

M_A_WE#
M_A_CAS#
M_A_RAS#
M_CKE1
M_CKE0
M_CS1#
M_CS0#

M_ODT1
M_ODT0
DDR2-200P-22-GP-U2
62.10017.A61
202 GND GND 201

196 VSS VREF 1 MH2 MH2 MH1 MH1


M_ODT3
M_ODT2

193

DDR_VREF_S3_TP
VSS
190 VSS ODT1 119 201 GND GND 202
187 VSS ODT0 114
184 VSS 196 VSS VSS 2
183 VSS SDA 195 193 VSS VREF 1
178 VSS SCL 197 190 VSS
177 VSS 187 VSS OTD1 119
172 VSS WE# 109 184 VSS OTD0 114
171 VSS CAS# 113 183 VSS
168 VSS RAS# 108 178 VSS DQS7 188 M_B_DQS7
165 VSS CKE1 80 177 VSS DQS6 169 M_B_DQS6
162 VSS CKE0 79 172 VSS DQS5 148 M_B_DQS5
161 VSS CS1# 115 171 VSS DQS4 131 M_B_DQS4
156 VSS CS0# 110 168 VSS DQS3 70 M_B_DQS3
155 VSS 165 VSS DQS2 51 M_B_DQS2
150 VSS NC#163/TEST 163 162 VSS DQS1 31 M_B_DQS1
149 VSS NC#120 120 161 VSS DQS0 13 M_B_DQS0
145 VSS NC#83 83 156 VSS
144 VSS NC#69 69 155 VSS DQS7# 186 M_B_DQS#7
139 VSS NC#50 50 150 VSS DQS6# 167 M_B_DQS#6
138 VSS 149 VSS DQS5# 146 M_B_DQS#5
133 VSS DQ63 194 M_A_DQ63 145 VSS DQS4# 129 M_B_DQS#4
132 VSS DQ62 192 M_A_DQ62 144 VSS DQS3# 68 M_B_DQS#3
128 VSS DQ61 182 M_A_DQ61 139 VSS DQS2# 49 M_B_DQS#2
127 VSS DQ60 180 M_A_DQ60 138 VSS DQS1# 29 M_B_DQS#1
122 VSS DQ59 191 M_A_DQ59 133 VSS DQS0# 11 M_B_DQS#0
121 VSS DQ58 189 M_A_DQ58 132 VSS
78 VSS DQ57 181 M_A_DQ57 128 VSS DQ63 194 M_B_DQ63
77 VSS DQ56 179 M_A_DQ56 127 VSS DQ62 192 M_B_DQ62
72 VSS DQ55 176 M_A_DQ55 122 VSS DQ61 182 M_B_DQ61
71 VSS DQ54 174 M_A_DQ54 121 VSS DQ60 180 M_B_DQ60
66 VSS DQ53 160 M_A_DQ53 78 VSS DQ59 191 M_B_DQ59
65 VSS DQ52 158 M_A_DQ52 77 VSS DQ58 189 M_B_DQ58
60 175 2 1 2 1 72 181

WWW.AliSaler.Com
VSS DQ51 M_A_DQ51 VSS DQ57 M_B_DQ57
59 VSS DQ50 173 M_A_DQ50 71 VSS DQ56 179 M_B_DQ56
2 1 2 1 54 159 66 176
DY
DY

VSS DQ49 M_A_DQ49 VSS DQ55 M_B_DQ55


C351
C138

53 157 65 174

4
4

VSS DQ48 M_A_DQ48 VSS DQ54 M_B_DQ54


48 154 60 160

DY
DY
VSS DQ47 M_A_DQ47 VSS DQ53 M_B_DQ53

C137
C349
47 VSS DQ46 152 M_A_DQ46 59 VSS DQ52 158 M_B_DQ52
42 142 54 175
DDR

VSS DQ45 M_A_DQ45 VSS DQ51 M_B_DQ51


41 VSS DQ44 140 M_A_DQ44 53 VSS DQ50 173 M_B_DQ50
M_CLK_DDR2
M_CLK_DDR3

40 153 48 159
M_CLK_DDR#2
M_CLK_DDR#3

VSS DQ43 M_A_DQ43 VSS DQ49 M_B_DQ49


SC10P50V2JN-4GP
SC10P50V2JN-4GP

39 VSS DQ42 151 M_A_DQ42 47 VSS DQ48 157 M_B_DQ48

M_CLK_DDR1
M_CLK_DDR0
34 143 42 154
Place near DM1

M_CLK_DDR#1
M_CLK_DDR#0
VSS DQ41 M_A_DQ41 VSS DQ47 M_B_DQ47

SC10P50V2JN-4GP
SC10P50V2JN-4GP
33 VSS DQ40 141 M_A_DQ40 41 VSS DQ46 152 M_B_DQ46
28 136 40 142

Place near DM2


VSS DQ39 M_A_DQ39 VSS DQ45 M_B_DQ45
27 VSS DQ38 134 M_A_DQ38 39 VSS DQ44 140 M_B_DQ44
24 VSS DQ37 126 M_A_DQ37 34 VSS DQ43 153 M_B_DQ43
21 VSS DQ36 124 M_A_DQ36 33 VSS DQ42 151 M_B_DQ42
18 VSS DQ35 137 M_A_DQ35 28 VSS DQ41 143 M_B_DQ41
15 VSS DQ34 135 M_A_DQ34 27 VSS DQ40 141 M_B_DQ40

K5
12 VSS DQ33 125 M_A_DQ33 24 VSS DQ39 136 M_B_DQ39
9 123 21 134

D45 46 use
VSS DQ32 M_A_DQ32 VSS DQ38 M_B_DQ38
8 76 18 126

TPAD79
VSS DQ31 M_A_DQ31 VSS DQ37 M_B_DQ37
3 VSS DQ30 74 M_A_DQ30 15 VSS DQ36 124 M_B_DQ36
2 VSS DQ29 64 M_A_DQ29 12 VSS DQ35 137 M_B_DQ35
DQ28 62 M_A_DQ28 9 VSS DQ34 135 M_B_DQ34
118 VDD DQ27 75 M_A_DQ27 8 VSS DQ33 125 M_B_DQ33
117 VDD DQ26 73 M_A_DQ26 3 VSS DQ32 123 M_B_DQ32

1D8V_S3
3D3V_S0

112 VDD DQ25 63 DQ31 76


SOCKET

M_A_DQ25 M_B_DQ31
3D3V_S0

111 VDD DQ24 61 M_A_DQ24 118 VDD DQ30 74 M_B_DQ30


104 VDD DQ23 58 M_A_DQ23 117 VDD DQ29 64 M_B_DQ29
SC2D2U6D3V3MX-1-GP
1D8V_S3

103 VDD DQ22 56 M_A_DQ22 112 VDD DQ28 62 M_B_DQ28


C123

96 VDD DQ21 46 M_A_DQ21 111 VDD DQ27 75 M_B_DQ27


95 44 2 1 104 73
1

VDD DQ20 M_A_DQ20 VDD DQ26 M_B_DQ26

3D3V_S0
SC2D2U6D3V3MX-1-GP
88 VDD DQ19 57 M_A_DQ19 103 VDD DQ25 63 M_B_DQ25

C126
87 VDD DQ18 55 M_A_DQ18 96 VDD DQ24 61 M_B_DQ24
C124
R116

2 1 82 VDD DQ17 45 M_A_DQ17 95 VDD DQ23 58 M_B_DQ23


81 43 2 1 88 56

62.10017.G31
SCD1U16V2ZY-2GP VDD DQ16 M_A_DQ16 VDD DQ22 M_B_DQ22
38 87 46
2

10KR2J-3-GP

DQ15 M_A_DQ15 VDD DQ21 M_B_DQ21

C128
DQ14 36 M_A_DQ14 82 VDD DQ20 44 M_B_DQ20
2 1 199 VDD_SPD DQ13 22 M_A_DQ13 81 VDD DQ19 57 M_B_DQ19
DQ12 20 DQ18 55
3,19 SMBD_ICH
3,19 SMBC_ICH

M_A_DQ12 M_B_DQ18
200 SA1 DQ11 37 M_A_DQ11 DQ17 45 M_B_DQ17
198 SA0 DQ10 35 M_A_DQ10 163 NC#163/TEST DQ16 43 M_B_DQ16
DQ9 25 120 NC#120 DQ15 38
8,13
8,13
8,13

M_A_DQ9 M_B_DQ15
166 CK1# DQ8 23 M_A_DQ8 83 NC#83 DQ14 36 M_B_DQ14
DIM_SA1

164 16 69 22
SCD1U16V2ZY-2GP

CK1 DQ7 M_A_DQ7 NC#69 DQ13 M_B_DQ13


32 CK0# DQ6 14 M_A_DQ6 50 NC#50 DQ12 20 M_B_DQ12
30 CK0 DQ5 6 M_A_DQ5 DQ11 37 M_B_DQ11
DQ4 4 M_A_DQ4 200 SA1 DQ10 35 M_B_DQ10
M_A_DM7 185 DM7 DQ3 19 M_A_DQ3 198 SA0 DQ9 25 M_B_DQ9
M_A_BS#1
M_A_BS#0
M_A_BS#2

170 DM6 DQ2 17 DQ8 23


8,13
8,13
8,13

M_A_DM6 M_A_DQ2 M_B_DQ8


147 7 199 16

3
3

M_A_DM5 DM5 DQ1 M_A_DQ1 VDDSPD DQ7 M_B_DQ7


M_A_DM4 130 DM4 DQ0 5 M_A_DQ0 DQ6 14 M_B_DQ6
M_A_DM3 67 DM3 197 SCL DQ5 6 M_B_DQ5
52 106 195 4
7
7
7
7

M_A_DM2 DM2 BA1 SDA DQ4 M_B_DQ4


M_A_DM1 26 DM1 BA0 107 DQ3 19 M_B_DQ3
M_CLK_DDR1
M_CLK_DDR0

10 17
M_CLK_DDR#1
M_CLK_DDR#0

M_A_DM0 DM0 DQ2 M_B_DQ2


M_B_BS#1
M_B_BS#0
M_B_BS#2

185 7
7
7

DM7 DQ1
7
7

M_B_DM7 M_B_DQ1
A16_BA2 85 M_B_DM6 170 DM6 DQ0 5 M_B_DQ0
M_A_DQS#7 186 DQS7# A15 84 M_B_DM5 147 DM5
M_A_DQS#6 167 DQS6# A14 86 M_A_A14 M_B_DM4 130 DM4
146 DQS5# A13 116 67 DM3 BA1 106
M_CLK_DDR#2
M_CLK_DDR#3

M_CLK_DDR2
M_CLK_DDR3

M_A_DQS#5 M_A_A13 M_B_DM3


M_A_DQS#4 129 DQS4# A12 89 M_A_A12 M_B_DM2 52 DM2 BA0 107
M_A_DQS#3 68 DQS3# A11 90 M_A_A11 M_B_DM1 26 DM1
M_A_DQS#2 49 DQS2# A10/AP 105 M_A_A10 M_B_DM0 10 DM0 A16/BA2 85
M_A_DQS#1 29 DQS1# A9 91 M_A_A9 A15 84
M_A_DQS#0 11 DQS0# A8 93 M_A_A8 166 CK1# A14 86 M_B_A14
M_A_DQS7 188 DQS7 A7 92 M_A_A7 164 CK1 A13 116 M_B_A13
M_A_DQS6 169 DQS6 A6 94 M_A_A6 A12 89 M_B_A12
M_A_DQS5 148 DQS5 A5 97 M_A_A5 32 CK0# A11 90 M_B_A11
M_A_DQS4 131 DQS4 A4 98 M_A_A4 30 CK0 A10/AP 105 M_B_A10
M_A_DQS3 70 DQS3 A3 99 M_A_A3 A9 91 M_B_A9
M_A_DQS2 51 DQS2 A2 100 M_A_A2 80 CKE1 A8 93 M_B_A8
M_A_DQS1 31 DQS1 A1 101 M_A_A1 79 CKE0 A7 92 M_B_A7
M_A_DQS0 13 DQS0 A0 102 M_A_A0 A6 94 M_B_A6
115 CS1# A5 97 M_B_A5
MH2 MH2 MH1 MH1 110 CS0# A4 98 M_B_A4
A3 99 M_B_A3
113 CAS# A2 100 M_B_A2
109 WE# A1 101 M_B_A1
108 RAS# A0 102 M_B_A0
M_CS3#
M_CS2#

M_CKE3
M_CKE2
M_B_WE#
M_B_CAS#
M_B_RAS#

7,13
7,13
7,13
7,13
8,13
8,13
8,13

M_A_DQ[63..0]

M_A_DQS[7..0]
M_A_DQS#[7..0]
M_A_DM[7..0] 8
8

8
M_A_A[14..0] 8,13
M_B_DQ[63..0]

8
M_B_DQS[7..0]
M_B_DQS#[7..0]
M_B_DM[7..0] 8

2
2

8
M_B_A[14..0] 8,13

Title

Size
Document Number

Date: Friday, March 14, 2008

1
1

D45/D46
Sheet
DDR2 Socket

12
of
Taipei Hsien 221, Taiwan, R.O.C.
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

47
Rev
Wistron Corporation

PD
A
B
C
D
PARALLEL TERMINATION Decoupling Capacitor
Put decap near power(0.9V) and pull-up resistor
DDR_VREF_S3 Put decap near power(0.9V) and pull-up resistor
RN25
8 1 M_CKE2 7,12
7 2 M_B_BS#2 8,12
6 3 M_B_A12 DDR_VREF_S3 DDR_VREF_S3 DDR_VREF_S3
5 4 M_B_A9
1 2 1 2 1 2
SRN56J-5-GP C306 SCD1U16V2ZY-2GP C264 SCD1U16V2ZY-2GP C232 SCD1U16V2ZY-2GP

R172 1 2 56R2J-4-GP M_CS1# 7,12 1 2 1 2 1 2


R171 1 2 56R2J-4-GP M_ODT3 7,12 C196 SCD1U16V2ZY-2GP C233 SCD1U16V2ZY-2GP C258 SCD1U16V2ZY-2GP
R209 1 2 56R2J-4-GP M_A_A8
R190 1 2 56R2J-4-GP M_B_A10 1 2 1 2 1 2
R208 1 2 56R2J-4-GP M_A_A14 C309 SCD1U16V2ZY-2GP C205 SCD1U16V2ZY-2GP C231 SCD1U16V2ZY-2GP
R222 1 2 56R2J-4-GP M_B_A14
1 2 1 2 1 2
M_A_A[14..0] 8,12 C257 SCD1U16V2ZY-2GP C305 SCD1U16V2ZY-2GP C187 SCD1U16V2ZY-2GP

RN22 M_B_A[14..0] 8,12 1 2 1 2 1 2


8 1 M_B_A8 C302 SCD1U16V2ZY-2GP C256 SCD1U16V2ZY-2GP C229 SCD1U16V2ZY-2GP
7 2 M_B_A5
6 3 M_B_A1 1 2 1 2 1 2
5 4 M_B_A3 C201 SCD1U16V2ZY-2GP C202 SCD1U16V2ZY-2GP C288 SCD1U16V2ZY-2GP

SRN56J-5-GP 1 2 1 2 1 2
RN12 C212 SCD1U16V2ZY-2GP C236 SCD1U16V2ZY-2GP C272 SCD1U16V2ZY-2GP
8 1 M_B_A13
7 2 M_ODT2 7,12 1 2 1 2 1 2
6 3 M_CS2# 7,12 C289 SCD1U16V2ZY-2GP C259 SCD1U16V2ZY-2GP C240 SCD1U16V2ZY-2GP
5 4 M_B_RAS# 8,12
1 2 1 2
SRN56J-5-GP C213 SCD1U16V2ZY-2GP C192 SCD1U16V2ZY-2GP
RN19
8 1 DDR_VREF_S3
M_B_BS#1 8,12
7 2 M_B_A0
6 3 M_B_A2 PD
5 4 M_B_A4

SRN56J-5-GP EC47 EC48 EC130


RN23

1
8 1 M_B_A6 DY DY DY
7 2 M_B_A7

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
6 3 M_B_A11

2
5 4 M_CKE3 7,12
SRN56J-5-GP
RN14
8 1 M_B_BS#0 8,12
7 2 M_B_WE# 8,12
6 3 M_B_CAS# 8,12
5 4 M_CS3# 7,12
SRN56J-5-GP
RN13 Place these Caps near DM1 Place these Caps near DM2
8 1 M_A_A13
7 2 1D8V_S3 1D8V_S3
M_ODT0 7,12
6 3 M_CS0# 7,12
5 4 M_A_RAS# 8,12 1 2 1 2
C260 SCD1U16V2ZY-2GP C239 SCD1U16V2ZY-2GP
SRN56J-5-GP
RN20 1 2 1 2
8 1 M_A_BS#1 8,12 C299 SCD1U16V2ZY-2GP C560 SCD1U16V2ZY-2GP
7 2 M_A_A0
6 3 M_A_A2 1 2 1 2
5 4 M_A_A4 C548 SCD1U16V2ZY-2GP C544 SCD1U16V2ZY-2GP

SRN56J-5-GP 1 2 1 2
RN15 C558 SCD1U16V2ZY-2GP C211 SCD1U16V2ZY-2GP
8 1 M_A_BS#0 8,12
7 2 M_A_WE# 8,12 1 2 1 2
6 3 M_A_CAS# 8,12 C535 SC2D2U6D3V3MX-1-GP C555 SC2D2U6D3V3MX-1-GP
5 4 M_ODT1 7,12
1 2 1 2
SRN56J-5-GP C527 SC2D2U6D3V3MX-1-GP C541 SC2D2U6D3V3MX-1-GP
RN26
8 1 M_CKE0 7,12 1 2 1 2
7 2 M_A_BS#2 8,12 C567 SC2D2U6D3V3MX-1-GP C562 SC2D2U6D3V3MX-1-GP
6 3 M_A_A12
5 4 M_A_A9 1 2 1 2
C270 SC2D2U6D3V3MX-1-GP C526 SC2D2U6D3V3MX-1-GP
SRN56J-5-GP
RN24 1 2 1 2
8 1 M_A_A6 C554 SC2D2U6D3V3MX-1-GP C536 SC2D2U6D3V3MX-1-GP
7 2 M_A_A7
6 3 M_A_A11
5 4 M_CKE1 7,12
SRN56J-5-GP
RN21
8 1 M_A_A5
7 2 M_A_A3
6 3 M_A_A1
5 4 M_A_A10

SRN56J-5-GP Wistron Corporation


21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR2 Termination Resistor


Size Document Number Rev

D45/D46 PD
Date: Wednesday, March 19, 2008 Sheet 13 of 47
5 4 3 2 1

LCD CONNECTOR 42 ATI_TXAOUT0- RN9 1


SRN0J-6-GP2
4
3
TXAOUT0-
TXAOUT0+
1
2
4 RN10
3 SRN0J-6-GP
GMCH_TXAOUT0- 7
DCBATOUT 42 ATI_TXAOUT0+ GMCH_TXAOUT0+ 7
VGA UMA

1
C87 C90
42 ATI_TXAOUT1- RN51 1 4 TXAOUT1- 1 4 RN50 GMCH_TXAOUT1- 7
SC10U25V6KX-1GP SCD1U25V3KX-GP ACES-CONN40C-1-GP-U2 SRN0J-6-GP2 TXAOUT1+
42 ATI_TXAOUT1+ 3 2 3 SRN0J-6-GP GMCH_TXAOUT1+ 7

2
42
TXACLK-
VGA UMA
20 21
19 22 TXACLK+ 42 ATI_TXAOUT2- RN53 1 4 TXAOUT2- 1 4 RN52 GMCH_TXAOUT2- 7
D 18 23 42 ATI_TXAOUT2+ SRN0J-6-GP2 3 TXAOUT2+ 2 3 SRN0J-6-GP GMCH_TXAOUT2+ 7 D
17 24 TXAOUT0- VGA UMA
5V_CAM_S0 16
15
25
26
TXAOUT0+
TXAOUT1-
TOP VIEW RN48 2 3 TXACLK- 2 3 RN49
42 ATI_TXACLK- SRN0J-6-GP1 GMCH_TXACLK- 7
ID_CLK 14 27 TXAOUT1+ 42 ATI_TXACLK+ 4 TXACLK+ 1 4 SRN0J-6-GP GMCH_TXACLK+ 7
1

C103 ID_DAT 13 28 TXAOUT2- VGA UMA


12 29 TXAOUT2+ 20 21
SCD1U16V2ZY-2GP 28 BRIGHTNESS 11 30
2

10 31 TXBCLK-
28 BLON_OUT 9 32 TXBCLK+
8 33 42 ATI_TXBOUT0- RN57 2 3 TXBOUT0- 2 3 RN56 GMCH_TXBOUT0- 7
7 34 TXBOUT0- SRN0J-6-GP1 4 TXBOUT0+ 1 4 SRN0J-6-GP
1 42 ATI_TXBOUT0+ GMCH_TXBOUT0+ 7
17 USBPN6 6 35 TXBOUT0+ VGA UMA
R102 5 36 TXBOUT1-
17 USBPP6
4 37 TXBOUT1+ 42 ATI_TXBOUT1- RN29 2 3 TXBOUT1- 2 3 RN30 GMCH_TXBOUT1- 7
10KR2F-2-GP 3 38 TXBOUT2- SRN0J-6-GP1 4 TXBOUT1+ 1 4 SRN0J-6-GP
42 ATI_TXBOUT1+ GMCH_TXBOUT1+ 7
2 39 TXBOUT2+ VGA UMA
2

1 40 42 ATI_TXBOUT2- RN27 1 4 TXBOUT2- 1 4 RN28 GMCH_TXBOUT2- 7


41 1 40 42 ATI_TXBOUT2+ SRN0J-6-GP2 3 TXBOUT2+ 2 3 SRN0J-6-GP GMCH_TXBOUT2+ 7
3D3V_S0 LCD1 VGA UMA
42 ATI_TXBCLK- RN55 2 3 TXBCLK- 2 3 RN54 GMCH_TXBCLK- 7
1

EC24 SRN0J-6-GP1 4 TXBCLK+ 1 4 SRN0J-6-GP


42 ATI_TXBCLK+ GMCH_TXBCLK+ 7
SCD1U16V2ZY-2GP
VGA UMA
2

C C
LCDVDD_S0
RN6
2 3 3D3V_S0
1

C116 1 4
C117
SC10U10V5ZY-1GP SCD1U16V2ZY-2GP SRN10KJ-5-GP
2

SB LCDVDD_S0
42 ATI_EDID_CLK RN17 1 4 ID_CLK 1 4 RN11 CLK_DDC_EDID 7
42 ATI_EDID_DATA SRN0J-6-GP2 3 ID_DAT 2 3 SRN0J-6-GP DAT_DDC_EDID 7
VGA UMA
1

C112
SC1U10V2KX-1GP
2

U12
DIS
3D3V_S0 5 IN#5 1 2 ATI_LCDVDD_ON 42
6 4 R108UMA 0R2J-2-GP
IN#6 GND
1

C110 7 3 LCDVDD_ON 1 2
IN#7 EN 0R2J-2-GP GMCH_LCDVDD_ON 7
8 2 R107
SCD1U16V2ZY-2GP IN#8 OUT
9 1
2

GND IN#1
1

G5281RC1U-GP
74.05281.093
R106
100KR2J-1-GP
WEBCAM POWER
2

U10
B B

5V_S0 5 IN#5
6 IN#6 GND 4

1
7 IN#7 EN 3 CAMERA_EN 28
C86 8 2 5V_CAM_S0
SCD1U16V2ZY-2GP IN#8 OUT
9 1

2
GND IN#1

1
R343 WIRELED1 G5281RC1U-GP R91 C101
1 2 WLAN_LED# A K 74.05281.093 100KR2J-1-GP SC1U10V2KX-1GP
3D3V_S0 WLAN_TEST_LED# 28

2
2
1KR2J-1-GP LED-O-16-GP
R344 PWRLED1
3D3V_S0 1 2 PWR_LED#1 1 2 PWR_LED# 28
150R2J-L1-GP-U LED-G-62-GP
R345 STBYLED1
3D3V_S5 1 2 STBY_LED#1 A K STDBY_LED# 28
1KR2J-1-GP LED-O-16-GP
R338 HDDLED1
3D3V_S0 1 2 HDD_LED# 1 2 MEDIA_LED# 16
150R2J-L1-GP-U LED-G-62-GP

PD
CHGLED1
A
3D3V_S5 1 R341 2 CHG_LED#1 A K CHARGE_LED# 28
LED Location and Sequence ( The edge of PCB,Top view ) ZZZZ A

2K2R2J-2-GP LED-O-16-GP
R339 CAPSLED1 Wistron Corporation
1 2 CAPS_LED#1 1 2 PWR ON MEDIA CAP. 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
3D3V_S0 CAP_LED# 28
Taipei Hsien 221, Taiwan, R.O.C.
150R2J-L1-GP-U LED-G-62-GP Left side Right side
R340 NUMLED1 Title
1 2 NUM_LED#1 1 2 WLAN STDBY CHARGER NUM.
3D3V_S0 NUM_LED# 28
Size
LCD CONN / LED / WEBCAM
Document Number Rev
150R2J-L1-GP-U LED-G-62-GP
A3
D45/D46 PD
Date: Friday, March 14, 2008 Sheet 14 of 47
5 4 3 2 1

WWW.AliSaler.Com
A B C D E

Layout Note:
Place these resistors close to the CRT-out connector Ferrite bead impedance: 10 ohm@100MHz
PD use 22 ohm 68.00215.211 CRT I/F & CONNECTOR
L14
UMA CRT1
7 GMCH_RED R357 1 2 0R2J-2-GP CRT_R1 1 2 CRT_R 17

R363 1
VGA
42 ATI_CRT_RED 2 0R2J-2-GP FCM2012CF-220T05-GP 6
11 1 CRT_R
L13 5V_CRT_S0
4
R356 1
UMA CRT_G1 CRT_G DAT_DDC1_5
7
CRT_G
4
7 GMCH_GREEN 2 0R2J-2-GP 1 2 12 2
VGA PD 8
R362 1 2 0R2J-2-GP JVGA_HS 13 3 CRT_B
42 ATI_CRT_GREEN FCM2012CF-220T05-GP
9
JVGA_VS 14 4
L12
R355 1
UMA CRT_B1 CRT_B CLK_DDC1_5
10
7 GMCH_BLUE 2 0R2J-2-GP 1 2 15 5

R361 1
VGA
42 ATI_CRT_BLUE 2 0R2J-2-GP FCM2012CF-220T05-GP 16

1
R352 R351 R350 EC4 EC1 EC3 EC2

150R2F-1-GP

150R2F-1-GP

150R2F-1-GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP
DY DY VIDEO-15-42-GP-U

1
EC65 EC64 EC63 EC61 EC60 EC59 20.20378.015

1
C1

SC1P50V2CN-1GP

SC1P50V2CN-1GP

SC1P50V2CN-1GP

SC1P50V2CN-1GP

SC1P50V2CN-1GP

SC1P50V2CN-1GP
2

2
SCD01U50V2ZY-1GP

2
3D3V_S0
Layout Note:
* Must be a ground return path between this ground and the ground on

1
3D3V_S0
the VGA connector. R1 5V_S0
D15
3 Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT 10KR2F-2-GP BAV99-5-GP 3

CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN. 2

1
C442 CRT_R 3 DY
5V @ ext. CRT side SCD1U16V2ZY-2GP 1

2
Hsync & Vsync level shift

G
D14
BAV99-5-GP

14

1
R2
UMA CRT_DAT DAT_DDC1_5
2
7 GMCH_DDCDATA 1 2 0R2J-2-GP S D UMA
R4 1 2 0R2J-2-GP 7 GMCH_HSYNC R365 1 2 0R2J-2-GP HSYNC_4 2 3 HSYNC_5 1 R360 2 JVGA_HS CRT_G 3 DY
42 ATI_DDCDATA
Q1 R364 1 2 0R2J-2-GP 0R0402-PAD
42 ATI_HSYNC
VGA 2N7002-11-GP VGA U23A 1
TSAHCT125PW-GP

14
G

7
4
D13
UMA Q2 UMA BAV99-5-GP
7 GMCH_DDCCLK
R3 1 2 0R2J-2-GP CRT_CLK S D2N7002-11-GP CLK_DDC1_5 7 GMCH_VSYNC R348 1 2 0R2J-2-GP VSYNC_4 5 6 VSYNC_5 1 R346 2 JVGA_VS 2
R5 1 2 0R2J-2-GP R349 1 2 0R2J-2-GP 0R0402-PAD
42 ATI_DDCCLK 3D3V_S0 42 ATI_VSYNC
VGA CRT_B 3 DY
VGA U23B
RN1

7
SRN10KJ-5-GP TSAHCT125PW-GP 1
2 3
1 4
F1 D16 SRN10KJ-5-GP PD

1
5V_S0 1 2 A K 2 3 EC66 EC67
1 4 SC15P50V2JN-2-GP SC15P50V2JN-2-GP
FUSE-1D1A6V-4GP-U RB751V-40-2-GP

2
RN2
2 2

5V_CRT_S0

TV CONN
3D3V_S0
VGA D12
BAV99-5-GP
C438
TVOUT1 2
1 2 SC33P50V2JN-3GP
5 LUMA_1 3 DY
L16 GND
1 GND
1 2 LUMA_1 3 1
42 ATI_TV_LUMA IND-1D2UH-5-GP LUMA
2

VGA 4 CRMA D11


R359 C440 C434 2 BAV99-5-GP
SC150P50V2JN-3GP GND
75R2F-2-GP SC270P50V2KX-1GP 6 2
2

GND
VGA VGA VGA
PD CRMA_1 3 DY
C437
1

MINDIN4-29-GP
1 2 SC33P50V2JN-3GP 22.10021.E91 1
1 VGA 1
L15
CRMA_1 VGA
42 ATI_TV_CRMA 1 2
IND-1D2UH-5-GP
Wistron Corporation
2

VGA
R358 C439 C433 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
75R2F-2-GP SC150P50V2JN-3GP SC270P50V2KX-1GP Taipei Hsien 221, Taiwan, R.O.C.
2

VGA VGA VGA


Title
1

Size Document Number


CRT/TV Connector Rev

D45/D46 PD
Date: Tuesday, March 18, 2008 Sheet 15 of 47
A B C D E
5 4 3 2 1

C368 SC10P50V2JN-4GP
1 2 RTC_X1

4
X3

1
3D3V_AUX_S5 D25 X-32D768KHZ-38GPU R250
D 2 RTC_AUX_S5 10MR2J-L-GP D

SC1U16V3ZY-GP
3

2
1
1D05V_S0
1 C728

RTC_BAT_R

1
C362 SC10P50V2JN-4GP U57A 1 OF 6 LPC_LAD[0..3]
LPC_LAD[0..3] 27,28
BAS40CW-GP 1 2
C23 K5 LPC_LAD0 DY R307
RTC1 RTC_X2 RTCX1 FWH0/LAD0 LPC_LAD1 56R2J-4-GP
C24 RTCX2 FWH1/LAD1 K4
L6 LPC_LAD2

2
RTC_BAT R517 1 RTC_RST# FWH2/LAD2 LPC_LAD3 H_DPSLP#
PWR 1 1 2 2 20KR2J-L2-GP A25 RTCRST# FWH3/LAD3 K2

RTC
LPC
2 R566 1KR2J-1-GP R254 1 2 20KR2J-L2-GP SRTC_RST# F20
GND R525 INTRUDER# SRTCRST#
NP1 NP1 1 2 C22 INTRUDER# FWH4/LFRAME# K3 LPC_LFRAME# 27,28
NP2 1MR2J-1-GP
NP2
1

1
C711 C366 C657 INTVRMEN B22 J3 LDRQ0#
20 INTRUDER# INTVRMEN LDRQ0# 1D05V_S0

SC1U16V3ZY-GP

SC1U16V3ZY-GP
SCD1U16V2ZY-2GP LAN100_SLP A22 J1 3D3V_LDRQ1_S0 TP66
BAT-CON2-1-GP-U LAN100_SLP LDRQ1#/GPIO23 TP125
DY
2

2
E25 GLAN_CLK A20GATE N7 KA20GATE 28

1
AJ27 H_A20M# 4
62.70001.011 LAN_RSTSYNC C13
A20M#
TP109 LAN_RSTSYNC H_DPRSTP# R603
DPRSTP# AJ25 H_DPRSTP# 4,7,32

LAN / GLAN
F14 AE23 H_DPSLP# 4 56R2J-4-GP
LAN_RXD0 DPSLP#
G13

2
LAN_RXD1 H_FERR#_R
D14 LAN_RXD2 FERR# AJ26 1 2 H_FERR# 4
R604 56R2J-4-GP
GLAN_COMP place within 500 mil of ICH9M D13 LAN_TXD0 CPUPWRGD AD22 H_PWRGD 4
D12 1D05V_S0
LAN_TXD1
DY PD E13 LAN_TXD2 IGNNE# AF25 H_IGNNE# 4

CPU
C EC56 1 H_PWRGD 1 C
2
SC12P50V2JN-3GPR320 22R2J-2-GP 3D3V_S5 1 2 GLAN_DOCK# B10 AE22 H_INIT# 4,27 R308 DY 2
200R2F-L-GP
R265 10KR2J-3-GP GLAN_DOCK#/GPIO56 INIT#
22 ACZ_BTCLK_MDC 1 2 INTR AG25 H_INTR 4
1D5V_S0 1 2 GLAN_COMP B28 GLAN_COMPI RCIN# L3 KBRCIN# 28
R261 24D9R2F-L-GP B27
R321 22R2J-2-GP GLAN_COMPO
PD NMI AF23 H_NMI 4
29 ACZ_BITCLK 1 2 ACZ_BIT_CLK AF6 AF24 H_SMI#_R 1 2 H_SMI# 4 1D05V_S0
ACZ_SYNC_R HDA_BIT_CLK SMI# R311 0R2J-2-GP
PD AH4 HDA_SYNC
EC57 22,29 ACZ_SYNC 1 R304
2 AH27 H_STPCLK# 4 1 2
STPCLK#
1

33R2J-2-GP ACZ_RST#_R AE7 R315 56R2J-4-GP


HDA_RST#
SC22P50V2JN-4GP

DY 22,29 ACZ_RST# 1 R322


2 AG26 H_THERMTRIP_R 1 2 R313 1 2 0R2J-2-GP PM_THRMTRIP-A# 4,7
33R2J-2-GP THRMTRIP# R306 54D9R2F-L1-GP
29 ACZ_SDATAIN0 AF4
2

HDA_SDIN0 ICH_TP8 Layout note: R373 needs to placed


22 ACZ_SDATAIN1 AG4 HDA_SDIN1 PECI AG27 DY
ACZ_SDIN2 TP75 within 2" of ICH9, R379 must be

IHDA
AH3 HDA_SDIN2
TP144 AE5 placed within 2" of R373 w/o stub
HDA_SDIN3
3D3V_S0
PD SATA4RXN AH11
22,29 ACZ_SDATAOUT 1 R305
2 ACZ_SDATAOUT_R AG5 AJ11
33R2J-2-GP HDA_SDOUT SATA4RXP
SATA4TXN AG12
1 DY HDA_DOCK_EN#
HDA_DOCK_RST# R303
2
8K2R2J-3-GP
AG7
AE8
HDA_DOCK_EN#/GPIO33 SATA4TXP AF12 E-SATA
TP71 HDA_DOCK_RST#/GPIO34 SATA_RXN5_C
SATA5RXN AH9 SATA_RXN5_C 22
14 MEDIA_LED# AG8 AJ9 SATA_RXP5_C SATA_RXP5_C 22
SATALED# SATA5RXP
SATA-HDD SATA5TXN AE10 SATA_TXN5_C SCD01U25V2KX-3GP2 1 C758 SATA_TXN5 22
3D3V_S0 SATA_RXN0_C AJ16 AF10 SATA_TXP5_C SCD01U25V2KX-3GP2 1 C759
21 SATA_RXN0_C SATA0RXN SATA5TXP SATA_TXP5 22
SATA_RXP0_C AH16

SATA
R597 21 SATA_RXP0_C SATA0RXP
21 SATA_TXN0 C761 1 2SCD01U25V2KX-3GP SATA_TXN0_C AF17 AH18 CLK_PCIE_SATA# 3
MEDIA_LED# C760 1 SATA_TXP0_C AG17 SATA0TXN SATA_CLKN
1 2 21 SATA_TXP0 2SCD01U25V2KX-3GP SATA0TXP SATA_CLKP AJ18 CLK_PCIE_SATA 3
10KR2J-3-GP
21 SATA_RXN1_C SATA_RXN1_C AH13 AJ7 SATARBIAS
B SATA_RXP1_C SATA1RXN SATARBIAS# B
21 SATA_RXP1_C AJ13 SATA1RXP SATARBIAS AH7 2 1
C756 1 2SCD01U25V2KX-3GP SATA_TXN1_C AG14 R596 24D9R2F-L-GP
21 SATA_TXN1 SATA1TXN
21 SATA_TXP1 C757 1 2SCD01U25V2KX-3GP SATA_TXP1_C AF14 SATA1TXP
SATA-ODD Place within 500 mils of
ICH9 ball
ICH9M-GP-NF

71.ICH9M.00U

D4546 SB use 71.ICH9M.E0U

RTC_AUX_S5 RTC_AUX_S5
1

R523 R502
330KR2F-L-GP 330KR2F-L-GP
integrated VccSus1_05,VccSus1_5,VccCL1_5
2

A
INTVRMEN LAN100_SLP INTVRMEN High=Enable Low=Disable A
1

integrated VccLan1_05VccCL1_05
R524 R510
DY 0R2J-2-GP DY 0R2J-2-GP LAN100_SLP High=Enable Low=Disable Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2

Title

Size Document Number


ICH9-M (1 of 4) Rev

D45/D46 PD
Date: Tuesday, March 25, 2008 Sheet 16 of 47
5 4 3 2 1

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5 4 3 2 1

U57C 3 OF 6 3D3V_S0
RN45
G16 AH23 SATA0GP 8 1
2 OF 6 19,25 SMB_CLK SMBCLK SATA0GP/GPIO21
U57B A13 AF19 SATA1GP ICH_GPIO37 7 2
19,25 SMB_DATA SMBDATA SATA1GP/GPIO19
SMB_LINK_ALERT# E17 AE21 ICH_GPIO36 ICH_GPIO36 6 3

SATA
LINKALERT#/GPIO60/CLGPIO4 SATA4GP/GPIO36

GPIO
SMB
D11 F1 PCI_REQ#0 3D3V_S5 R262 1 2 SMLINK0 C17 AD20 ICH_GPIO37 SATA1GP 5 4
AD0 REQ0# PCI_GNT#0 TP102 10KR2J-3-GP SMLINK1 SMLINK0 SATA5GP/GPIO37 SRN10KJ-6-GP
C8
D9
AD1 PCI GNT0# G4
B6 PCI_REQ#1 R506
1 2
10KR2J-3-GP
B18 SMLINK1
H1
AD2 REQ1#/GPIO50 3D3V_S0 CLK14 CLK_ICH14 3
E12 A7 PCI_GNT#1 TP107 PM_RI# F19 AF3 SATA0GP 2 1

Clocks
AD3 GNT1#/GPIO51 RI# CLK48 CLK48_ICH 3
E9 F13 PCI_REQ#2 R601
AD4 REQ2#/GPIO52 PCI_GNT#2 TP65 PM_SUS_STAT#
C9 AD5 GNT2#/GPIO53 F12 R4 SUS_STAT#/LPCPD# SUSCLK P1 PM_SUS_CLK 20 10KR2J-3-GP

1
E10 E6 PCI_REQ#3 TP67 DBRESET# G19
AD6 REQ3#/GPIO54 PCI_GNT#3 TP112 R513 R251 SYS_RESET#
B7 AD7 GNT3#/GPIO55 F6 SLP_S3# C16 PM_SLP_S3# 20,25,28,30,34,35,36,37
C7 DY DY 10KR2J-3-GP M6 E16
AD8 7 PM_SYNC# PMSYNC#/GPIO0 SLP_S4# PM_SLP_S4# 25,28,34,35
C5 D8 PCI_C/BE#0 TP115 10KR2J-3-GP G17 SLPS5#
AD9 C/BE0# PCI_C/BE#1 TP104 SMB_ALERT# SLP_S5# TP64
G11 B4 A17

2
AD10 C/BE1# PCI_C/BE#2 TP103 SMBALERT#/GPIO11 S4_STATE#
D
F8 AD11 C/BE2# D6 S4_STATE#/GPIO26 C10 D
F11 A5 PCI_C/BE#3 TP106 3 PM_STPPCI# A14 TP117
AD12 C/BE3# STP_PCI#

SYS GPIO
E7 AD13 3 PM_STPCPU# E19 STP_CPU# PWROK G20 PWROK 7,20
A3 D3 PCI_IRDY#
AD14 IRDY# PCI_PAR TP124 PM_DPRSLPVR_R R5621
D2 AD15 PAR E3 28 PM_CLKRUN# L4 CLKRUN# DPRSLPVR/GPIO16 M2 2 0R2J-2-GP PM_DPRSLPVR 7,32
F10 R1 PCIRST# 1 R565 2 PCIRST1# 23,25,41 R560 1 2DY
AD16 PCIRST#

Power MGT
D5 C6 PCI_DEVSEL# 56R2J-4-GP 23,25,26 PCIE_WAKE# E20 B13 PM_BATLOW#_R 100KR2J-1-GP
AD17 DEVSEL# PCI_PERR# WAKE# BATLOW#
D10 AD18 PERR# E4 28 INT_SERIRQ M5 SERIRQ
B3 C2 PCI_LOCK# 3D3V_S0 AJ23 R3 PWRBTN#_ICH 1 D26
AD19 PLOCK# 20 THRM# THRM# PWRBTN#
F7 J4 PCI_SERR# SB
AD20 SERR# PCI_STOP# VGATE_PWRGD PM_LAN_ENABLE
C3 AD21 STOP# A4 7,32 VGATE_PWRGD D21 VRMPWRGD LAN_RST# D20 3 PM_PWRBTN# 28
F3 F5 PCI_TRDY# UMA DY_RTL BAS16-1-GP
AD22 TRDY#

2
F4 D7 PCI_FRAME# R260 1 DY2 ICH_TP7 A20 D22 RSMRST#_SB 2
AD23 FRAME# PLT_RST#_R R290 R559 R599 R520 0R2J-2-GP SST RSMRST#
C1 AD24 2 1 PLT_RST1# 7,25,26,27,28
G7 AD25 PLTRST# C14 1 20R2J-2-GP 10KR2J-3-GP 10KR2J-3-GP AG19 TACH1/GPIO1 CK_PWRGD R5 CLK_PWRGD 3 3D3V_S0
H7 AD26 PCICLK D4 C380 DY SC100P50V2JN-3GP 10KR2J-3-GP CLK_SEL AH21 TACH2/GPIO6
D1 R2 PCLK_ICH 3 28 SB_ECSCI# SB_ECSCI# AG21 R6 PWROK 7,20

1
AD27 PME# ECSWI# TACH3/GPIO7 CLPWROK
G5 AD28 28 ECSWI# A21 GPIO8
H6 ICH_PME TP126 C12 B16 PM_SLP_M# TP113
AD29 LAN_PHY_PWR_CTRL/GPIO12 SLP_M#

1
G1 AD30 C21 ENERGY_DETECT/GPIO13
H3 PCB_VER3 AE18 F24 R255
AD31 TACH0/GPIO17 CL_CLK0 CL_CLK0 7
ICH9_GPIO18 K1 B19 C_LINK_CLK C_LINK_CLK 25 3K24R2F-GP
G38 3D3V_S0 ICH9_GPIO20 GPIO18 CL_CLK1
Interrupt I/F R637 AF8 GPIO20

2
INT_PIRQA# INT_PIRQE# SCLOCK

GAP-OPEN
J5 H4 TP74 AJ22 F22 CL_DATA0 7

2
INT_PIRQB# PIRQA# PIRQE#/GPIO2 INT_PIRQF# SCLOCK/GPIO22 CL_DATA0
R558 R598 C19 C_LINK_DAT

Controller Link
E1 K6 1 2 A9

GPIO
PIRQB# PIRQF#/GPIO3 GPIO27 CL_DATA1 C_LINK_DAT 25
INT_PIRQC# J6 PIRQC# PIRQG#/GPIO4 F2 INT_PIRQG# DIS 10KR2J-3-GP 10KR2J-3-GP D19 GPIO28
INT_PIRQD# C4 G2 INT_PIRQH# ICS 10KR2J-3-GP L1 C25 CL_VREF0_ICH
PIRQD# PIRQH#/GPIO5 PCB_VER0 SATACLKREQ#/GPIO35 CL_VREF0 CL_VREF1_ICH
AE19 A19

1
SLOAD/GPIO38 CL_VREF1

1
SB PCB_VER1 AG22
ICH9M-GP-NF R602 SDATAOUT1 AF21 SDATAOUT0/GPIO39 3D3V_S5 R256
SDATAOUT1/GPIO48 CL_RST0# F21 CL_RST#0 7
DY 1 ICH9_GPIO49 AH24 D18 C_LINK_RST 453R2F-1-GP

SCD1U10V2KX-4GP
2 GPIO49 CL_RST1# C_LINK_RST 25

C373
71.ICH9M.00U 1KR2J-1-GP ICH9_GPIO57 A8 GPIO57/CLGPIO5

1
A16 ICH9_GPIO24

2
GPIO24/MEM_LED SUS_PWR_ACK TP105 R495
RP5 3D3V_S0 RP2 3D3V_S0 GPIO49 should be pulled down to 29 ACZ_SPKR M7 C18

2
PCI_REQ#0 INT_PIRQD# SPKR GPIO10/SUS_PWR_ACK ICH9_GPIO14 3K24R2F-GP
1 10 1 10 GND only when using Teenah. When 7 MCH_ICH_SYNC# AJ24 MCH_SYNC# GPIO14/AC_PRESENT C11
INT_PIRQB# 2 9 INT_PIRQE# PCI_IRDY# 2 9 INT_PIRQG# using Cantiga, this ball should ICH_TP3 B21 C20 ICH9_GPIO9
TP3 GPIO9/WOL_EN

MISC
PCI_PERR# 3 8 INT_PIRQH# PCI_REQ#3 3 8 PCI_SERR# TP58 AH20

2
PCI_LOCK# INT_PIRQA# PCI_TRDY# INT_PIRQF# be left as No Connect. PWM0
4 7 4 7 AJ20 PWM1
C 5 6 INT_PIRQC# 5 6 SB_ECSCI# AJ21 C
3D3V_S0 3D3V_S0 PWM2

1
3D3V_S5

SCD1U10V2KX-4GP
1

C654
SRN8K2J-2-GP-U SRN8K2J-2-GP-U R499
R253 R266 453R2F-1-GP

1
RP1 ICH9M-GP-NF 10KR2J-3-GP
3D3V_S0

2
PCI_REQ#2 1 10 R522 100KR2J-1-GP

2
PM_CLKRUN# 2 9 PCI_STOP# DY 10KR2J-3-GP
71.ICH9M.00U

2
3 8 PCI_DEVSEL#
INT_SERIRQ 4 7 PCI_REQ#1

2
3D3V_S0 5 6 PCI_FRAME# ICH9_GPIO57 3D3V_S5 3D3V_S5

1
SRN8K2J-2-GP-U
R521
100KR2J-1-GP 3D3V_S5
RN37
RP4 3D3V_S5

2
ECSWI# 1 10 8 1
USB_OC#1 2 9 SUS_PWR_ACK USB_OC#9 7 2
USB_OC#0 3 8 SMB_LINK_ALERT# USB_OC#10 6 3
USB_OC#5 4 7 SMB_ALERT# USB_OC#8 5 4
5 6 PM_BATLOW#_R
Layout Note: 3D3V_S5
PCIE AC coupling caps SRN10KJ-6-GP
SRN10KJ-L3-GP
need to be within 250 mils of the driver.

USB_OC#11 1 2
R281 10KR2J-3-GP
U57D 4 OF 6
GLAN N29 V27 RP3
23 PCIE_RXN1 PERN1 DMI0RXN DMI_RXN0 7 3D3V_S5
USB_OC#3
Direct Media Interface

23 PCIE_RXP1 N28 PERP1 DMI0RXP V26 DMI_RXP0 7 1 10


23 PCIE_TXN1 C709 SCD1U16V2KX-3GP2 1 GLAN_TXN_C P27 U29 DMI_TXN0 7 PCIE_WAKE# 2 9 USB_OC#2
C708 SCD1U16V2KX-3GP2 GLAN_TXP_C P26 PETN1 DMI0TXN PM_RI# USB_OC#6
23 PCIE_TXP1 1 PETP1 DMI0TXP U28 DMI_TXP0 7 3 8
DBRESET# USB_OC#7
WWAN CARD L29 Y27
4
5
7
6 USB_OC#4
25 PCIE_RXN2 PERN2 DMI1RXN DMI_RXN1 7 3D3V_S5 3D3V_S0
25 PCIE_RXP2 L28 PERP2 DMI1RXP Y26 DMI_RXP1 7 SB
25 PCIE_TXN2 C706 SCD1U10V2KX-5GP 2 1 TXN2 M27 W29 DMI_TXN1 7 SRN10KJ-L3-GP
C705 SCD1U10V2KX-5GP 2 TXP2 PETN2 DMI1TXN
25 PCIE_TXP2 1 M26 PETP2 DMI1TXP W28 DMI_TXP1 7

1
B B

10KR2J-3-GP
MINICARD R301 R309
25 PCIE_RXN3 J29
J28
PERN3 DMI2RXN AB27
AB26
DMI_RXN2 7
10KR2J-3-GP PlanarID
PCI-Express

25 PCIE_RXP3 PERP3 DMI2RXP DMI_RXP2 7


25 PCIE_TXN3 C696
C697
SCD1U10V2KX-5GP 2
SCD1U10V2KX-5GP 2
1
1
TXN3
TXP3
K27
K26
PETN3 DMI2TXN AA29
AA28
DMI_TXN2 7 (1,0)
25 PCIE_TXP3 DMI_TXP2 7

2
PETP3 DMI2TXP
NEW CARD PCB_VER0
PCB_VER1
SA: 0,0
25 PCIE_RXN4 G29 AD27 DMI_RXN3 7
25 PCIE_RXP4 G28
PERN4
PERP4
DMI3RXN
DMI3RXP AD26 DMI_RXP3 7
1D5V_S0 SB: 0,1

1
10KR2J-3-GP
C694 SCD1U10V2KX-5GP 2 1 TXN4 H27 AC29
25
25
PCIE_TXN4
PCIE_TXP4 C692 SCD1U10V2KX-5GP 2 1 TXP4 H26
PETN4
PETP4
DMI3TXN
DMI3TXP AC28
DMI_TXN3
DMI_TXP3
7
7
No Reboot Strap R302 R310 SC: 1,1
1

SPKR LOW = Defaule 10KR2J-3-GP


CARD READER E29 T26 R300 High=No Reboot
26 PCIE_RXN5 PERN5 DMI_CLKN CLK_PCIE_ICH# 3
E28 T25 24D9R2F-L-GP
26 PCIE_RXP5 CLK_PCIE_ICH 3

2
C792 SCD1U10V2KX-5GP 2 TXN5 PERP5 DMI_CLKP
26 PCIE_TXN5 1 F27 PETN5
C793 SCD1U10V2KX-5GP 2 1 TXP5 F26 AF29 3D3V_S0
26 PCIE_TXP5
2

PETP5 DMI_ZCOMP DMI_IRCOMP_R


DMI_IRCOMP AF28
ACZ_SPKR
DY DY
SB C29 PERN6/GLAN_RXN 1 DY 2
C28 AC5 R280 1KR2J-1-GP
PERP6/GLAN_RXP USBP0N USBPN0 22
D27 AC4 SDATAOUT1 1 DY 2
PETN6/GLAN_TXN USBP0P USBPP0 22 10KR2J-3-GP
D26 AD3 USBPN1 TP72 R312
PETP6/GLAN_TXP USBP1N USBPP1
USBP1P AD2 TP73 USB 3D3V_S5
TP59 SPI_CLK D23 AC1 USBPN2 22 SCLOCK 1 2
TP61 SPI_CS0# SPI_CLK USBP2N R600 10KR2J-3-GP
D24 SPI_CS0# USBP2P AC2 USBPP2 22 Pair Device
SPI_CS#1 F23 AA5 USBPN3 22
SPI_CS1#/GPIO58/CLGPIO6 USBP3N

1
AA4 USBPP3 22 0 USB1 PWROK 1 2 1 DY 2
TP57 SPI_MOSI USBP3P R278 10KR2J-3-GP R264 0R2J-2-GP R269
D25 SPI_MOSI USBP4N AB2 USBPN4 22

10KR2J-3-GP
SPI

TP60 SPI_MISO E23 AB3 USBPP4 22 1 NC


SPI_MISO USBP4P PM_LAN_ENABLE
USBP5N AA1 USBPN5 22 1 2
USB_OC#0 N4 AA2 2 USB2 R252 0R2J-2-GP D10
22 USB_OC#0 USBPP5 22

2
USB_OC#1 OC0#/GPIO59 USBP5P RSMRST#_SB
N5 OC1#/GPIO40 USBP6N W5 USBPN6 14 1
USB_OC#2 3 USB3
22 USB_OC#2
USB_OC#3
N6
P6
OC2#/GPIO41 USB USBP6P W4
Y3 USBPN7
USBPP6 14
SB 2
OC3#/GPIO42 USBP7N TP130 28 RSMRST#_KBC

1
USB_OC#4 M1 Y2 USBPP7 TP131 4 USB4 R272
USB_OC#5 OC4#/GPIO43 USBP7P
N2 OC5#/GPIO29 USBP8N W1 USBPN8 25 3
USB_OC#6 M4 W2 USBPP8 25 5 BLUETOOTH BOOT BIOS Strap 100KR2J-1-GP
USB_OC#7 OC6#/GPIO30 USBP8P
M3 V2 USBPN9 25 BAT54-7-F-GP
USB_OC#8 OC7#/GPIO31 USBP9N
N3 V3 USBPP9 25 6 WEBCAM PCI_GNT#0 SPI_CS#1 BOOT BIOS Location

2
USB_OC#9 OC8#/GPIO44 USBP9P
A N1 OC9#/GPIO45 USBP10N U5 USBPN10 25 A
USB_OC#10 P5 U4 USBPP10 25 7 NC 0 1 SPI
USB_OC#11 OC10#/GPIO46 USBP10P
P3 OC11#/GPIO47 USBP11N U1 1 0 PCI
R590 USBP11P U2 8 MINICARD 1 1 LPC(Default)
USB_RBIAS_PN AG2 A16 swap override strap
USBRBIAS ZZZZ
2 1 AG1 USBRBIAS# 9 UMTS
22D6R2F-L1-GP low = A16 swap override enable
10 NEW CARD PCI_GNT#3
R259
ICH9M-GP-NF
high = default
Wistron Corporation
PCI_GNT#0 1 1KR2J-1-GP
2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
3D3V_S0 1 DY 2 SPI_MOSI 71.ICH9M.00U R501 DY Taipei Hsien 221, Taiwan, R.O.C.
SPI_CS#1 1 1KR2J-1-GP
2
1KR2J-1-GP R277 DY Title
PCI_GNT#3 1 1KR2J-1-GP
2
R514 DY ICH9-M (2 of 4)
Size Document Number Rev

D45/D46 PD
Date: Friday, March 14, 2008 Sheet 17 of 47
5 4 3 2 1
5 4 3 2 1

U57F 6 OF 6
RTC_AUX_S5
6uA in G3 A23 A15 1D05V_S0
VCCRTC VCC1_05
VCC1_05 B15 1.634A
V5REF_S0 A6 C15 Layout Note: Place near ICH9M
V5REF VCC1_05

1
C663 C669 D15
VCC1_05

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
V5REF_S5 AE1 E15
V5REF_SUS VCC1_05

1
F15 C370 C398 C391 C396 C407

2
VCC1_05

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AA24 L11 DY TC29
VCC1_5_B VCC1_05

ST220U6D3VDM-15GP
AA25 L12

2
VCC1_5_B VCC1_05
AB24 L14
646mA AB25
VCC1_5_B
VCC1_5_B
VCC1_05
VCC1_05 L16
1D5V_S0 AC24 L17
VCC1_5_B VCC1_05
AC25 VCC1_5_B VCC1_05 L18
D 1 R258 2 AD24 VCC1_5_B VCC1_05 M11 D
0R0603-PAD AD25 M18
VCC1_5_B VCC1_05

1
C418 C417 TC26 C383 AE25 P11
VCC1_5_B VCC1_05

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC2D2U10V3KX-1GP
DY DY TC12 TC13 AE26 P18
VCC1_5_B VCC1_05

ST22U6D3VBM-1GP

ST22U6D3VBM-1GP
ST220U6D3VDM-15GP
AE27 T11 1D5V_DMIPLL_ICH_S0
23mA
2

2
VCC1_5_B VCC1_05 1D5V_S0
PD AE28 VCC1_5_B VCC1_05 T18
AE29 VCC1_5_B VCC1_05 U11 2 1
F25 U18 IND-1D2UH-5-GP L34

CORE
VCC1_5_B VCC1_05

1
G25 VCC1_5_B VCC1_05 V11
PD H24 V12 C716 C712
VCC1_5_B VCC1_05 SCD01U16V2KX-3GP SC10U6D3V5MX-3GP
H25 V14

2
VCC1_5_B VCC1_05
J24 VCC1_5_B VCC1_05 V16
J25 VCC1_5_B VCC1_05 V17
K24 V18 1D05V_S0
VCC1_5_B VCC1_05 R285
K25 VCC1_5_B 2 1

1
SCD1U10V2KX-4GP

SC4D7U6D3V3MX-2GP
L23 R29 C412 C410 C405 0R0603-PAD
VCC1_5_B VCCDMIPLL
*Within a given well, 5VREF needs to be up before the L24 DY
VCC1_5_B 48mA

SC10U6D3V5MX-3GP
corresponding 3.3V rail L25 W23 1D05V_DMI_ICH_S0

2
VCC1_5_B VCCDMI
M24 VCC1_5_B VCCDMI Y23
M25 1D05V_S0
N23
VCC1_5_B
AB23 2mA
47mA N24
VCC1_5_B
VCC1_5_B
V_CPU_IO
V_CPU_IO AC23
3D3V_S0 5V_S0 1D5V_S0 1D5V_APLL_S0 N25 3D3V_S0
L35 VCC1_5_B

1
P24 AG29 C401 C413 C404
VCC1_5_B VCC3_3

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
1 2 P25 C747 C425
VCC1_5_B
2

VCCA3GP
IND-1D2UH-5-GP R24 AJ6 SCD1U10V2KX-4GP SC4D7U6D3V3MX-2GP

2
VCC1_5_B VCC3_3

1
R518 R25 SCD1U10V2KX-4GP

2
CH751H-40PT 100R2J-2-GP C764 C762 VCC1_5_B
R26 AC10
2mA VCC1_5_B VCC3_3 VCC3_3=308mA

SC10U6D3V5MX-3GP

SC1U10V2KX-1GP
D22 R27

2
VCC1_5_B 3D3V_S0
T24 AD19
1

V5REF_S0 VCC1_5_B VCC3_3 3D3V_VCCPCORE_ICH_S0 R297


T27 VCC1_5_B VCC3_3 AF20 2 1

1
T28 AG24 C422 0R0603-PAD 3D3V_S0
C VCC1_5_B VCC3_3 C
1

T29 AC20 3D3V_S0


C670 VCC1_5_B VCC3_3 SCD1U10V2KX-4GP
U24 2 1 R607

VCCP_CORE

2
SC1U10V2KX-1GP VCC1_5_B 0R2J-2-GP 1D5V_S0
U25 B9
2

VCC1_5_B VCC3_3

1
V24 F9 C390 C377 C388 C411
VCC1_5_B VCC3_3 11mA

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
V25 G3 DY 3.3V_1.5V_HDA 2 DY 1 R609
VCC1_5_B VCC3_3

1
U23 G6 C755 0R2J-2-GP

2
VCC1_5_B VCC3_3

SCD1U10V2KX-4GP
Layout Note: 3D3V_S5 5V_S5 W24 J2 SB
Place near ICH9 VCC1_5_B VCC3_3
W25 J7

2
VCC1_5_B VCC3_3 3D3V_S5
K23 VCC1_5_B VCC3_3 K7
2

Y24

PCI
R585 VCC1_5_B 3.3V_1.5V_HDA
Y25 AJ4 2 1 R606
CH751H-40PT 100R2J-2-GP 1D5V_S0 1.342A VCC1_5_B VCCHDA 0R2J-2-GP 1D5V_S0
2mA D29 AJ19 VCCSATAPLL VCCSUSHDA AJ3 3.3V_1.5V_SUS_HDA 11mA

1
C754 3.3V_1.5V_SUS_HDA 2 1 R608
1

SCD1U10V2KX-4GP
V5REF_S5 AC16 AC8 VccSus1_05[1] TP69 TPAD28 0R2J-2-GP
VCC1_5_A VCCSUS1_05
1

AD15 F17 VccSus1_05[2] TP63 TPAD28


DY

2
VCC1_5_A VCCSUS1_05
1

C423 C416 AD16 SB


VCC1_5_A
SC1U10V2KX-1GP

SC1U10V2KX-1GP

ARX
C737 AE15 AD8 VccSus1_5[1] TP70 TPAD28
2

SC1U10V2KX-1GP VCC1_5_A VCCSUS1_5


AF15
2

VCC1_5_A VccSus1_5[2]
AG15 VCC1_5_A VCCSUS1_5 F18

1
AH15 C392
VCC1_5_A SCD1U10V2KX-4GP
AJ15 VCC1_5_A
A18 3D3V_S5

2
VCCSUS3_3
AC11 VCC1_5_A VCCSUS3_3 D16
AD11 VCC1_5_A VCCSUS3_3 D17

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AE11

VCCPSUS
VCC1_5_A VCCSUS3_3 E22

1
ATX
AF11 C385 C374 C389
VCC1_5_A

SCD1U10V2KX-4GP
AG10 VCC1_5_A DY DY
AG11 AF1
212mA

2
VCC1_5_A VCCSUS3_3
AH10 VCC1_5_A
1

B C424 C415 AJ10 T1 B


VCC1_5_A VCCSUS3_3
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VCCSUS3_3 T2
AC9 T3 3D3V_S5
2

VCC1_5_A VCCSUS3_3
DY VCCSUS3_3 T4
AC18 VCC1_5_A VCCSUS3_3 T5

SCD1U10V2KX-4GP
AC19 VCC1_5_A VCCSUS3_3 T6

1
DY U6 C406 C402 C403
VCCSUS3_3

SCD022U16V2KX-3GP

SCD022U16V2KX-3GP
AC21 VCC1_5_A VCCSUS3_3 U7
V6

2
VCCSUS3_3
G10 V7
VCCPUSB

VCC1_5_A VCCSUS3_3
G9 VCC1_5_A VCCSUS3_3 W6
VCCSUS3_3 W7
AC12 VCC1_5_A VCCSUS3_3 Y6
AC13 VCC1_5_A VCCSUS3_3 Y7
1D5V_S0 AC14 T7
USBPLL=11mA VCC1_5_A VCCSUS3_3
AJ5 VCCUSBPLL VCCCL1_05 G22 VccSus1_05[3]

1
C395
1

SCD1U10V2KX-4GP
C414 C409 C408 AA7 VCC1_5_A VCCCL1_5 G23 VccSus1_5[3]

1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

USB CORE

SCD1U10V2KX-4GP DY AB6 C394

2
VCC1_5_A 3D3V_S0

SCD1U10V2KX-4GP
AB7 A24 DY
2

VCC1_5_A VCCCL3_3 3D3V_ICH_CL_S5 R515


AC6 B24 2 1

2
3D3V_S0 VCC1_5_A VCCCL3_3 0R0603-PAD
AC7
19mA in S0;78mA in S3/S4/S5
VCC1_5_A 19mA
1 R509
2 VccLan1D05 A10 VCCLAN1_05
1

0R0603-PAD C376 A11 VCCLAN1_05


1

C672 C671 SCD1U10V2KX-4GP


1D5V_S0
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY A12
2

VCCLAN3_3
B12
23mA
2

L33 VCCLAN3_3
2 1 1D5VGLANPLL_ICH A27
IND-1D2UH-5-GP VCCGLANPLL
A A
1

1
SC2D2U10V3KX-1GP

GLAN POWER

D28 VCCGLAN1_5
C661 C658 D29
SC10U6D3V5MX-3GP VCCGLAN1_5
E26
2

1D5V_S0 VCCGLAN1_5
80mA E27 VCCGLAN1_5 Wistron Corporation
SCD1U10V2KX-4GP

A26 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


C685 VCCGLAN3_3 Taipei Hsien 221, Taiwan, R.O.C.
1

C686 3D3V_S0
DY 1mA ICH9M-GP-NF Title
SC4D7U6D3V3KX-GP R516 3D3V_GLAN_S0
2 1
ICH9-M (3 of 4)
2

0R0603-PAD 71.ICH9M.00U
Size Document Number Rev

D45/D46 PD

WWW.AliSaler.Com 5 4 3 2
Date: Friday, March 14, 2008 Sheet
1
18 of 47
A B C D E

U57E 5 OF 6

AA26 VSS VSS H5


AA27 VSS VSS J23
AA3 VSS VSS J26
AA6 VSS VSS J27
AB1 VSS VSS AC22
AA23 VSS VSS K28
AB28 VSS VSS K29
AB29 VSS VSS L13
AB4 VSS VSS L15
AB5 VSS VSS L2
AC17 VSS VSS L26
4 AC26 VSS VSS L27 4
AC27 VSS VSS L5
AC3 VSS VSS L7
AD1 VSS VSS M12
AD10 VSS VSS M13
AD12 VSS VSS M14
AD13 VSS VSS M15
AD14 VSS VSS M16
AD17 VSS VSS M17
AD18 VSS VSS M23
AD21 VSS VSS M28
AD28 VSS VSS M29
AD29 VSS VSS N11
AD4 VSS VSS N12
AD5 VSS VSS N13
AD6 VSS VSS N14
AD7 VSS VSS N15
AD9 VSS VSS N16
AE12 VSS VSS N17
AE13 VSS VSS N18
AE14 VSS VSS N26
AE16 VSS VSS N27
AE17 VSS VSS P12
AE2 VSS VSS P13
AE20 VSS VSS P14
AE24 VSS VSS P15
AE3 VSS VSS P16
AE4 VSS VSS P17
AE6 VSS VSS P2
3 AE9 P23 3
VSS VSS
AF13 VSS VSS P28
AF16 P29 3D3V_S5 3D3V_S0
VSS VSS
AF18 VSS VSS P4
AF22 VSS VSS P7
AH26 VSS VSS R11
AF26 VSS VSS R12
AF27 VSS VSS R13

8
7
6
5
SRN4K7J-10-GP
AF5 VSS VSS R14
AF7 R15 RN31
VSS VSS
AF9 VSS VSS R16
AG13 VSS VSS R17
AG16 VSS VSS R18
AG18 R28

1
2
3
4
VSS VSS
AG20 VSS VSS T12
AG23 VSS VSS T13
AG3 VSS VSS T14
AG6 T15 5V_S0
VSS VSS
AG9 VSS VSS T16
AH12 VSS VSS T17
AH14 VSS VSS T23
AH17 VSS VSS B26
AH19 VSS VSS U12
AH2 VSS VSS U13
AH22 VSS VSS U14
AH25 U15 Q7
VSS VSS 2N7002DW-1-GP
AH28 VSS VSS U16 17,25 SMB_CLK 3 4 SMBC_ICH 3,12
AH5 VSS VSS U17
AH8 VSS VSS AD23 2 5
2 2
AJ12 VSS VSS U26
AJ14 VSS VSS U27 1 6
AJ17 VSS VSS U3
AJ8 VSS VSS V1
B11 VSS VSS V13 17,25 SMB_DATA
B14 VSS VSS V15 SMBD_ICH 3,12
B17 VSS VSS V23
B2 VSS VSS V28
B20 VSS VSS V29
B23 VSS VSS V4 Q13 & Q14 connect SMLINK and
B5 VSS VSS V5 SMBUS in S) for SMBus 2.0
B8 VSS VSS W26
C26 W27
compliance
C27
VSS
VSS
VSS
VSS W3 SMBUS
E11 VSS VSS Y1
E14 VSS VSS Y28
E18 VSS VSS Y29
E2 VSS VSS Y4
E21 VSS VSS Y5
E24 VSS VSS AG28
E5 VSS VSS AH6
E8 VSS VSS AF2
F16 VSS VSS B25
F28
AH1,AJ1,AJ2,AH29,AJ28,AJ29

VSS
F29 VSS NCTF_VSS#A1 A1 TP110
G12 VSS NCTF_VSS#A2 A2 TP111
G14
A1,A2,B1,A28,A29,B29

VSS NCTF_VSS#B1 B1 TP122


G18 VSS NCTF_VSS#A29 A29 TP114
NCTF TEST PIN:

1 G21 VSS NCTF_VSS#A28 A28 TP116 1


G24 VSS NCTF_VSS#B29 B29 TP121
G26 VSS NCTF_VSS#AJ1 AJ1 TP136
G27
G8
VSS
VSS
NCTF_VSS#AJ2
NCTF_VSS#AH1
AJ2
AH1
TP143
TP133
Wistron Corporation
H2 AJ28 TP145 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VSS NCTF_VSS#AJ28 Taipei Hsien 221, Taiwan, R.O.C.
H23 VSS NCTF_VSS#AJ29 AJ29 TP137
H28 VSS NCTF_VSS#AH29 AH29 TP134
H29 Title
VSS
ICH9-M (4 of 4)
ICH9M-GP-NF Size Document Number Rev

D45/D46 PD
71.ICH9M.00U
Date: Friday, March 14, 2008 Sheet 19 of 47
A B C D E
Digital Output Data Bits
TEMP.
Sign MSB LSB EXT
+127.875 0 111 1111 111
+126.375 0 111 1110 011
+25.5 0 001 1001 100
+1.75 0 000 0001 110
+0.5 0 000 0000 100 5V_S0

+0.125 0 000 0000 001


-0.125 1 111 1111 111

1
FAN1_VCC
-1.125 1 111 1110 111 R383
FAN1_VCC 10KR2J-3-GP
-25.5 1 110 0110 100 *Layout* 15 mil

2
ACES-CON3-GP-U1
-55.25 1 100 1000 110
5

1
SCD1U16V2ZY-2GP
-65.000 1 011 1111 000 C93 C95 C45 FAN1_FG1 3
SC4D7U6D3V3KX-GP SC2200P50V2KX-2GP 2

2
D7 1
BAS16-1-GP 4

1
*Layout* 15 mil

2
C465 FAN1
SC1KP50V2KX-1GP

2
5V_S0 5V_S0 U8
R90 H_THERMDA 4
*Layout* 30 mil
1 2 5V_G792_S0 6 1
VCC FAN1

1
SC1U16V3ZY-GP

10R3J-3-GP 2 G792_RESET#
RESET#
1

20 4 C85
DVCC FG1

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
C96 C57 14 G792_32K SC2200P50V2KX-2GP

2
CLK
1

1
SC4D7U10V5ZY-3GP C62 C58 H_THERMDC 4
2

R89 7 13 G792_THERM#
G792_DXP2 DXP1 THERM# V_DEGREE
4K99R2F-L-GP 9 3 1.For CPU Sensor
2

2
G792_DXP3 DXP2 THERM_SET
11 DXP3
2

SGND 8
ALERT# 15 10 G792_DXN2 G792_DXP2
ALERT# SGND G792_DXN3
28 SMBD_G792 16 SDA SGND 12
Setting T8 as V_DEGREE 18

C
28 SMBC_G792 SCL

1
5 C92 C511 Q14
DGND
1

90 Degree 19 NC#19 DGND 17 B MMBT3904-3-GP


R88 SC470P50V3JN-2GP

2
49K9R2F-L-GP SC2200P50V2KX-2GP

E
V_DEGREE G7921SF1U-GP
=(((Degree-72)*0.02)+0.34)*VCC
2

2
74.07921.079 G14 G15 2.System Sensor,
Put between CPU and NB. G10
G792_DXP3 2 1 VGA_G792_P 42
DXP1:108 Degree (CPU) GAP-CLOSE GAP-CLOSE

1
DXP2:H/W Setting 100(System)

1
3D3V_S5 C71 C70
DXP3:105 Degree (SYSTEM)
SC2200P50V2KX-2GP SC470P50V2KX-3GP
G11

2
U66
1 PM_SLP_S3# 17,25,28,30,34,35,36,37 G792_DXN3 2 1
B VGA_G792_N 42
5 VCC
Place near chip as close
2 G792_RESET# as possible 3.VGA SENSOR
A
7,17 PWROK 4 Y
GND 3
1

SB
74LVC1G08GW-1-GP R86
100KR2J-1-GP 3D3V_S0
2

1
R73
10KR2J-3-GP
32K suspend clock output 3D3V_S5

2
U5 ALERT# 2 R76 1 0R2J-2-GP THRM# 17
17,25,28,30,34,35,36,37 PM_SLP_S3# 1 B R77
DY
VCC 5
17 PM_SUS_CLK 2 10R2J-2-GP G792_THERM# 2 R78 1 0R2J-2-GP EC_RST# 28
A G792_32K
Y 4 1 2
3 GND
1

3D3V_AUX_S5
74LVC1G08GW-1-GP R71
100KR2J-1-GP
3D3V_AUX_S5
2

SB SB
R66 D4
10KR2J-3-GP 1N4148W-7-F-GP

U6
2

EC_RST# 1 B
VCC 5
28 S5_ENABLE 2 A
Y 4 PWR_S5_EN 33
Wistron Corporation
3 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
GND Taipei Hsien 221, Taiwan, R.O.C.
DY
1

74LVC1G08GW-1-GP 2 R69
1 INTRUDER# 16
C63 0R2J-2-GP Title
SC1U10V3ZY-6GP
Thermal/Fan Controllor
2

1 R68
2 (dummy, KBC already delay) Size Document Number Rev
0R2J-2-GP
D45/D46 PD
DY Date: Friday, March 14, 2008 Sheet 20 of 47

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SATA HD Connector
SATA1
ODD Connector
45
NP1
1

2
3
4
5 ODD1
6 8
7
S1 8 S1 NP1
16 SATA_TXP0 S2 9 16 SATA_TXP1 S2
16 SATA_TXN0 S3 10 CLOSE TO ODD 16 SATA_TXN1 S3
S4 11 S4
16 SATA_RXN0_C SCD01U25V2KX-3GP C725 1 2 SATA_RXN0 S5 12 16 SATA_RXN1_C SCD01U25V2KX-3GP C559 2 1 SATA_RXN1 S5
16 SATA_RXP0_C SCD01U25V2KX-3GP C717 1 2 SATA_RXP0 S6 13 16 SATA_RXP1_C SCD01U25V2KX-3GP C557 2 1 SATA_RXP1 S6
S7 14 S7
5V_S0
CLOSE TO SATA HDD 15
ODD_DP P1
16
17 P2
18 P3
19 ODD_MD P4

1
20 TP92 P5
21 D20 C529 TC19 P6 NP2

1
SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP
SSM24PT-GP
1A 22 9

2
2A 23 DY R458
3A 24 SKT-SATA7P+6P-14-GP-U1

10KR2J-3-GP
4A 25
5V_S0 5A 26

2
6A 27
7A 28
8A 29
9A 30
K

C379 TC10 10A 31


D9 11A 32
SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

12A 33
2

SSM24PT-GP 13A 34
14A 35
A

15A 36
37
38
39
40
41
42
43
44
NP2
46

CON44+15P+S7-2GP

20.F0885.001

LAUNCH BUTTON
3D3V_AUX_S5
WIRELESS BUTTON
1

3D3V_S0
R369
100KR2J-1-GP
2

PWR_BUTTON R342
WB1
1 10KR2J-3-GP
PWR1 R368 2
2

1 3 1 2 KBC_PWRBTN# 28
3 WIRELESS_BTN# 28
5 470R2J-2-GP 4
1

C443 5
1

2 4 6 C432
SCD1U16V2ZY-2GP 7
2

SW-TACT-91-GP 8 SCD1U16V2ZY-2GP
2

62.40009.561 NP1
NP2

SW-SLIDE61-GP-U

62.40018.351 ZZZZ

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
HDD / CDROM / LAUNCH
Size Document Number Rev

D45/D46 PD
Date: Friday, March 14, 2008 Sheet 21 of 47
USB BOARD CONN
USBCN1
5V_S5 21

1 5V_S5

1
C533 100 mil 5V_USB1_S3 2

1
U42 3 C450
SCD1U16V2ZY-2GP 3 8 4

2
IN#3 OUT#8 SCD1U16V2ZY-2GP
2 7 5

2
IN#2 OUT#7

1
6 C539 C537 EC96 TC20 6
OUT#6

SC4D7U10V5ZY-3GP

SCD1U16V2ZY-2GP

SC1KP50V2KX-1GP
ST100U10VCM-GP 7 USB_PWR_EN#
17 USB_OC#0 5 8

2
OC#
28 USB_PWR_EN# 4 EN/EN# GND 1 9
PD 10 USBPN2 17
G545A2P8U-GP DY 11 USBPP2 17
12
13 USBPN3 17
14 USBPP3 17
15
74.00545.A79 16 USBPN4 17
17 USBPP4 17
18
19 USB_OC#2 17
20

22

ACES-CON20-2-GP
20.K0261.020

Bluetooth 9
BLUETOOTH1

1 5V_USB1_S3

17 USBPP5 2
17 USBPN5 3 ESATA1
25 WIFI_BUSY 4 8 10
28 BLUETOOTH_EN 5 NP1
25 BT_BUSY 6 CLOSE TO E-SATA CONNECTOR
3D3V_BT_S0 7 1 R464 2 USB_0- 1A 1
17 USBPN0
8 0R0402-PAD 2 SATA_RXP5 C553 1 2SCD01U25V2KX-3GP SATA_RXP5_C 16

1
2A 3 SATA_RXN5 C556 1 2SCD01U25V2KX-3GP SATA_RXN5_C 16
R373 10 DY EC128 4
1 2 SC5P50V2CN-2GP 3A 5 SATA_TXN5 SATA_TXN5 16

2
6 SATA_TXP5 SATA_TXP5 16
0R3-0-U-GP 1 R466 2 USB_0+ 4A 7
17 USBPP0
DY change BT cable 0R0402-PAD
NP2

1
ACES-CON8-4-GP-U 9 11
U26 DY EC129
SC5P50V2CN-2GP SKT-SATA+USB11P-2-GP

2
3D3V_S0 5 IN#5
6 IN#6 GND 4
1

C446 7 3 BLUETOOTH_EN 28
IN#7 EN 3D3V_BT_S0
8 IN#8 OUT 2
SCD1U16V2ZY-2GP 9 1
PD USE 22.10218.Z71
2

GND IN#1
2

R374 EC74
G5281RC1U-GP
74.05281.093
10KR2J-3-GP
SC220P50V2JN-3GP eSATA/USB
2
1

MDC
SC4D7U10V5ZY-3GP

MDC1
2

C699
NP1
14
1

13 15
1 2

16,29 ACZ_SDATAOUT ACZ_SDATAOUT 3 4


5 6 3D3V_S5
16,29 ACZ_SYNC ACZ_SYNC 7 8
16 ACZ_SDATAIN1 1 2ACSDATAIN1_A 9 10
ACZ_RST#
R538 39R2J-L-GP 11 12
16,29 ACZ_RST# ACZ_BTCLK_MDC 16
16 18
17
1

NP2 C700
1

C689 R539
SC4D7U10V5ZY-3GP

SC22P50V2JN-4GP
ZZZZ
2

100KR2J-1-GP

TYCO-CONN12A-4-GP C690
DUMMY-C2

Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title
PD
Size
USB / MDC / BLUETOOTH
Document Number Rev

D45/D46 PD
Date: Friday, March 14, 2008 Sheet 22 of 47

WWW.AliSaler.Com
R61 10KR2J-3-GP 3D3V_LAN_S5 AVDD33
3D3V_S0 1 2 They are for U5 AVDD33
DY R43
1 2
20 mils pin-2 and 59
R70

1
DY PD 0R0603-PAD C50 C43

2
17,25,41 PCIRST1# 1 2 LAN_PERSTB G12 G13
1 2 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
3D3V_S5 3D3V_LAN_S5

2
PD
47R2J-2-GP 3D3V_S0 GAP-CLOSE-PWR
GAP-CLOSE-PWR

1
U4

1 5
60 ~ 100 mils VDD33
A VCC
2 B
3 GND Y 4 SB

1
C79 C83 C88 C37 C76 C72
VDD33 SC22U6D3V5MX-L2GP
NC7S08M5X-NL-GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

2
PD SCD1U16V2ZY-2GP DY
PD
1

R85 R82 SB They are for U5 VDD33


3K6R3-GP 10KR2J-3-GP pin-16,37,46 and 53
DY VDD33
U9
2

C98

SCD1U16V2ZY-2GP
LAN_EECS 1 8
CS VCC

1
LAN_EESK 2 7 EEPROM LED OPTION USE '01'
LAN_EEDI SK DC
3 6
LAN_EEDO 4
DI ORG
5
(DEFINED IN SPEC)

2
DO GND
=> LED0 : ACT
AT93C46DN-SH-B-GP => LED1 : LINK
(BOTH 10/100 AND GIGA CHIP)
C52 Only For 8111C
Closing chip pin1 FB12 They are for U5 AVDD18
2 1 AVDD18
pin-5,8,11 and 14
L1
R39
40 mils 40 mils
1

VDD33 SC15P50V2JN-2-GP CTRL18 1 2 1 2 AVDD18


X1
XTAL-25MHZ-102-GP 0R3-0-U-GP
IND-4D7UH-113-GP

1
8101E REMOVE C39 C40 C41 C27
C48
2
1

1
8111B REMOVE 82.30020.851 C34

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
R63 2 1 8101E mount 2K
8111C STUFF

2
1

SCD1U16V2ZY-2GP
0R2J-2-GP 8111B,8111C mount 2.49k SB C42

2
SC22U6D3V5MX-L2GP
SC15P50V2JN-2-GP
2

2
ACT_LED# 24
LINK100 24
R59 LINK1G 24
They are for U5 EVDD18
1 2
CTRL15/VDD33

pin-22 and 28
RTL_RSET_1

ACT_LED#

2K49R2F-GP R47
DVDD15

DVDD15

DVDD15

20 mils
AVDD33

LINK100
LAN_X2
LAN_X1

LINK1G
VDD33

EVDD18
GVDD

1 2

0R3-0-U-GP

1
C51 C56
PD USE 71.08111.E03

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49

2
1
U7
Only For 8111C R48
OGPIO
GND
RSET
VDDSR
ENSR
CKTAL2
CKTAL1
AVDD33
AVDD12
LED0
LED1
LED2
LED3

IGPIO
VDD33
DVDD12

DVDD12

0R3-0-U-GP

2
CTRL18 1 48 LAN_EESK
AVDD33 SROUT12 EESK LAN_EEDI
2 AVDD33 EEDI/AUX 47
MDIP0 3 46 VDD33
24 MDIP0 MDIN0 MDIP0 VDD33 LAN_EEDO 3D3V_S0
24 MDIN0 4 MDIN0 EEDO 45
AVDD18/FB12 5 44 LAN_EECS They are for U5 DVDD15
MDIP1 FB12 EECS DVDD15
24 MDIP1 6 MDIP1 DVDD12 43 pin-15,21,32,33,38,41,43,49,52 and 58
1

MDIN1 7 42
24 MDIN1 AVDD18 MDIN1 NC#42 DVDD15 R83
MDIP2
8
9
AVDD12 NC#41 41
40 1KR2J-1-GP 40 mils DVDD15
24 MDIP2 MDIN2 MDIP2 NC#40
24 MDIN2 10 MDIN2 NC#39 39
AVDD18 11 38 DVDD15 DY DY DY
2

AVDD12 DVDD12

1
MDIP3 12 37 VDD33 C38 C49 C68 C73 C74 C75 C66 C60 C53 C36
24 MDIP3 MDIN3 MDIP3 VDD33 ISOLATE#
24 MDIN3 13 MDIN3 ISOLATE# 36

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
AVDD18 14 35

2
AVDD12 NC#35
1

DVDD15 15 34
VDD33 NC#15 NC#34 R84
16 33
LANWAKE#

REFCLK_N

VDD33 CLKREQB
REFCLK_P

15KR2F-GP
DVDD12

DVDD12
PERST#

EVDD12

EVDD12
NC#17
NC#18

EGND

HSON
EGND
HSOP
HSIN
HSIP

G9
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

AGND 1 2 RTL8111C-VB-GR-GP

GAP-CLOSE-PWR AVDD18/FB12 1 R49 2 0R2J-2-GP FB12


PCIE_RXN1_1
PCIE_RXP1_1

CTRL15/VDD33
DVDD15

DVDD15
EVDD18

EVDD18

PD ZZZZ
AGND

AGND

R52
17,25,26 PCIE_WAKE# 1 R56 2 PCIE_WAKE#_R SB
0R0402-PAD LAN_PERSTB 1 2 VDD33
Wistron Corporation
K

17 PCIE_TXP1 PCIE_TXP1
1

17 PCIE_TXN1 PCIE_TXN1 C47 C30 D3 0R3-0-U-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
3 CLK_PCIE_LAN CLK_PCIE_LAN SC22U6D3V5MX-L2GP
MMPZ5226BPT-GP Taipei Hsien 221, Taiwan, R.O.C.
3 CLK_PCIE_LAN# CLK_PCIE_LAN# SCD1U16V2ZY-2GP DY
2

17 PCIE_RXP1 PCIE_RXP1 C61 2 1 SCD1U10V2KX-5GP Title


A

PCIE_RXN1 C64 2 1 SCD1U10V2KX-5GP


17 PCIE_RXN1
LAN RTL8111C
Size Document Number Rev
Layout - 1:0.1u first,2: 22u,3:D33 PD
D45/D46Sheet
Date: Friday, March 14, 2008 23 of 47
5 4 3 2 1

D Lan Conn D

RJ1
9
LINK100 A1
23 LINK100
3D3V_LAN_S5 1 2 CONN_PWR_1 CONN_PWR_1 A2
R367 470R2J-2-GP LINK1G A3
23 LINK1G RJ45_1 1
1 2 CONN_PWR_2
R347 470R2J-2-GP RJ45_2 2
RJ45_3 3
XF1 RJ45_4 4
RJ45_5 5
MDIP2 5 8 RJ45_4 RJ45_6 6
23 MDIP2 MDIN2 TD+ TX+ RJ45_5 RJ45_7
23 MDIN2 6 TD- TX- 7 7
RJ45_8 8
1 MDIP3 MDIP3 23 LINK100 CONN_PWR_2 B1
RD+ MDIN3 LINK1G
4 CT RD- 2 MDIN3 23
MCT3 9 ACT_LED# B2
MCT4 CT RJ45_7 23 ACT_LED#
10 CT RX+ 12 10

1
CT 3 11 RJ45_8
CT RX- EC69 EC68 EC62 RJ45-125-GP-U1
SC1KP50V2JN-2GP SC1KP50V2JN-2GP SC1KP50V2JN-2GP

2
1

C16 C13 DY DY DY 22.10277.021


SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

XFORM-230-GP
2

C C
XF2

MDIP0 5 8 RJ45_1
23 MDIP0 MDIN0 TD+ TX+ RJ45_2
23 MDIN0 6 TD- TX- 7
EML2
1 MDIP1 MDIP1 23
RD+ MDIN1 MDC_TIP SB
4 CT RD- 2 MDIN1 23 1 2
MCT1 9
MCT2 CT RJ45_3 RJ2
10 CT RX+ 12 HFB1608VF-102-GP
3 11 RJ45_6 MDC2
CT RX-
4 3
NP1
1

C14 C15 2 MDC_TIP_L


EML1
SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

XFORM-230-GP 1
1 MDC_RING_L 1 2 MDC_RING 2
2

1000Mbps Lan Transformer 3 NP2


HFB1608VF-102-GP
4
ETY-CON2-10-GP
20.F0984.002
RJ11-10-GP
SB

62.10044.201

RN3
B MCT4 B
1 8
MCT3 2 7 LAN_TERMINAL 1 2
MCT2 3 6
MCT1 4 5 C6 SC1KP3KV8KX-GP

SRN75J-1-GP 1.route on bottom as differential pairs.


2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.

A ZZZZ A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LAN Connector
Size Document Number Rev

D45/D46 PD
Date: Friday, March 14, 2008 Sheet 24 of 47
5 4 3 2 1

WWW.AliSaler.Com
A B C D E

Newcard Frame Newcard Head


SKT1

Mini Card Connector 1

CARDBUS2P-15-GP
2

28
NP2
NEWCARD1

WLAN1 21.H0146.001 3D3V_NEW_S0 26


17 PCIE_TXP4 25
17 PCIE_TXN4 24

1
1D5V_S0 6 13 CLK_PCIE_MINI1 3 PCIE_TXN4 C364 C363 23
1.5V REFCLK+

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP
11 CLK_PCIE_MINI1# 3 PCIE_TXP4 22
REFCLK- 17 PCIE_RXP4
3D3V_S5 2 17 PCIE_RXN4 21

2
3.3V PCIE_RXN4
4
PERN0 23 PCIE_RXN3 17 20 4
28 25 PCIE_RXP4 3 CLK_PCIE_NEW 19
+1.5V PERP0 PCIE_RXP3 17
48 +1.5V 3 CLK_PCIE_NEW# 18
PD 31 PCIE_TXN3 17 USBPN10 USBPP10 CPPE# 17
PETN0 TP101 CONN_CLKREQ#
52 +3.3V PETP0 33 PCIE_TXP3 17 16
15

1
24 36 USBPN8 17 C842 C843 C844 C845 C846 C847 14
+3.3VAUX USB_D- DY DY DY DY DY DY PERST#
USB_D+ 38 USBPP8 17 R728 13
0R2J-2-GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP
3D3V_NEW_S5 12

2
BT_BUSY 3 30 SMB_CLK 17,23,26 PCIE_WAKE# 1 2 11
22 BT_BUSY RESERVED#3 SMB_CLK
WIFI_BUSY 5 32 SMB_DATA 10
22 WIFI_BUSY RESERVED#5 SMB_DATA

2
8 RESERVED#8 9

1
R557 10 C361 SMB_DATA 8
RESERVED#10 17,19 SMB_DATA
10KR2J-3-GP 12 1 MINI_WAKE# TP129 SMB_CLK 7
RESERVED#12 WAKE# 17,19 SMB_CLK
14 7 MINI_REQ# TP128 SCD1U16V2ZY-2GP CONN_TP2 6
DY

2
RESERVED#14 CLKREQ# PLT_RST1#_WLAN CONN_TP3
16 22 1 R547 2 PCIRST1# 17,23,41 PD TP55 5
1

E51_RxD RESERVED#16 PERST# 0R0402-PAD TP54 CPUSB#


28 E51_RxD 17 RESERVED#17 4
E51_TxD 19 17 USBPP10 3
28 E51_TxD RESERVED#19
28 WIRELESS_EN WIRELESS_EN 20 4 PD 17 USBPN10 2
RESERVED#20 GND
37 RESERVED#37 GND 9 1D5V_NEW_S0
39 RESERVED#39 GND 15 1
41 18 3D3V_S5 1D5V_S0 3D3V_S5 NP1
RESERVED#41 GND

1
DY 43 21 C358 C360 27
RESERVED#43 GND

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP
17 C_LINK_CLK C_LINK_CLK R654 0R2J-2-GP
DY
2 1C_LINK_CLK_1 45 26
C_LINK_DAT R655 0R2J-2-GP RESERVED#45 GND
17 C_LINK_DAT DY
2 1C_LINK_DAT_1 47 27 CARDBUS26P-7GP

2
RESERVED#47 GND

1
17 C_LINK_RST C_LINK_RST R656 0R2J-2-GP
2 1C_LINK_RST_1 49 29 C652 C727 C688 C720 C634 SMB_CLK 62.10024.861
RESERVED#49 GND

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
5V_AUX_S5 51 RESERVED#51 GND 34
35

2
GND

1
GND 40
3 PD TP120 LED_WWAN# 42 50 EC50 3
TP119 LED_WLAN# LED_WWAN# GND SC22P50V2JN-4GP
44 53

2
TP118 LED_WPAN# LED_WLAN# GND
46 54 DY

NP1
NP2
LED_WPAN# GND
Place them Near to Chip
SKT-MINI52P-5-GP-U 1D5V_S0

NP1
NP2

1
C359
CLK_PCIE_NEW# SCD1U16V2ZY-2GP

2
PD CLK_PCIE_NEW
3D3V_NEW_S0 1D5V_NEW_S0
SIM_CCCLK SIM_CCVCC

1
C643 C642

WWAN Connector SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

1
C848 C849
(ROBISON RESERVE)

2
2

1
DY DY

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP
2

2
D5
FTZ6D8E-GP
Check power trace WWAN1
SIM
3D3V_S5
3D3V_S0

1
C633

1
1D5V_S0 6 13 CLK_PCIE_MINI2 3 C635 SCD1U16V2ZY-2GP
GAP-CLOSE-PWR G120 1.5V REFCLK+ SCD1U16V2ZY-2GP U50

12
11
17
15
11 CLK_PCIE_MINI2# 3

2
REFCLK-

2
3
3D3V_S5 1 2 WLANPW 2

2
3.3V
23

3_3VIN

1_5VIN

AUXIN
3_3VOUT

1_5VOUT

AUXOUT
PERN0 PCIE_RXN2 17
G122 GAP-CLOSE-PWR 28 25 SIM_CCRST SIM_CCIO
+1.5V PERP0 PCIE_RXP2 17
1 2 48 +1.5V
2 3D3V_S0 2
PETN0 31 PCIE_TXN2 17
52 33 PCIE_TXP2 17 R493 3D3V_NEW_S5
SB +3.3V PETP0
7,17,26,27,28 PLT_RST1# 1 2PLT_RST1#_577 6 SYSRST# 3_3VIN 4 3D3V_S0

1
24 36 USBPN9 17 CPPE# 10 5 3D3V_NEW_S0 C637
+3.3VAUX USB_D- CPPE# 3_3VOUT
2

38 0R0402-PAD CPUSB# 9 13 1D5V_NEW_S0 SCD1U16V2ZY-2GP


USB_D+ USBPP9 17 CPUSB# 1_5VOUT
R652 PERST# 8 14 1D5V_S0

2
TP85 WWAN_MIC1N SMB_CLK PERST# 1_5VIN
3 RESERVED#3 SMB_CLK 30 DUMMY-R2 17,28,34,35 PM_SLP_S4# 20 SHDN# NC#16 16
TP83 WWAN_SPK1P 5 32 SMB_DATA
SIM_CCVCC RESERVED#5 SMB_DATA CLK_PCIE_MINI2# CLK_PCIE_MINI2
8 RESERVED#8

RCLKEN
SIM_CCIO 10

STBY#
1

SIM_CCCLK RESERVED#10 WWAN_MIC1P TP84


12 1

GND

GND
OC#
RESERVED#12 WAKE#
1

1
SIM_CCRST 14 7 WWAN_SPK1N TP82 DY
RESERVED#14 CLKREQ# PLT_RST1#_WWAN PLT_RST1# DY C838 C839
16 RESERVED#16 PERST# 22 1 2
1

R396 SC15P50V2JN-2-GP SC15P50V2JN-2-GP 3D3V_S5


17 DY
2

1
18
19
21

7
C369 RESERVED#17 0R0402-PAD G577BR91U-GP
DY SC15P50V2JN-2-GP
19 RESERVED#19 SRN10KJ-5-GP
20 4 PD
2

28 WWAN_EN RESERVED#20 GND CPPE#


37 RESERVED#37 GND 9 17,20,28,30,34,35,36,37 PM_SLP_S3# 2 3
39 15 1 4 CPUSB#
RESERVED#39 GND
2

41 18 WLANPW NEWCARD_OC#
R402 RESERVED#41 GND TP100 RN58
43 RESERVED#43 GND 21
10KR2J-3-GP 45 RESERVED#45 GND 26 PD
DY 47 RESERVED#47 GND 27
1

49 29 C493 C469 TC14 C803 C804 C805 SIM_CCVCC


1

RESERVED#49 GND
SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
ST100U10VCM-GP

51 RESERVED#51 GND 34
35 SIM1
2

GND
GND 40 DY
42 LED_WWAN# GND 50 1 VCC
44 53 DY DY SIM_CCRST 2
LED_WLAN# GND SIM_CCCLK RST
1 46 54 3 ZZZZ 1
NP1
NP2

LED_WPAN# GND CLK


1

C461 C457 5
1D5V_S0 SCD01U16V2KX-3GP SC4D7U6D3V3KX-GP GND
6 VPP
SB SIM SIM SIM_CCIO
SKT-MINI52P-5-GP-U 7
Wistron Corporation
NP1
NP2

I/O
8 GND
R380 9 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
GND
1

C458 C480 1 2 SIM_DET 10 Taipei Hsien 221, Taiwan, R.O.C.


3D3V_S0 CD
SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

FOR MINICARD 1.2 SPEC NP1 NP1


10KR2J-3-GP NP2 Title
2

NP2
SIM Mini Card/New Card
CARD-PUSH-7P-GP-U2 Size Document Number Rev

D45/D46 PD
Date: Monday, March 24, 2008 Sheet 25 of 47
A B C D E
3D3V_S0
POWER TRACE >40 MIL
1 R633 2 TAV33
Close to Pin 18,19 0R0603-PAD

1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U10V5KX-2GP

SCD1U10V2KX-4GP
C768 0R3-0-U-GP R621
2 1 Place L40, L42close to SK1
C763 C766 PD C744
C772

1
SCD33U10V3KX-3GP
R615 R631
CLOSE TO CHIP

1
SKT-1394-4P-35-GP-U1

2
56R2F-1-GP 56R2F-1-GP L40
6

2
TPBIAS0 TPA0+ 4
TPA0P DLW21HN900SQ2LGP TPA0- 3
DVDD18 TPA0N DY TPB0+ 2
POWER TRACE >40 MIL TPB0P R626
2 1
L41 2 1 APVDD TPB0N 0R3-0-U-GP TPB0- 1
C745 BLM15BB121SN-GP C769 C787 C788 5

4
C773
1

1
1394
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U10V5KX-2GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
R628 R630

1
C746 PUT UP ALL 5K11R2F-L1-GP 56R2F-1-GP

SC1KP50V2JN-2GP
L42 R629
2 1
2

2
COMPONENT ON 2 1 2 1 0R3-0-U-GP
0 OHM IF CHIP
DLW21HN900SQ2LGP
IS JMB385 DY
C771 R623
2 1 2 1

4
SC220P50V2KX-3DLGP 56R2F-1-GP

2 1
0R3-0-U-GP R622

Q24
1

DY
R632 AO3403-GP
12KR2J-L-GP 3D3V_CARD
JMB380 3D3V_S0 S
30mil Trace
D
2

D
G
R648
1KR2-N5
TPBIAS0

MDIO12

G
TREXT

TPA0N

TPB0N
TPA0P

TPB0P

TAV33

DY

2
CR1_PCTLN 1 R593
2
0R0603-PAD
C775 C782
36
35
34
33
32
31
30
29
28
27
26
25

1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U10V5KX-2GP
U64
C790 PD
TPA1P

TPB1P
TREXT
TPBIAS_1

TAV33
MDIO8
MDIO9
MDIO10
MDIO11
MDIO12
TPA1N

TPB1N

2
JMB385 CHANGE 400 K OHM TO 0 OHM
R658
For SD/MS Card Power
DVDD18 37 DV18 TCPS 24 1 2
XIN 38 23 MDIO13
XOUT TXIN/TOSC MDIC13 MDIO14
39 TXOUT MDIC14 22 402KR2F-GP
MDIO7 40 21
MDIO6 MDIO7 CR1_LEDN_GPIO0
41 MDIO6 DV33 20 3D3V_S0
MDIO5 42 19
MDIO4 MDIO5 DV33
43 MDIO4 DV18 18
CR1_PCTLN
DVDD18 R726 DY 0R2J-2-GP
3D3V_S0 44 17 D40
MDIO3 DV33 CR1_PCTLN_GPIO1 CR1_CD0N
45 MDIO3 CR1_CD0N_GPIO2 16 A K 1 2 PCIE_WAKE# 17,23,25
MDIO2 46 15 CR1_CD1N
MDIO1 MDIO2 CR1_CD1N_GPIO3 3D3V_CARD
47 14 RB751V-40-2-GP
MDIO0 MDIO1 SEECLK
48 MDIO0 SEEDAT 13

49 DY MS / MS PRO
GND
APCLKN

APREXT
APCLKP

APGND

SD / MMC
APVDD

APRXN
APRXP

APTXN
APTXP
XRST#
XTEST

APV18

USE 71.00380.003

1
C781 C778 C777

JMB380-QGAZ0A-GP SCD1U16V2ZY-2GP CARD1


1
2
3
4
5
6
7
8
9
10
11
12

2
SC1U10V3ZY-6GP
SCD1U16V2ZY-2GP
9 8 MDIO0
R727 SD_VCC MS_DATA0
APVDD

APVDD

0R2J-2-GP PCIE_RXP5_C C786 1 2SCD1U10V2KX-5GP 16 7 MDIO1


PCIE_RXP5 17 MS_VCC MS_DATA1
1 2 PCIE_RXN5_C C783 1 2SCD1U10V2KX-5GP 10 MDIO2
7,17,25,27,28 PLT_RST1# PCIE_RXN5 17 MS_DATA2
13 MDIO3
MDIO0 MS_DATA3
3 CLK_PCIE_CARD# 2 SD_DAT0
1

3D3V_S0 MDIO1 1 5 MDIO4


3 CLK_PCIE_CARD SD_DAT1 MS_BS
MDIO2 19 12 CR1_CD1N
PCIE_TXN5 17 SD_DAT2 MS_INS
R594 MDIO3 17 15 MDIO5_R
PCIE_TXP5 17 SD_DAT3 MS_SCLK
8K2R2F-1-GP 4K7R2F-GP
1 R591 2 CR1_CD0N
MDIO5_R 6
2

4K7R2F-GP R592 2 CR1_CD1N MDIO4 SD_CLK


1 14 SD_CMD
3 1 2 CR1_CD0N
R650 1 10KR2J-3-GP MDIO7 MDIO6 SD_GND R636 0R2J-2-GP
2 20 SD_WP_SW SD_GND 11
CR1_CD0N 1 2 21 4
3D3V_CARD R651 0R2J-2-GP SD_CD_SW MS_GND
MS_GND 18
R662 DY NP1
XIN NP1
3D3V_S0 1 2 R635
1 21MR2F-GP XOUT 10KR2J-3-GP NP2 NP2 GND 22
1 2R605 MDIO6 NP3 NP3 GND 23
10KR2J-3-GP JMB380 10KR2J-3-GP
JMB385 1 2R611 MDIO13
X6
1 2 MEMCARD-21P-1-GP-U

X-24D576MHZ-63GP MDIO5 1 R738 2 MDIO5_R 20.I0033.011


22R2J-2-GP
2

C789
JMB380 JMB380 C791 200KR2J-L1-GP
JMB380 1 R595 2 MDIO12 MDIO0 MDIO1 MDIO2 MDIO3 MDIO4 CR1_CD1N MDIO5_R
1

SC20P50V2JN-1GP 200KR2J-L1-GP
SC20P50V2JN-1GP 1 R634 2 MDIO14
1

1
DY C808
DY C809DY C810DY C811DY C812DY C813DY C814
SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP
2

2
PD

CR1_CD0N CR1_CD1N
1

DY
C840 C841
DY SC100P50V2JN-3GP SC100P50V2JN-3GP
2

PD

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
USB Card Reader JM380
WWW.AliSaler.Com Size
Custom

Date:
Document Number

Monday, March 24, 2008 Sheet 26 of


Rev

47
PD
Internal KeyBoard Connector TouchPad Connector

5V_S0
KROW[1..8] 28,40
5V_S0
KCOL[1..18] 28,40

1
C495 C496
SCD1U16V2ZY-2GP SC1U10V2KX-1GP

3
4

2
KB1 RN47 TPAD1
27 SRN10KJ-5-GP 13
1 KCOL4 1

2
1
2 KCOL5 2
3 KCOL7 28 TPDATA 3
4 KROW8 28 TPCLK 4
5 KROW7 5
6 KROW6 6
7 KROW5 RIGHT# 7

1
8 KROW4 EC88 EC87 8
9 KROW3 SC33P50V2JN-3GP SC33P50V2JN-3GP 9
10 KROW2 10

2
11 KROW1 11
12 KCOL2 LEFT# 12
13 KCOL3 14
14 KCOL6
KCOL8
15
16 KCOL9 Touch Pad the same as Y40/Y41/Y45/Y46 ACES-CON12-4-GP-U
17 KCOL10
18 KCOL11 12 1
19 KCOL13
20 KCOL14
21 KCOL15
22 KCOL16
23 KCOL1
24 KCOL12 1 26
25 KCOL17 TP35
26 KCOL18 TP34
28

ACES-CON26-GP-U
20.K0204.026

15'' TOUCHPAD BUTTON SWITCH


5V_S0 5V_S0

1
R325 R323
10KR2J-3-GP 10KR2J-3-GP
GOLDEN FINGER FOR DEBUG BOARD DY DY

2
SW1 SW2
LPC_LAD[0..3] 1 3 LEFT# 1 3 RIGHT#
LPC_LAD[0..3] 16,28
5 5

5V_S0 U19 5V_S0 2 4 2 4

A1 B1
TOP VIEW SW-TACT-91-GP SW-TACT-91-GP
PLT_RST1# A1 B1 PLT_RST1# 62.40009.561 62.40009.561
7,17,25,26,28 PLT_RST1# A2 A2 B2 B2
16,28 LPC_LFRAME# LPC_LFRAME# A3 B3 LPC_LFRAME#
A3 B3
A4 A4 B4 B4
3 PCLK_FWH PCLK_FWH A5 B5 PCLK_FWH
A5 B5
FWH_INIT#
A6 A6 B6 B6
FWH_INIT#
A15 (B1)
A7 A7 B7 B7

LPC_LAD3
A8 A8 B8 B8
LPC_LAD3
A14 (B2)
A9 A9 B9 B9
LPC_LAD2 A10 B10 LPC_LAD2
A10 B10
....

LPC_LAD1 A11 B11 LPC_LAD1


....

LPC_LAD0 A11 B11 LPC_LAD0


A12 B12
TP123 EXT_FWH# A13
A12
A13
B12
B13 B13 EXT_FWH# COVER SWITCH 3D3V_AUX_S5
A14 A14 B14 B14 A2 (B14)

1
3D3V_S0 A15 A15 B15 B15 3D3V_S0
A1 (B15) R7

FOX-GF30 COVER1 10KR2J-3-GP


3D3V_S0 ZZ.GF030.XXX 3 R6

2
1D05V_S0 1 COVER_SW 1 2 LID_CLOSE# 28

1
100R2F-L1-GP-U C2
(BOTTOM VIEW) 2
3
4

4
SCD22U16V3KX-2-GP

2
RN59 3D3V_S0 ETY-CON2-5-GP-U
SRN10KJ-5-GP 20.D0196.102
2
1

FWHINIT C681 C677 C707


SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

FWH_INIT# DY DY DY ZZZZ
SC10U10V5ZY-1GP
2

2
G

Q15 Wistron Corporation


4,16 H_INIT# S D 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2N7002-11-GP
Title

KeyBoard/TPAD/Debug
Size Document Number Rev
Custom PD
D45/D46
Date: Tuesday, March 25, 2008 Sheet 27 of 47
A

3D3V_AUX_S5 3D3V_S0 3D3V_AUX_S5_KBC

SCD1U16V2ZY-2GP
1

1
EC23 C65 3D3V_AUX_S5 C89 C497 C498 C485 C489

1
SRN4K7J-10-GP
C59

SCD1U16V2ZY-2GP
8
7
6
5

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

2
RN7 SC10U10V5ZY-1GP

2
DY R408
0R3-0-U-GP

1
2
3
4
C301,C295 colse to Pin VDD L20

1
KBC_AVCC 1 2 3D3V_AUX_S5_KBC
BAT_SCL THER_SCL BLM11P600S
BAT_SDA THER_SDA

SCD1U16V2ZY-2GP
SC1U16V3ZY-GP
4 4

1
C494
C492

2
3D3V_S0

7,17,25,26,27 PLT_RST1# 1 2PLT_RST1#_1


R400 100R2J-2-GP
3D3V_S0 KROW[1..8] 27,40
39 BAT_IN#

SC27P50V2JN-2-GP
1
C484
KCOL[1..18] 27,40

102

115
80

19
46
76
88
4

1
U11A

2
C107 C108

GPIO41

VDD

AVCC

VCC
VCC
VCC
VCC
VCC
10KR2J-3-GP 1 R405 2 E51_RxD SC15P50V2JN-2-GP SC15P50V2JN-2-GP

1KBC_XO_R2

2
X2
DY RESO-32D768KHZ-GP

4
124 GPIO10/LPCPD# VREF 104 2 R409 1 10KR2J-3-GP
10KR2J-3-GP 1 R406 2 E51_TxD 7 2 1
LRESET#
DY 3 PCLK_KBC 2
3
LCLK A/D GPI90/AD0 97
98
AD_IA 38
82.10026.021 DY
16,27 LPC_LFRAME#

3
LFRAME# GPI91/AD1 R101 U11B
16,27 LPC_LAD0 126 LAD0 GPI92/AD2 99
2 16,27 LPC_LAD1 127 LAD1 GPI93/AD3 100 33KR2J-3-GP
R103
4K7R2J-2-GP 2 1 E51_TxD R399 128 108 KBC_MATRIX1 TP19
16,27 LPC_LAD2 LAD2 GPIO05/AD4
DY 1 96 KBC_MATRIX0 TP23 1 2 KBC_XI 77 53 KCOL1 TP36
0R2J-2-GP 16,27 LPC_LAD3 LPC

2
LAD3 GPIO04/AD5 32KX1/32KCLKIN KBSOUT0/JENK# KCOL2 TP39
R407 17 INT_SERIRQ 125 SERIRQ KBSOUT1/TCK 52
SC4D7P50V2CN-1GP 17 PM_CLKRUN# 8 10MR2J-L-GP 51 KCOL3 TP41
1

GPIO11/CLKRUN# KBSOUT2/TMS KCOL4 TP38


C483 16 KBRCIN# 122 KBRST# KBSOUT3/TDI 50
16 KA20GATE 121 101 KBC_XO 79 49 KCOL5
GA20 GPI94/DA0 32KX2 KBSOUT4/JEN0#
1 2PCLK_KBC_RC ECSCI#_KBC 29 ECSCI#/GPIO54 GPI95/DA1 105 29 AMP_SHUTDOWN# 30 GPIO55/CLKOUT KBSOUT5/TDO 48 KCOL6 TP37
ATI_BL_ON 9 106 47 KCOL7 TP40
42 ATI_BL_ON
ECSWI#_KBC GPIO65/SMI# D/A GPI96/DA2 TP21 KBC_CIR KBSOUT6/RDY# KCOL8
DY 123 GPIO67/PWUREQ# GPI97/DA3 107 63 GPIO14/TB1 KBSOUT7 43
KCOL9
17 PM_PWRBTN# 117 GPIO20/TA2 KBC KBSOUT8 42
31 41 KCOL10
FOR KBC DEBUG 38 CHG_ON#
32
GPIO56/TA1 KBSOUT9
40 KCOL11
THER_SDA 29 KBC_BEEP TP80 CHG_I_PWM GPIO15/A_PWM KBSOUT10 KCOL12
THERMAL-----> 68 GPIO74/SDA2 GPIO01/TB2 64 PM_SLP_S3# 17,20,25,30,34,35,36,37 118 GPIO21/B_PWM KBSOUT11 39
THER_SCL 67 KCOL13
5V_AUX_S5 69
GPIO73/SCL2 SMB GPIO03/AD6 95
93
KBC_PWRBTN# 21 14 BRIGHTNESS 62 GPIO13/C_PWM KBSOUT12/GPIO64 38
37 KCOL14
38,39 BAT_SDA GPIO22/SDA1 GPIO06 AC_IN# 38 KBSOUT13/GPIO63 KCOL15
BATTERY-----> 38,39 BAT_SCL 70 GPIO17/SCL1 GPIO07/AD7 94
119
LID_CLOSE# 27 KBSOUT14/GPIO62 36
35 KCOL16
GPIO23/SCL3 KBSOUT15/GPIO61/XOR_OUT KCOL17 TP15
GPIO24 6 13 GPIO12/PSDAT3 GPIO60/KBSOUT16 34
109 CAMERA_EN 14 12 33 KCOL18 TP14
GPIO30 GPIO25/PSCLK3 GPIO57/KBSOUT17
3 3

14 NUM_LED# 81 GPIO66/G_PWM SP GPIO31/SDA3 120 WWAN_EN 25 11 GPIO27/PSDAT2


TP146 65 10
GPIO32/D_PWM PWR_LED# 14 GPIO26/PSCLK2
TP142
TPAD28 66 TPDATA 71 54 KROW1
GPIO33/H_PWM STDBY_LED# 14 27 TPDATA GPIO35/PSDAT1 KBSIN0
TPAD28 16 TPCLK 72 55 KROW2
84
GPIO40/F_PWM
17
CAP_LED# 14 27 TPCLK GPIO37/PSCLK1 PS/2 KBSIN1
56 KROW3
22 BLUETOOTH_EN GPIO77/SPI_DI GPIO42/TCK AD_OFF 39 KBSIN2
83 20 57 KROW4
82
GPIO76/SPI_DO/SHBM SPI GPIO43/TMS RSMRST#_KBC 17 KBSIN3 KROW5
21 WIRELESS_BTN#
91
GPIO75/SPI_CLK GPIO GPIO44/TDI 21
22
PM_SLP_S4# 17,25,34,35
SPIDI 86
KBSIN4 58
59 KROW6
14 WLAN_TEST_LED# GPIO81 GPIO45/E_PWM CHARGE_LED# 14 F_SDI KBSIN5
2

23 SPIDO 87 60 KROW7
R100 GPIO46/TRST# SPICS# F_SDO KBSIN6 KROW8
GPIO47/SCL4 24 90 F_CS0# FIU KBSIN7 61
4K7R2J-2-GP 25 SPICLK 92
E51_TxD 111 GPIO50/TDO F_SCK
25 E51_TxD GPO83/SOUT_CR/BADDR1 GPIO51/TA3 26 KBC for INTEL

1
E51_RxD 113 27 BLON_OUT 14 85 ECRST#
1

25 E51_RxD CCD_ON 112 GPIO87/SIN_CR GPIO52/RDY# R397 VCC_POR#


GPO84/BADDR0 GPIO53/SDA4 28 WIRELESS_EN 25
TP81 73 10KR2J-3-GP
GPIO70
114 GPIO16 GPIO71 74
14 75 WPC775L-0DG-GP-U

2
GPIO34 GPIO72
20 S5_ENABLE 15 GPIO36/TB3 GPO82/TRIS# 110 USB_PWR_EN# 22
SER/IR
RN8 RN5
5 4 VCORF 44 3D3V_AUX_S5 5 4 ECRST#
S5_ENABLE VCORF
6 3 6 3
1

7 2 7 2 KA20GATE C499

1
THER_SCL AGND KBRCIN#
8 1 UMA 8 1

GND
GND
GND
GND
GND
GND
3D3V_S0 3D3V_S0

SC1U10V3KX-3GP
C488 ATI_BL_ON 1 2
2

SCD1U16V2ZY-2GP R401 0R2J-2-GP GMCH_BL_ON 7

2
E
SRN10KJ-6-GP SRN10KJ-6-GP Q3
103

5
18
45
78
89
116
WPC775L-0DG-GP-U 20 EC_RST# B
Q4
4 3 2N7002DW-1-GP 71.00775.00G USE 71.00773.00G 3D3V_AUX_S5 MMBT3906-3-GP

C
5 2

SCD1U16V2ZY-2GP
SMBC_G792 20

1
THER_SDA 6 1 EC83
SMBD_G792 20

5
6
7
8
DY

2
3D3V_AUX_S5
D6 SRN10KJ-6-GP
RN46
3D3V_S0

4
3
2
1

1
3D3V_AUX_S5
2 2

6 1 ECSCI#_KBC
17 SB_ECSCI# SPI_HOLD# ER1
AC_IN# 2 R410 1 0R3-0-U-GP
5 2 10KR2J-3-GP
U36

2
CHG_ON# 2 R398 1 PD
17 ECSWI# 4 3 ECSWI#_KBC 10KR2J-3-GP SPICS# 0R2J-2-GP 1 8 SPI_VCC
SPIDI ER4 SPIDI_R CS# VCC SPI_HOLD# 0R2J-2-GP
1 2 2 7
DY SPI_WP# 3
DO HOLD#
6 SPICLK_R ER2 1 0R2J-2-GP
2 SPICLK
WP# CLK SPIDO_R ER3 SPIDO
4 GND DIO 5 1 2
SDM03MT40A-7-F-GP DY PD

1
SC47P50V2JN-3GP
EC86
W25X16VSSIG-GP DY

1
PD EC84 EC85

2
2M Bits

SC4D7P50V2CN-1GP

SC47P50V2JN-3GP
DY

2
SPI FLASH ROM

KBC SKT FOR DEBUG


SKT2
SPICS# 1 8 SPI_VCC

SPIDI_R 2 7 SPI_HOLD#
SPI_WP# 3 6 SPICLK_R
4 5 SPIDO_R

SKT-SPI8P-GP-U

DY

1 1

Homa

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
KBC WPC775/BIOS
Size Document Number Rev
A2 D45/D46 PD
A
Date: Friday, March 14, 2008 Sheet 28 of 47

WWW.AliSaler.Com
5 4 3 2 1

MIC_IN_INT
3D3V_S0 AUD_3VD

1 R567 2 MICIN_DETECT# 2 1 SENSE_A


PD Internal Speaker

1
0R0603-PAD 20KR2F-L-GP R577 C731
C732
SC4D7U10V3KX-GP SC4D7U10V3KX-GP

MIC2_L 2
1

1
PD C710 HP_DETECT# 2 1 MIC_IN_R SPK1 SPK2
C714 39K2R2F-L-GP R579 MIC_IN_L 4 4
SC10U10V5ZY-1GP SCD1U10V2KX-4GP

SPKR_L+
CLOSE to CODEC SPKR_L- SPKR_R-

SPKR_L-
SPKR_R+
SPKR_R-
2 2

MIC2_R
SPKR_L+ 1 SPKR_R+ 1
PD USE 71.00269.A03
EC6 3 3

1
D EC5 EC90 EC91 D

MLVS0402M04-GP
AUD_5VA ETY-CON2-10-GP ETY-CON2-10-GP

MLVS0402M04-GP

MLVS0402M04-GP

MLVS0402M04-GP
AUD_3VD 20.F0984.002 20.F0984.002

45
44
41
40

17
16
22
21

15
14
24
23
U59 AUD_5VD
ALC269Q-GR-GP

SPK_OUT_R+

SPK_OUT_L+

LINE2_L

LINE1_L
SPK_OUT_R-
SPK_OUT_L-

MIC2_L

MIC1_L
MIC2_R

MIC1_R

LINE2_R

LINE1_R
5V_S0 AUD_5VA

2
PD
R586 PD
2 1
HP_OUT_L 32 1
HPOUT_L DVDD

SC2D2U6D3V3MX-1-GP
0R3-0-U-GP HP_OUT_R 33 9 C750
HPOUT_R DVDD_IO

AUD_CPVEE
1

1
C743 SENSE_A 13 25
DY C748 18
SENSE_A AVDD1
38
SC10U10V5ZY-1GP SCD1U10V2KX-4GP SENSE_B AVDD2
2

2
AUD_PC_BEEP 12 39
PCBEEP PVDD1

SC2D2U10V3ZY-1GP
20 MONO_OUT PVDD2 46
DY AUD_AGND
CPVEE 34
7 DVSS
AUD_AGND AUD_CBN
26 AVSS1 MIC1_VREFO_R 30 MIC1_VREFO_R
Headphone OUT

2
37 28 MIC1_VREFO_L
AVSS2 MIC1_VREFO_L MIC2_VREFO C749
MIC2_VREFO 29
42 35

1
5V_S0 AUD_5VD PVSS1 CBN AUD_CBP
43 PVSS2 CBP 36

AUD_VREF
27 HP1

GPIO0/DMIC_DATA
VREF

GPIO1/DMIC_CLK
49 GND CPVREF 31 1

EAPD/SPDIFO2
1 R583 2 JDREF 19 HP_OUT_L R618 1 2 75R2F-2-GP HP_OUT_L1 2

SDATA_OUT
0R0603-PAD 6

SDATA_IN
HP_OUT_R R619 1 2 75R2F-2-GP HP_OUT_R1 3

AUD_JDREF
RESET#
SPDIFO
PD 4
1

1
SYNC
C729

BCLK
5

PD#
C735 AUD_AGND C752 NP1

1
SC10U10V5ZY-1GP SCD1U10V2KX-4GP SC10U10V5KX-2GP EC121 EC122 NP2
2

2
SC1KP50V2KX-1GP SC1KP50V2KX-1GP

48
47
11
10
AUD_BIT-CLK 6
4

3
2

8
5
PHONE-JK241-GP-U

2
AUD_AGND
C C

1
AUD_SDIN
16,22 ACZ_RST#
16,22 ACZ_SYNC R584 AUD_AGND
cap close to pin39, pin46 20KR2F-L-GP AUD_AGND
HP_DETECT#
16 ACZ_BITCLK 1 2

2
R572 22R2J-2-GP
C715
1 2 PD
AUD_AGND
R573 SC22P50V2JN-4GP
1 2 28 AMP_SHUTDOWN# 1 2 AUD_SD# ACZ_SDATAOUT 16,22
R589 0R0603-PAD 0R2J-2-GP
2 1 ACZ_SDATAIN0 16
22R2J-2-GP R571
1
R588
2
0R0603-PAD
AUD_AGND
4K7R2J-2-GP MIC IN/LINE IN
DY MIC1_VREFO_L R616 1 2
R625 1 2 0R3-0-U-GP
MIC1_VREFO_R R617 1 2
PHONE-JK241-GP-U
DY
R575 1 2 0R3-0-U-GP 4K7R2J-2-GP NP2
NP1
MICIN_DETECT# 5
C739 SC4D7U6D3V3KX-GP 1KR2F-3-GP R613 4
Internal MIC MIC_IN_R

MIC_IN_L
1

1
2

2
MIC_IN_R_1

MIC_IN_L_1
2

2
1
1KR2F-3-GP R612
1
MIC_IN_R_2

MIC_IN_L_2
3
6
2
R328 PD 1
C736 SC4D7U6D3V3KX-GP
MIC2_VREFO ETY-CON2-5-GP-U MIC1
R568 1 2
10KR2J-3-GP C713 4 AUD_AGND

1
1 2 AUD_PC_BEEP_R 1 2 AUD_PC_BEEP 2 EC120 EC119
17 ACZ_SPKR 10KR2J-3-GP 2K2R2J-2-GP SC1KP50V2KX-1GP SC1KP50V2KX-1GP
R569 SCD1U10V2KX-4GP MIC_IN_INT 1

2
28 KBC_BEEP 1 2 3
2

EC112
B INMIC1 B
SC100P50V2JN-3GP

R570
1

1KR2J-1-GP C428 AUD_AGNDAUD_AGND


2

SC100P50V2JN-3GP
1

DY

AUD_AGND

5V_S0
U67

1 5 AUD_5VA
SHDN# SET
2 GND
1

3 IN OUT 4
C738
1

SC1U10V3ZY-6GP
2

G923-475T1UF-GP C837 C800


SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
2

AUD_AGND

SB

A A

ZZZZ

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ALC269 / AUDIO JACK


Size Document Number Rev
Custom PD
Date: Friday, March 14, 2008
D45/D46
Sheet 29 of 47
5 4 3 2 1
Aux Power 3D3V_AUX_S5

5V_AUX_S5 I min = 150 mA


3D3V_AUX_S5
U65

1 VIN VOUT 5
2 GND
3 SHDN# NC#4 4
SC1U16V3ZY-GP

SC1U16V3ZY-GP
1

1
G909-330T1U-GP
BC3 BC4
74.00909.03F
2

2
Run Power

5V_S0 5V_S5
Q17 DY
PD NDS0610-NL-GP C734 U61
DCBATOUT 84.00610.C31 1 2 1 S D 8
TP0610K-T1-GP RUN_POWER_ON 2 S D 7
SCD1U25V3KX-GP 3 S D 6
1 2 Z_12V S D 4 G D 5
R563 10KR2J-3-GP

2
SCD1U25V3KX-GP
C726 D27 C733 AO4468-GP
R576 84.04468.037
3D3V_S0 G

SCD1U25V3KX-GP
330KR3J-L-GP
RLZ12B-1-GP DY

1
1
2 1 Z_12V_G3

1
1

DY R564 330KR2F-L-GP R578


R561 10KR2J-3-GP
100R5J-3-GP 3D3V_S0 3D3V_S5
1

U62

2
3D3V_RUNPWR

R574 1 S D 8
2

100KR2J-1-GP 2 S D 7
3 S D 6
Z_12V_D4 4 G D 5
2

AO4468-GP
Z_12V_D3

84.04468.037
U58
4 3 2N7002DW-1-GP
D

1D8V_S0 1D8V_S3
DY Q16 5 2 U38
2N7002-11-GP 1 S D 8
G Z_12V_D3 6 1 2 S D 7
R418 S D
3 6
1 2 VGA_PWROK 4 G D 5
S

AO4468-GP
84.27002.D3F 47KR2F-GP 84.04468.037
PM_SLP_S3# 17,20,25,28,34,35,36,37

1
C505
VGA
VGA SCD22U10V2KX-1GP

2
PD
VGA

ZZZZ

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
RUN POWER and 3D3V_AUX_S5
Size Document Number Rev

D45/D46 PD
Date: Friday, March 14, 2008 SheetSheet 30 of 47

WWW.AliSaler.Com
5 4 3 2 1

CPU_CORE TPS51125 APL5912


ISL6266A 5V/3D3V 1D5V_S0
VID Setting Output Signal Input Power Output Power
VID0 1D8V_S3 1D5V_S0 (2.5A)
VID0(I / 3.3V) VGATE_PWRGD DCBATOUT_51125 5V_S5 (6A) VIN 1D5V(O)
PGOOD VIN 5V(O)
D
VID1 D
VID1(I / 3.3V)
VID2 Input Signal 3D3V_S5 (6A) PM_SLP_S3# CPUCORE_ON
VID2(I / 3.3V) PM_SLP_S4# 3D3V(O) EN POK
EN0
VID3
VID3(I / 3.3V)
Output Power
VID4 Output Signal
VID4(I / 3.3V) VCC_CORE(Imax=38A) ALW_PWRGD_3V_5V 0D9V_S0
VCC_CORE_PWR(O) PGOOD 5V_S5
VID5 VIN
VID5(I / 3.3V)
1D8V_S3 0D9V_S3 (1A)
VID6 GFX_CORE VLDOIN VTT
VID6(I / 3.3V)
ISL6263A PM_SLP_S4#
Input Signal S3 0D9V_S3_1
VTTREF
CPUCORE_ON VID Setting Output Signal
EN (I / 3.3V) VID0 CPUCORE_ON S5
VID0(I / 3.3V) PGOOD
C C
VID1
Voltage Sense VID1(I / 3.3V) TPS51100
VCC_SENSE VID2
VSEN(I / Vcore) VID2(I / 3.3V)
2D5V_S0
VSS_SENSE VID3
RGND(I / Vcore) VID3(I / 3.3V)
3D3V_S0 2D5V_S0(0.3A)
VID4 INPUT OUT
VID4(I / 3.3V)
Input Power
Input Power Output Power APL5913
DCBATOUT_6266A 5V_S0
VCC(I) VDD Charger BQ24750
VCC_GFXCORE(5.5A)
5V_S0 DCBATOUT VGFXCORE (O)
VCC(I) VIN
Input Signal Output Signal
3D3V_S0
VCC(I) CHG_ON# AC_IN#
B Input Signal CHGEN# ACGOOD# B
PM_SLP_S3#
VR_ON AD_IA
24750_CELLS SRSET
TPS51124 GFXVR_EN CELLS

1D8V/1D05V Voltage Sense


VCC_AXG_SENSE
Input Power Output Power VSEN(I / Vcore) Input Power Output Power
5V_S5
VDD VSS_AXG_SENSE
1D8V_S3 (10A) RGND(I / Vcore) AD+ BT+
DCBATOUT_51124 1D8V (O) ACN VOUT (O)
VCC
VOUT (O) DCBATOUT
1D05V_S0 (15A) Adapter
Input Signal 1D05V(O)
PM_SLP_S4#
EN1 Input Signal Output Signal
AD_IN# Eiger
PM_SLP_S3# AD_OFF (I) (O)
EN2
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
CPUCORE_ON Output Signal Input Power Output Power Taipei Hsien 221, Taiwan, R.O.C.

PGOOD1 AD_JK AD+ Title


VCC(I) VCC(O)
PGOOD2 Power Sequence Logic
5V_AUX_S5 Size Document Number Rev
VCC(I) B
Eiger PD
Date: Friday, March 14, 2008 Sheet 31 of 47
5 4 3 2 1
5 4 3 2 1

4,7,16 H_DPRSTP# PM_DPRSLPVR 7,17 DCBATOUT_6266A


DCBATOUT DCBATOUT_6266A DCBATOUT DCBATOUT_6266A

G3 20071001 G2 3D3V_S0 CPUCORE_ON 34,35,36,43


20071001
1 2 1 2 DY PD

2
10R3F-GP

R87
GAP-CLOSE-PWR GAP-CLOSE-PWR H_VID[6..0] 5 C3 C445 C5 C447

5
6
7
8

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
G1 G8 SCD1U50V3KX-GP

1
2

D
D
D
D
1 2 TC1 1 2 U29 Id=35A

H_VID6

H_VID5

H_VID4

H_VID3

H_VID2

H_VID1

H_VID0
ST15U25VDM-1-GP
DY SI7686DP-T1-GP

2
Qg=17~26nC

499R2F-2-GP
GAP-CLOSE-PWR GAP-CLOSE-PWR

R8

10KR2F-2-GP
G7 G6
2007/9/10 Rdson=11~14mohm Vcc_core

2
D 1 2 1 2 D

G
S
S
S
GAP-CLOSE-PWR GAP-CLOSE-PWR Iomax=38A

4
3
2
1
1

1
SCD1U10V2KX-4GP
G5 G4 Cyntec 10*10*4

1
1 2 1 2 C8 R10 R12 R13 R14 R15 R16 R17 R18 R19 6266A_UGATE1
0R2J-2-GP0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP DCR=1.05+-5%mohm, Irating=30A
GAP-CLOSE-PWR GAP-CLOSE-PWR Isat=60A

6266A_DPRSLPVR
VCC_CORE
2007.5.9 2007/9/10

6266A_DPRSTP#
2

6266A_VR_ON 2

2
R11
L18
6266A_PHASE1 1 2
3D3V_S0

6266A_3V3
IND-D36UH-9-GP
2007/9/10

6266A_D6

6266A_D5

6266A_D4

6266A_D3

6266A_D2

6266A_D1

6266A_D0
TC4 TC2 TC3

1
5 5

1
U27 6 6 2D2R5J-1-GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP
Id=19.5A SI4634DY-T1-E3-GP 7 7 R671

2
1
U1 8 8 DY DY
R9 Qg=21.5~33nC,

49

48

47

46

45

44

43

42

41

40

39

38

37

2
1K91R2F-1-GP Rdson=5.5~6.7mohm 6266A_ LGATE1 4 4

2
SC330P50V2KX-3GP
G51

GND

3V3

CLK_EN#

DPRSTP#

DPRSLPVR

VR_ON

VID6

VID5

VID4

VID3

VID2

VID1

VID0
1 1 GAP-CLOSE G52

1
2 2 C795
R21
3 3 DY GAP-CLOSE

1
1 36 6266A_BOOT1 1 2

2
7,17 VGATE_PWRGD PGOOD BOOT1 1R2J-GP 6266A_BOOT1_R U28
1 26266A_PSI# 2
R20 35 6266A_UGATE1 1 SI4634DY-T1-E3-GP
4 PSI#
0R2J-2-GP PSI# UGATE1 SB
C10 1 2 6266A_PMON_R 1 2 6266A_PMON
R24 3 34 6266A_PHASE1 2 C9
4K99R2F-L-GP PMON PHASE1 SCD22U25V3KX-GP 2007/9/10
SCD1U25V3KX-GP 1 26266A_RBIAS4 33
C 20071005 R25 147KR2F-GP RBIAS PGND1 C
5 32 6266A_ LGATE1 6266A_VSUM 1 R33 2 3K65R2F-1-GP 6266A_ISEN1_P1_VCORE
4 CPU_PROCHOT#_R VR_TT# LGATE1
1 R26 2 6266A_NTC_R 1 R376 2 6266A_NTC 6 31 5V_S0 1 2C451 6266A_ISEN1 1 R36 2 10KR2F-2-GP
4K02R2F-GP NTC-470K-1-GP NTC PVCC
C11 C12 1
R27 26266A_SOFT 7 30 6266A_LGATE2 SC2D2U16V3KX-GP
1 2 SCD015U50V3KX-GP SOFT LGATE2 6266A_VO 1 R51 2 1R2F-GP 6266A_ISEN2_P1_VCORE
6266A_VO 1 26266A_OCSET8 OCSET 29
SCD01U25V2KX-3GP SB PGND2 6266A_ISEN2 1 R50 2 10KR2F-2-GP
C18 1 2SC1000P50V3JN-GP 6266A_VW 9 28 6266A_PHASE2 DCBATOUT_6266A
10K2R3F-GP VW PHASE2 2
C17
1 2 6266A_COMP
10 27 6266A_UGATE2 SCD22U25V3KX-GP
COMP UGATE2 R28 1
R29
C19 SB 6266A_FB 11 26 6266A_BOOT2 2 16266A_BOOT2_R
1 2
10K7R2F-GP FB BOOT2 1R2J-GP 20071001

2
6266A_FB2 12 25
FB2 NC#25

5
6
7
8
SC100P50V2JN-3GP C444 C7 C4 C448
C22

D
D
D
D

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
DROOP

U32 SCD1U50V3KX-GP

1
1

VDIFF

VSUM

ISEN2

ISEN1
VSEN

1 R40 2 6266A_COMP_R 1 2 SI7686DP-T1-GP Id=35A

GND

VDD
RTN

DFB

VIN
97K6R2F-GP R32
VO

SC270P50V2KX-1GP 1KR2F-3-GP Qg=17~26nC


ISL6266AHRZ-GP 2007/9/10 Rdson=11~14mohm
16266A_DROOP
13

6266A_VSEN14

6266A_RTN 15

16

6266A_DFB 17

18

6266A_VSUM 19

6266A_VIN 20

21

6266A_VDD 22

23

24

G
S
S
S
6266A_VDIFF

6266A_ISEN2
C20 74.06266.073
2

4
3
2
1
1 R30 2 6266A_FB2_R 1 2 6266A_ISEN1 C26 1 26266A_VO
100R2F-L1-GP-U R41 Cyntec 10*10*4
6266A_VO
1

SC2200P50V2KX-2GP SCD22U10V2KX-1GP
C33 1 DCR=1.05+-5%mohm, Irating=30A
1KR2F-3-GP

2
DY R34 DCBATOUT_6266A 6266A_UGATE2 Isat=60A
B R31 B
6266A_SOFT 1 SCD22U10V2KX-1GP VCC_CORE
13K3R2F-2-GP

2
1 2 5V_S0
L19 2007/9/10
2

6266A_PHASE2
10R3F-GP

1KR2F-3-GP R739 1KR2F-3-GP 1 2


2007.5.18 R55 IND-D36UH-9-GP
2007/9/10
2
SC330P50V2KX-3GP

PD 1 R54 2 5 5 TC5 TC15 TC6

1
10R2F-L-GP U31 6 6 2D2R5J-1-GP
1

C23 SI4634DY-T1-E3-GP 7 7 R672


2
SC180P50V2JN-1GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP
C31 8 8 DY

2
1

C44 C46
2

6266A_LGATE2
SCD01U25V2KX-3GP

SC1U25V0KX-GP 4 4

2
SC330P50V2KX-3GP
2

2
Id=19.5A 1 1
1

1
C35 2 2 C794 G50
5 VCC_SENSE R44 Qg=21.5~33nC,
SCD33U10V3KX-3GP

1 2
0R2J-2-GP
3 3 DY GAP-CLOSE
Rdson=5.5~6.7mohm G49
2

2
1

C801 GAP-CLOSE

1
SB SC1U25V0KX-GP C25 U30
SC330P50V2KX-3GP SI4634DY-T1-E3-GP
SB
2

5 VSS_SENSE 1 R45
2
0R2J-2-GP
1 2 2007/9/10 SB
1

R37 0R0402-PAD
C32 6266A_VSUM 1 R57 2 3K65R2F-1-GP
SCD01U25V2KX-3GP 6266A_ISEN2_P2_VCORE
2

6266A_ISEN2 1 R53 2 10KR2F-2-GP

6266A_VSUM
6266A_VO 1 R42 2 1R2F-GP 6266A_ISEN1_P2_VCORE
1

A Eiger A
R46 6266A_ISEN1 1 R38 2 10KR2F-2-GP
1

C21 2K61R2F-1-GP
C28 R35
Wistron Corporation
SCD22U50V3ZY-1GP

SCD033U50V3KX-1GP

11KR2F-L-GP
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


SB 6266A_VSUM_R_VO Taipei Hsien 221, Taiwan, R.O.C.
2

R379 Title
NTC-10K-9-GP
ISL6266A_CPU_CORE
Size Document Number Rev
2007/9/10
2

6266A_VO A3
D45/D46 PD
Date: Friday, March 21, 2008 Sheet 32 of 47
5 4 3 2 1

WWW.AliSaler.Com
5 4 3 2 1

DCBATOUT DCBATOUT_51125
G102 3D3V_PWR 3D3V_S5
1 2
G114 5V_AUX_S5
GAP-CLOSE-PWR 1 2 5V_AUX_S5
G104 5V_PWR 5V_S5

1
1 2 GAP-CLOSE-PWR 51125_ENTIP2 G117

1
G110 R645 51125_ENTIP1 SB 1 2
GAP-CLOSE-PWR 1 2 SB 100KR2J-1-GP R644

1
G39 C780 100KR2J-1-GP GAP-CLOSE-PWR

D
1

1
SC18P50V2JN-1-GP
D 1 2 GAP-CLOSE-PWR R620 C779 G113 D

1
G112 Q20 DY 160KR2F-GP R624 DY Q19 1 2

2
GAP-CLOSE-PWR 1 2 2N7002-11-GP

SC18P50V2JN-1-GP
G42 G 133KR2F-GP G GAP-CLOSE-PWR

2
1 2 GAP-CLOSE-PWR G111

2
G116 2N7002-11-GP 1 2

D
S

S
1

GAP-CLOSE-PWR 1 2
TC25 G40 Q35 Q37 GAP-CLOSE-PWR
ST15U25VDM-1-GP GAP-CLOSE-PWR 2N7002-11-GP SB 2N7002-11-GP G109
DY 1 2
2

G118 20 PWR_S5_EN G G PWR_S5_EN 20 1 2


GAP-CLOSE-PWR 1 2
G103 GAP-CLOSE-PWR

S
1 2 GAP-CLOSE-PWR SB 20071205 G107
G108 SB 20071205 1 2
GAP-CLOSE-PWR 1 2
G41 GAP-CLOSE-PWR
1 2 GAP-CLOSE-PWR G115
G106 1 2
GAP-CLOSE-PWR 1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR G105
1 2

GAP-CLOSE-PWR
DCBATOUT_51125 DCBATOUT_51125

DCBATOUT_51125
C770 C767

SC10U25V6KX-1GP

SCD01U50V2KX-1GP
Iomax=7A C420 C741 C742
DY

1
C C419 C740 C421 C
OCP min = 10A
1

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD01U50V2KX-1GP
SCD01U50V2KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SB

2
D Id=7A D
2

8
7
6
5

5
6
7
8
Cyntec 7*7*3 Id=7A Qg=8.7~13nC
D
D
D
D

U20 U60

D
D
D
D
DCR=30mohm, Irating=6A Qg=8.7~13nC Rdson=23~30mohm

16
SI4800BDY-T1 SI4800BDY-T1
Isat=13.5A SB Rdson=23~30mohm U22

VIN
Cyntec 7*7*3
SCD1U25V3KX-GP Iomax=6A
S
S
S
G

G
S
S
S
C427 SB SB C426 DCR=18mohm, Irating=8A
G S
1
2
3
4

4
3
2
1
51125_VBST2 51125_VBST1 Isat=14A OCP min = 10A
S G 2 1 9 VBST2 VBST1 22 1 2
3D3V_PWR
L11
SCD1U25V3KX-GP 51125_DRVH2 10 DRVH2 DRVH1 21 51125_DRVH1
L10
20071005 5V_PWR

1 2 51125_LL2 11 20 51125_LL1 1 2
IND-3D3UH-57GP LL2 LL1
51125_DRVL2 51125_DRVL1 SB U63 IND-3D3UH-57GP
D 12 DRVL2 DRVL1 19
1

1
SI4812BDY-T1-E3-GP
C751 TC27 U21 2D2R5J-1-GP 2D2R5J-1-GP
D
8
7
6
5

5
6
7
8

GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP

SCD1U10V2KX-4GP
ST220U6D3VDM-20GP R669 R670 SB
DY
SCD1U10V2KX-4GP

C753
D
D
D
D

DY 51125_VO2 51125_VO1 DY

D
D
D
D
7 24
2

VO2 VO1

1
G44 TC28
SI4812BDY-T1-E3-GP

2007/9/5 51125_FB2 5 2 51125_FB1 ST220U6D3VDM-20GP


DY
2

2
VFB2 VFB1
SC330P50V2KX-3GP

SC330P50V2KX-3GP

2
1

G43

2
1

1
C776 1 2 51125_EN 13 23 51125_PGOOD C796
S
S
S
G

G
S
S
S
SB R319 820KR2F-GP EN0 PGOOD
DY G S DY
1
2
3
4

4
3
2
1
51125_ENTIP2 6 51125_ENTIP1
S G 1
2

2
B 51125_VREF ENTRIP2 ENTRIP1 B

3 VREF GND 15
1
SCD22U6D3V2KX-1GP

C430 51125_TONSEL 4 25 PD
TONSEL GND
Id=7.7A

1
Id=7.7A
2

Qg=8.5~13nC
1

14 18 51125_VCLK 3D3V_PWR R337


Qg=8.5~13nC SKIPSEL VCLK
1

1
51125_SKIPSEL TP76 Rdson=16.5~21mohm 0R2J-2-GP DY

100KR2J-1-GP
DYR330 Rdson=16.5~21mohm R332
VREG3

VREG5

1
R335 0R2J-2-GP R329 30KR2F-GP

1 2
6K65R2F-GP TPS51125RGER-GP 51125_FB1_R
1 2

51125_FB2_R 74.51125.073
2

2
C429 C431 DY
3D3V_AUX_S5_5_51125 8

17

DYSC18P50V2JN-1-GP SC18P50V2JN-1-GP

2
3D3V_AUX_S5 5V_AUX_S5
G119
2

5V_AUX_S5_51125

G121

1
1 2 1 2
1

R334 GAP-OPEN-PWR GAP-CLOSE-PWR-3-GP R333


10KR2F-2-GP 2 1 phoenix tsai 09/13/07 20KR2F-L-GP
51125_VREF
0R2J-2-GP R331 Close to VFB Pin (pin2)

2
2

3D3V_AUX_S5 2 1
0R2J-2-GP R336
DY
1

SC10U10V5KX-2GP

C774 C765
SC10U10V5KX-2GP

51125_VREF 2 1
2

0R2J-2-GP R318
A
2007/9/28 Eiger A

Close to VFB Pin (pin5) Wistron Corporation


3D3V_AUX_S5
0R2J-2-GP
2
DY 1
R316 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
0R2J-2-GP
2
DY 1
R317
DCDC 5V/3D3V (TPS51125)
Size Document Number Rev
A3
D45/D46 PD
Date: Friday, March 14, 2008 Sheet 33 of 47
5 4 3 2 1
5 4 3 2 1

5V_S5 20071009 1D5V_S0 OCP>3.2A


Iomax=2.5A 1
G86
2

1
1D8V_S3 C605
SC1U16V3ZY-GP GAP-CLOSE-PWR
D G87 D

2
1 2

1
Vo(cal.)=1.5024V GAP-CLOSE-PWR
C622 C617 G89
SC10U10V5ZY-1GP SC10U10V5ZY-1GP 1 2

9
1D5V_LDO
GAP-CLOSE-PWR 1D5V_S0

GND
4 5 G88
R485 VDD NC#5
3 VIN VOUT 6 1 2
17,20,25,28,30,35,36,37 PM_SLP_S3# 1 2 2 EN ADJ 7
1 8 GAP-CLOSE-PWR
PGOOD GND

1
0R2J-2-GP
R490 C630 C625 C631
3D3V_S0 18KR2F-GP

2
U47

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
SCD01U16V2KX-3GP
RT9018A-25PSP-GP

2
1
R483

1
2K2R2J-2-GP
R489
R487 20K5R2F-GP
32,35,36,43 CPUCORE_ON 1 2 2

2
0R2J-2-GP

Vo=0.8*(1+(R1/R2))
C C

5V_S5 20071009 1D1V_S0 OCP>2.3A


Iomax=1.8A 1
G19
2

1
1D8V_S3 C509
SC1U16V3ZY-GP GAP-CLOSE-PWR
G16

2
1 2

1
VGA Vo(cal.)=1.1057V GAP-CLOSE-PWR
C121 C120 G18
SC10U10V5ZY-1GP SC10U10V5ZY-1GP 1 2

9
1D1V_LDO
GAP-CLOSE-PWR 1D1V_S0

GND
VGA R417 VGA 4 VDD NC#5 5 G17
3 VIN VOUT 6 1 2
17,20,25,28,30,35,36,37 PM_SLP_S3# 1 2 2 EN ADJ 7
1 8 GAP-CLOSE-PWR
PGOOD GND

1
SB
33KR2F-GP

1
R414 C504 C119 C118
3D3V_S0 C802 10K7R2F-GP

2
U37

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
SCD22U10V2KX-1GP

SCD01U16V2KX-3GP
2
RT9018A-25PSP-GP

2
1
B VGA R415VGA B
VGA

1
2K2R2J-2-GP VGA R416
R413 28KR2F-GP

2
32,35,36,43 CPUCORE_ON 1 2

2
0R2J-2-GP VGA
VGA VGA VGA
VGA VGA
Vo=0.8*(1+(R1/R2))

Iomax=1A
5V_S5 1D8V_S3 OCP>2A
1

DDR_VREF_PWR DDR_VREF_S3
1

C592 C588 G66


C587 PD SC10U10V5ZY-1GP SCD1U10V2KX-4GP 1 2
2

SC1U10V3ZY-6GP
2

GAP-CLOSE-PWR
G65
U45
1 2
A Eiger A
10 1 GAP-CLOSE-PWR
9026_S5 VIN VDDQSNS G67
17,25,28,35 PM_SLP_S4# 2 1 9 S5 VLDOIN 2
R478 0R2J-2-GP
2 1 9026_S3
8
7
GND
S3
VTT
PGND
3
4
1 2
Wistron Corporation
R477 0R2J-2-GP 6 5 GAP-CLOSE-PWR 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
DDR_VREF_S3_1 VTTREF VTTSNS Taipei Hsien 221, Taiwan, R.O.C.
GND
1

C568 Title
SC1U10V2ZY-GP C566 C563
TPS51100DGQR-GP
1D5V & 0D9V
2

11

SC10U10V5ZY-1GP SC10U10V5ZY-1GP
2

Size Document Number Rev


A3
D45/D46 PD
Date: Friday, March 14, 2008 Sheet 34 of 47
5 4 3 2 1

WWW.AliSaler.Com
5 4 3 2 1

DCBATOUT DCBATOUT_51117A 1D8V_PWR 1D8V_S3


G20 G53
1 2 1 2

GAP-CLOSE-PWR GAP-CLOSE-PWR
G21 G57
1 2 1 2

1
GAP-CLOSE-PWR GAP-CLOSE-PWR
SB TC7 G22 G58
5V_S5 ST15U25VDM-1-GP
DY 1 2 1 2

2
DCBATOUT_51117A
D 20071018 GAP-CLOSE-PWR GAP-CLOSE-PWR
D

G23 G59

1
1 2 1 2

1
R412 C129

2
300R2J-4-GP GAP-CLOSE-PWR C508 SC2200P50V2KX-2GP GAP-CLOSE-PWR
1

5
6
7
8
C502 C125 C127 SC10U25V6KX-1GP G60

2
D
D
D
D
SC1U10V2KX-1GP SC10U25V6KX-1GP SCD1U50V3KX-GP U14 1 2
2

1
51117A_V5FILT
2

R118 C122 GAP-CLOSE-PWR


1

SB 5V_S5 51117A_LL1 FDS8880-NL-GP Cyntec 10*10*4 G61


C503
1 2 2 1 1D8V Iomax=13A 1 2
DCR=3mohm, Irating=1A

G
S
S
S
SC1U10V2KX-1GP 0R3-0-U-GP SCD1U25V3KX-GP Id=11.6A OCP>20A
2
A

Isat=40A GAP-CLOSE-PWR

4
3
2
1
D8 Qg=12~16nC, G62
B0530WS-7-F-GP U13 Rdson=9.6~12mohm
20071005 1D8V_PWR 1 2
L24
4 13 51117A_DRVH
V5FILT DRVH 51117A_DRVL
10 9 1 2 GAP-CLOSE-PWR
K

V5DRV DRVL

SCD1U10V2KX-4GP
G54
51117A_VFB 5 12 51117A_LL IND-1D5UH-34-GP 1 2
VFB LL

1
C540
51117A_VBST 2D2R5J-1-GP
14 VBST SB

5
6
7
8
R673 TC18 GAP-CLOSE-PWR
VOUT 3 20071005

D
D
D
D
R113 0R2J-2-GP DY U15 SE330U2D5VDM-1GP G55

SC18P50V2JN-1-GP
6

2
51117A_EN_PSV PGOOD 3D3V_S0
17,25,28,34 PM_SLP_S4# 1 2 1 EN_PSV POWERPAK-8P-GP 1 2

1
SC330P50V2KX-3GP

C109
1 R114 2 51117A_TON 2 7

1 2
51117A_TRIP TON GND R112
11 8 GAP-CLOSE-PWR
TRIP PGND DY

1
249KR2F-GP C797 Id=14A 10KR2F-2-GP G56

2
1

G
S
S
S
TPS51117PWR-GP R109 DY
R119 200KR2J-L1-GP
SB Qg=28~36nC, SB 1 2

4
3
2
1

2
C 11K5R3F-GP Rdson=5.8~7.3mohm 51117A_VFB GAP-CLOSE-PWR C
Panasonic G64

1
FDS8896 ESR=15mohm 1 2
2

R110
SB CPUCORE_ON 32,34,36,43 6K98R2-GP Iripple=2.7A
84.08896.037 GAP-CLOSE-PWR
G63
PD 20071011 1 2

2
Close to VFB Pin (pin5) 1D05V_PWR 1D05V_S0
GAP-CLOSE-PWR
VCC_GFXCORE R665 0R3-0-U-GP 1D05V_S0 G124
1 2 1 2
UMANOGFX
R660 0R3-0-U-GP PD GAP-CLOSE-PWR
G123
1 2 DCBATOUT_51117B PD 1 2
DCBATOUT DCBATOUT_51117B
UMANOGFX
G95 R661 0R3-0-U-GP GAP-CLOSE-PWR
1 2 1 2 G81

1
UMANOGFX 1 2

1
GAP-CLOSE-PWR R663 0R3-0-U-GP C357 C640 C639 C815 C638

5
6
7
8

SC10U25V6KX-1GP
G94 1 2 SC10U25V6KX-1GP SC10U25V6KX-1GP SCD1U50V3KX-GP SC2200P50V2KX-2GP GAP-CLOSE-PWR

2
D
D
D
D
1 2 UMANOGFX U51 G82

2
PD R664 0R3-0-U-GP AOL1426-GP 1 2
1

GAP-CLOSE-PWR 1 2
SB TC24 G93 UMANOGFX Id=14.5A Cyntec 10*10*4 GAP-CLOSE-PWR
5V_S5 ST15U25VDM-1-GP R666 0R3-0-U-GP
DY 1 2
Qg=9.2~14nC, PD 1D05V Iomax=16A G83
2

DCR=1.05+-5%mohm,Irating=30A

G
S
S
S
1 2 1 2
20071018 GAP-CLOSE-PWR UMANOGFX Rdson=11~14mohm Isat=60A OCP>24A

4
3
2
1
G92 GAP-CLOSE-PWR
1

1D05V_PWR G76
B R544
1 2
51117B_DRVH L31
20071005 1 2
B
300R2J-4-GP GAP-CLOSE-PWR 51117B_LL 1 2
1

SCD1U10V2KX-4GP
C673 PD GAP-CLOSE-PWR

1
SC1U10V2KX-1GP 2D2R5J-1-GP IND-D56UH-12-GP G84
SB
2

1
C352
51117B_V5FILT R674 PD
R498 SB 1 2
2

SB C649 DY TC9 TC23


1

5
6
7
8

ST220U2D5VBM-2GP

ST220U2D5VBM-2GP
5V_S5 51117B_LL1 GAP-CLOSE-PWR

SC18P50V2JN-1-GP
1 2 2 1 20071005

2
D
D
D
D
SC330P50V2KX-3GP
C695 U49 G79

1 2

C693
SC1U10V2KX-1GP SCD1U25V3KX-GP AOL1412-GP 1 2
A

2R3F-GP C798 R548


D23 DY 10KR2F-2-GP DY GAP-CLOSE-PWR

2
B0530WS-7-F-GP U55 Id=13A G85

G
S
S
S
4 13 51117B_DRVH 1 2

2
V5FILT DRVH 51117B_DRVL Qg=21.5~33nC,
51117B_DRVL 51117B_VFB
10 9 Panasonic
K

4
3
2
1
V5DRV DRVL
Rdson=5.5~6.7mohm GAP-CLOSE-PWR

1
51117B_VFB
51117B_VBST
5 VFB LL 12 51117B_LL
R545
ESR=15mohm G77
14 VBST
3
Si4634DY 24K3R2F-1-GP Iripple=2.7A
1 2
R542 VOUT
51117B_EN_PSV
PD PGOOD 6
3D3V_S0 84.04634.037 GAP-CLOSE-PWR
17,20,25,28,30,34,36,37 PM_SLP_S3# 1 2 1 PD G80

2
EN_PSV
1 R543 251117B_TON 2 TON GND 7 20071011 1 2
51117B_TRIP 11 8
10KR2F-2-GP TRIP PGND
1

191KR2F-1-GP Close to VFB Pin (pin5) GAP-CLOSE-PWR


1

TPS51117PWR-GP R546 G78


R503 200KR2J-L1-GP 1 2
1

PD 6K04R2F-GP
C806 GAP-CLOSE-PWR
2

SCD1U10V2KX-5GP
2

A CPUCORE_ON 32,34,36,43 Eiger A


PD
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Vout=0.75V*(R1+R2)/R2 Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51117_1D8V_1D05V
Size Document Number Rev
A3
D45/D46 PD
Date: Monday, March 24, 2008 Sheet 35 of 47
5 4 3 2 1
5 4 3 2 1

C698
1 2 POWER_MONITOR
DCBATOUT_6263A DCBATOUT
SCD01U50V2KX-1GP

1
UMAGFX GFX_VID[4..0] 7
G34
R552 1 2
R553
UMAGFX 10KR2J-3-GP
1 2 GAP-CLOSE-PWR
D 7 GFXVR_EN
0R2J-2-GP 20070927 G37
D

2
PH & PL on P.7 1 2

PD UMAGFX R551 UMAGFX 0R2J-2-GP GAP-CLOSE-PWR


6236A_VID4 1 2 GFX_VID4 G32
R550 UMAGFX 0R2J-2-GP 1 2
R554 6236A_VID3 1 2GFX_VID3
1 2 R549 UMAGFX 0R2J-2-GP GAP-CLOSE-PWR
17,20,25,28,30,34,35,37 PM_SLP_S3#
0R2J-2-GP 6236A_VID2 1 2 GFX_VID2 G33 20070927

1
DY R540 UMAGFX 0R2J-2-GP 1 2
6236A_VID1 1 2 GFX_VID1 TC11
R276 R537 UMAGFX 0R2J-2-GP GAP-CLOSE-PWR ST15U25VDM-1-GP
DY

2
1 DY 2 6236A_VID0 1 2 GFX_VID0 G35
0R2J-2-GP 1 2

GAP-CLOSE-PWR
1 R275 2 G36
3D3V_S0
10KR2F-2-GP 1 2
UMAGFX GAP-CLOSE-PWR
3D3V_S0 1 R556 2
1K91R2F-1-GP

R555 UMAGFX
32,34,35,43 CPUCORE_ON 1 DY 2

6236A_VR_ON
6236A_AF_EN
6236A_GOOD

6236A_PMON
0R2J-2-GP

20071001 VGFXCORE VCC_GFXCORE


DCBATOUT_6263A
G25

2
C691 C387

33

32

31

30

29

28

27

26

25
1 2
U56 C378

SC10U25V6KX-1GP

SC10U25V6KX-1GP
SCD1U50V3KX-GP GAP-CLOSE-PWR

FDE
GND_T

PGOOD

VID4

VID3

VID2
AF_EN

VR_ON

PMON

1
5
6
7
8
150KR2F-L-GPUMAGFX G26
U16 UMAGFX
UMAGFX UMAGFX

D
D
D
D
5V_S0 1 2
C R5411 2 6236A_RBIAS 1 24 SI4800BDY-T1 C
RBIAS VID1
GAP-CLOSE-PWR
C3861 2UMAGFX6236A_SOFT G27
R263
SCD01U50V2KX-1GP
2 SOFT VID0 23
C384 2007/9/10 Id=7A Cyntec 7*7*3
VGFXCORE 1 2
6263A_VCC_PRM 1 UMAGFX
2 6236A_OCSET 3 22 1 2 UMAGFX Qg=8.7~13nC DCR=8mohm, Irating=13A Iomax=6.5A

G
S
S
S
OCSET PVCC
GAP-CLOSE-PWR

4
3
2
1
C683 10KR2F-2-GP C687 1 2 SC1KP50V2JN-2GP 6236A_VW 4
VW LGATE 21 6236A_LGATE SC2D2U10V3KX-1GP Rdson=23~30mohm Isat=24A OCP>12A G28
1 2 UMAGFX 1 2
UMAGFX 6236A_COMP 5 20
COMP PGND L9
SC68P50V2JN-1GP 1 R536 2 GAP-CLOSE-PWR
UMAGFX C679 6K98R3F-GP 6 19 6236A_PHASE 1 2 VGFXCORE G24
6236A_COMP_R FB PHASE
1 R531 2 1 2 UMAGFX 6236A_FB COIL-D82UH-2-GP 1 2
374KR3-GP 7 18 6236A_UGATE UMAGFX
VDIFF UGATE

1
UMAGFX SC180P50V2JN-1GP 2D2R5J-1-GP GAP-CLOSE-PWR
DROOP

UMAGFX 8 17 6236A_BOOT
1 2 1 2 R675 G29
VSEN BOOT
VSUM

R535

6236A_BOOT_R
DY 1 2
VDD
RTN

DFB

VSS
VIN

2D2R3J-2-GP C684
VO

5
6
7
8
R5301 22K21R3F-L-GP 6236A_VDIFF SCD22U16V3KX-2-GP GAP-CLOSE-PWR
UMAGFX

2
SC330P50V2KX-3GP
UMAGFX U17

D
D
D
D
UMAGFX
9

6236A_DROOP 10

11

12

13

14

15

16

C667 ISL6263ACRZ-T-GP SI4812BDY-T1-E3-GP Id=7.7A

1
1 R528
2 6236A_FB_R 6236A_VSEN 74.06263.073 C799
Qg=8.5~13nC DY

1
1

4K99R2F-L-GP
2

6236A_VSUM

UMAGFX
2007/9/10
6263A_VCC_PRM

6236A_VDD
6236A_DFB

SC560P50V2KX-2GP Rdson=16.5~21mohm G31 G30


6236A_VIN

2
UMAGFX 6236A_RTN UMAGFX GAP-CLOSE-PWR GAP-CLOSE-PWR

G
S
S
S
R26 for Intel GPU/With Load line UMA UMA

4
3
2
1

2
R27 for ATI GPU/Without Load UMAGFX
line
R257 SB
C675
C666 1 2 1 2 5V_S0
1 2 SC1U16V3KX-2GP 10R2F-L-GP
1

UMAGFX UMAGFX UMAGFX


1

C660 UMAGFX C659 SB R526


SC1KP50V2JN-2GP

SC1KP50V2JN-2GP

2K87R2F-1-GP R519
SC1KP50V2JN-2GP 1 2 DCBATOUT
2

UMAGFX C367
2
1

B B
UMAGFX 10R2F-L-GP
SC330P50V2KX-3GP

UMAGFX
1

UMAGFX 1 2
2

1
C664 R527 0R0402-PAD
SCD01U25V2KX-3GP TC8
2

UMAGFX SE330U2VDM-6-GP

2
1

G97 GAP-CLOSE-PWR R249 UMAGFX 2007/9/10


9 VCC_AXG_SENSE 1 2 1KR3F-GP
UMAGFX SB
C655 R496
2

G96 GAP-CLOSE-PWR UMAGFX


9 VSS_AXG_SENSE 1 2 1 2 1 2 6236A_VSUM_R
1

C365 7K68R2F-GP
C665
SCD033U25V3KX-GP
UMAGFX
SCD1U25V3KX-GP

UMAGFX 1 2
2
1

1
R508 R507 G90 G91
10R3F-GP 10R3F-GP SCD022U50V3KX-GP GAP-OPEN-PWR GAP-OPEN-PWR
UMAGFX
1 R500 2UMAGFX

2
2

4K53R2F-1-GP 6236A_VSUM_R_VCC_PRM
Panasonic UMAGFX
UMAGFX UMAGFX 1 R246 2 1 R497 2
ERT-J1VR103J 3K57R2F-GP
NTC-10K-9-GP
UMAGFX
2007/9/10
Parallel
VSS_AXG_SENSE_OUTCAP

VCC_AXG_SENSE_OUTCAP

A A

Place close to L1 Eiger

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ISL6263A_GFX CORE
Size Document Number Rev
C
D45/D46 PD
Date: Monday, March 24, 2008 Sheet 36 of 47

WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1

DCBATOUT DCBATOUT_8202
G101
1 2

GAP-CLOSE-PWR
G100
1 2

GAP-CLOSE-PWR
G99
D 1 2 D

GAP-CLOSE-PWR
G98
1 2

GAP-CLOSE-PWR

VGA_CORE_PWR VGA_CORE
G68
1 2

GAP-CLOSE-PWR
5V_S5 DCBATOUT_8202 G69
1 2

1
SB GAP-CLOSE-PWR
VGA R529 5V_S5 G70

1
3D3V_S0 10R2F-L-GP 1 2
C682 C674 C668

5
6
7
8

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U50V3KX-GP
GAP-CLOSE-PWR

1 2

2
1

1
SC_VCC D24 U53 G71

D
D
D
D
R494 C662 SI4800BDY-T1 1 2
10KR2F-2-GP SC1U10V3KX-3GP
C
VGA VGA CH521S-30-GP-U1 C
GAP-CLOSE-PWR

2
VGA Iomax=9A G72
2

2
43 VGACORE_PWRGD VGACORE_PWRGD SB 1 2

G
S
S
S
VGA OCP min = 14A

4
3
2
1
1

R532 C680 GAP-CLOSE-PWR


C650 G73
VGA
2

SC100P50V2JN-3GP U54 SC411_BST_L


1 2SC411_BST 1 2SC411_LX VGA VGA 1 2
2

SC411_DH VGA_CORE_PWR
VDD

L30
GAP-CLOSE-PWR
7D5R2F-GP5V_S5 SCD1U25V3KX-GP SC411_LX VGA_CORE_PWR
R533 VGA 4 PGOOD BOOT 13 VGA 1 2 G74
1 2

1
1 2 SC411_PSV 15 9 COIL-1UH-34-GP
2D2R5J-1-GP
17,20,25,28,30,34,35,36 PM_SLP_S3# EN/DEM VDDP VGA

5
6
7
8
R511 GAP-CLOSE-PWR
1

1
C651 DY C627 G75

D
D
D
D
10KR2F-2-GP

1
C678 5 NC#5 12 SC411_DH SC1U10V3ZY-6GP U52 VGA TC22 1 2

2
UGATE

1
VGA SCD22U10V2KX-1GP
14 NC#14 SI4812BDY-T1-E3-GP R505 SE330U2VDM-6-GP
2

2
DCBATOUT_8202

SC330P50V2KX-3GP
C653 3K4R2F-GP SCD1U10V2KX-4GP GAP-CLOSE-PWR
R534 SC47P50V2JN-3GP
11 SC411_LX VGA

2
PHASE

1
1 2 VGASC411_TON 16 R512
C656 VGA VGA

2
G
S
S
S
1MR2F-GP TON VGA
VGA Sanyo, 330uF, 2.5V

4
3
2
1
1

10 SC411_LX_L 1 2 SC411_LX DY SC411_VFB

2
C676 VGA_CORE_PWR 1 OC ESR=9mohm
VOUT

1
VGA SC1KP50V2KX-1GP SC411_DL
2

10KR2F-2-GP R504
SC411_VFB 3 8 SC411_DL SB 10KR2F-2-GP
FB LGATE
PGND

DY
GND

GND

VGA VGA

2
7

17

B RT8202PQW-GP VGA B

Vout=0.75*(1+R427/R189)
VGA

A Eiger A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

VGA_CORE_S0 (UMA)
Size Document Number Rev
A3
D45/D46 PD
Date: Friday, March 14, 2008 Sheet 37 of 47
5 4 3 2 1
5 4 3 2 1

AD+
U25
NEAR
8 D S 1
7 D S 2 DCBATOUT BT+
6 D S 3

1
5 D G 4 U33
R371 R370
D 100KR2J-1-GP AD+_TO_SYS 1 2 1 S D 8 D
P2003EVG-GP S D
2 7
D01R2512F-4-GP AD+ 3 S D 6

2
2

4 G D 5
R366 AD+_G_2
10KR2F-2-GP AD+

SCD1U25V2ZY-1GP
P2003EVG-GP

C460
R372
1

1
10KR2F-2-GP

1
1

2
2

2
AD+_G_1 R377

0R2J-2-GP
G46 G45
470KR2J-2-GP

R378
GAP-CLOSE-PWR GAP-CLOSE-PWR

2
DC_IN_D
1

Q11
2N7002DW-1-GP AD+

1
C464
DCBATOUT

SC1U25V0KX-GP
2
SCD1U50V3KX-GP PD
6

309KR3F-GP 2 1 BQ24745_CSSP 2 1 2 1
1
C462 C466 C807

SCD1U25V2ZY-1GP
R381

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
CHG_AGND SCD1U50V3KX-GP SCD1U50V3KX-GP

C456

C459

C29

C24
1

1
AC_OK
2

C CHG_AGND C

ICREF
BQ24745_DCIN 22 28

2
DCIN CSSP

5
6
7
8
DY

D
D
D
D
BQ24745_ACIN

FDS8884-GP
2 ACIN
27 BQ24745_CSSN
CSSN D19

U2
ICOUT
SCD01U50V2KX-1GP

3D3V_AUX_S5 11 26 C468
VDDSMB ICOUT TP1
49K9R2F-L-GP

K A 1 2

G
S
S
S
25 BQ24745_BST 1 R382 2BQ24745_BST1 1SS4000GPT-GP SC1U10V3KX-3GP
BOOT
1
R384

C467

R394 21 BQ24745_VDDP 0R0603-PAD

4
3
2
1
AC_OK VDDP
1 2BQ24745_ACOK 13 ACOK
1

C482
1

SC1U10V3KX-3GP 0R0402-PAD 24 24745_HIGH_G BT+


UGATE
10 L17
2

28,39 BAT_SCL SCL


1 2
2

23 BQ24745_LX1 C463 1 2 BT+_R 1 2


PHASE SCD1U50V3KX-GP R375
9 D01R2512F-4-GP
28,39 BAT_SDA SDA IND-5D6UH-32-GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
20 24745_LOW_G
LGATE

5
6
7
8

SCD1U50V3KX-GP
CHG_AGND

D
D
D
D

C454

C453

C452

C455

C449
FDS8884-GP

1
phoenix tsai 09/28/07 14 19 G48 G47
CHG_AGND NC#14 PGND

U3
18

2
CSOP
C473 GAP-CLOSE-PWR

1
G
S
S
S
0R0402-PAD CHG_AGND 17 GAP-CLOSE-PWR
BQ24745_IINP CSON
1 2 8 2 1

4
3
2
1
28 AD_IA SC150P50V2JN-3GP VICM
R391 C476 4K7R2J-2-GP
B BQ24745_FBO_RC R389 1 SCD1U50V3KX-GP B
1 2 2BQ24745_FBO
SC220P50V2KX-3GP

1 R388 2 6 FBO
200KR2F-L-GP BQ24745_EAI 5 16
EAI NC#16
1

BQ24745_EAO 4 EAO
C479

C474 R385 BQ24745_VREF 3


SC2200P50V2KX-2GP 7K5R2F-1-GP BQ24745_CHG_ON 7 VREF
2

CE
2 1BQ24745_EAO_RC2 1 12 15 BATT_SENSE
GND

GND VFB BATT_SENSE 39


1

C470 BQ24745_CSIP
SC1U10V3KX-3GP

SCD1U25V2ZY-1GP
1 2 U34 BQ24745_CSIN
2

29

C477
C472 BQ24745RHDR-GP
1

SC56P50V2JN-2GP
2

3D3V_AUX_S5
CHG_AGND

1 2
1

SB 3D3V_AUX_S5 CHG_AGND R62


R395 0R0402-PAD
AC_IN# to KBC 100KR2J-1-GP BQ24745_VREF
1

R390 CHG_AGND
2

AC_IN# 100KR2J-1-GP
28 AC_IN#
1

3D3V_AUX_S5
R393
2
1

C481 100KR2J-1-GP BQ24745_CHG_ON Eiger


D

A A
SC1U10V3KX-3GP
1

SCD1U10V2KX-4GP
2

Q13 R392
Wistron Corporation
D

2N7002-11-GP G AC_OK 100KR2J-1-GP DY


21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
C478

Q12 Taipei Hsien 221, Taiwan, R.O.C.


S

G 2N7002-11-GP
28 CHG_ON# Title

BQ24745 Charger
S

Size Document Number Rev


phoenix tsai 09/28/07 A3 PD
D45/D46
Date: Friday, March 14, 2008 Sheet 38 of 47
5 4 3 2 1

WWW.AliSaler.Com
A B C D E

Adaptor in to generate DCBATOUT AD+

DCIN1 AD_JK
U24
1 1 S D 8
2 S D 7

K
3 3 S D 6

1
4 C435 C436 D17 AD+_2 4 G D 5 4
2 SCD1U50V3ZY-GP SCD1U50V3ZY-GP P4SSMJ24PT-GP
4 P2003EVG-GP

1
5

A
R354 C441

1
DC-JACK70-GP-U1

200KR2J-L1-GP

SC1U50V5ZY-1-GP
2

2
R2
E
AD_OFF#_JK B R1
C

1
PDTA124EU-1-GP
Q9 R353
100KR2J-1-GP
Q10
SB
3 OUT

2
2 R1
28 AD_OFF
IN 1 GND
R2
3 3
DTC114EUA-1-GP

3D3V_AUX_S5
BATTERY CONNECTOR
3D3V_AUX_S5
1

D18 D2
BAV99PT-GP-U DY DY DY D1

1
2 BAV99PT-GP-U BAT1 2
R23 8
100KR2J-1-GP 1
3

BAV99PT-GP-U RN4 2

2
1 4 BATA_SCL_1 3
28,38 BAT_SCL
2 3 BATA_SDA_1 4
28,38 BAT_SDA
28 BAT_IN# 5
SRN33J-5-GP-U 6
BT+ 7
9
EC8 EC7
1

1
SC10P50V2JN-4GP

SC10P50V2JN-4GP
DY DY DY TYCO-CON7-11-GP
1

20.80702.007
EC76 EC77 EC78 EC75
2

2
SC1000P50V3JN-GP

SC1000P50V3JN-GP

SCD1U50V3ZY-GP SCD1U50V3ZY-GP
2

ZZZZ

PD
1
Wistron Corporation 1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
38 BATT_SENSE 1 2
R22
0R0402-PAD
AD/BATT CONN
Size Document Number Rev

D45/D46 PD
Date: Monday, March 24, 2008 Sheet 39 of 47
A B C D E
5 4 3 2 1

EMI Caps
DCBATOUT 5V_S0 1D8V_S0 3D3V_AUX_S5
5V_CRT_S0 3D3V_LAN_S5

EC58 EC13 EC116 EC108 EC44 EC97 EC99 EC94 EC92 EC93 EC70 EC71 EC9

1
DY DY DY DY DY
D EC103 EC14 EC114 EC72 EC73 EC80 EC111 D

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SCD1U25V2ZY-1GP

SCD01U50V2ZY-1GP

SCD01U50V2ZY-1GP

SCD01U50V2ZY-1GP
2

2
5V_S5 3D3V_S0 1D05V_S0

VGA_CORE

EC113 EC32 EC115 EC82 EC29 EC109 EC105 EC89 EC101 EC107 EC104 EC106 EC12 EC45 EC81 EC95 EC10 EC11
EC100
1

1
EC118 EC79 EC117 EC102 EC35 EC46 DY DY DY DY DY DY DY DY DY DY DY DY DY

1
DY
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
UMA UMA UMA UMA UMA UMA
SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP
SCD1U16V2ZY-2GP

SCD01U50V2ZY-1GP

SCD01U50V2ZY-1GP
2

SCD1U16V2ZY-2GP
2
PD
PD
C 1D8V_S3 DCBATOUT VCC_GFXCORE C

EC123 EC124

1
1

1
SPR4 SPR3 SPR2 EC127

SCD1U25V2ZY-1GP
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SPRING-58-GP SPRING-57-GP SPRING-58-GP EC125 EC126

2
SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP
SB

2
34.4B312.002 34.42T14.002 34.4B312.002 SB
DY

DY

SPR5 SPR7
Holes SPRING-57-GP SPRING-57-GP

Keyboard EMI Caps

1
34.42T14.002 34.42T14.002
DY DY DY
SB EC41 2 1 SC220P50V2JN-3GP KROW8 EC18 2 1 SC220P50V2JN-3GP KCOL16
H1 H20 H27 H32 H5 H11 H4 H13 H25 DY DY
HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE EC38 2 1 SC220P50V2JN-3GP KROW7 EC17 2 1 SC220P50V2JN-3GP KCOL15
DY DY
EC39 2 1 SC220P50V2JN-3GP KROW6 EC20 2 1 SC220P50V2JN-3GP KCOL14
DY DY
SPR1 SPR6 EC36 2 1 SC220P50V2JN-3GP KROW5 EC19 2 1 SC220P50V2JN-3GP KCOL13
B SPRING-5-GP SPRING-5-GP B
DY DY
EC37 2 1 SC220P50V2JN-3GP KROW4 EC16 2 1 SC220P50V2JN-3GP KCOL12
1

1
34.41Y01.001 34.41Y01.001 DY DY
DY DY EC33 2 1 SC220P50V2JN-3GP KROW3 EC22 2 1 SC220P50V2JN-3GP KCOL11
DY DY
EC34 2 1 SC220P50V2JN-3GP KROW2 EC21 2 1 SC220P50V2JN-3GP KCOL10
H26 H3 H23 H24 H18 H2 H16 H19 H6 H8 DY DY
HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE EC30 2 1 SC220P50V2JN-3GP KROW1 EC26 2 1 SC220P50V2JN-3GP KCOL9
DY DY
EC31 2 1 SC220P50V2JN-3GP KCOL2 EC25 2 1 SC220P50V2JN-3GP KCOL8
DY DY
EC15 2 1 SC220P50V2JN-3GP KCOL1 EC40 2 1 SC220P50V2JN-3GP KCOL7
DY
EC28 2 1 SC220P50V2JN-3GP KCOL6
1

27,28 KROW[1..8] DY
EC43 2 1 SC220P50V2JN-3GP KCOL5
27,28 KCOL[1..18] DY
EC42 2 1 SC220P50V2JN-3GP KCOL4
5V_S0 5V_S0 DY
H14 H15 H10 H29 H30 H7 H9 H31 H21 H17 EC27 2 1 SC220P50V2JN-3GP KCOL3
HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE
PD
14

10

14

13

9 8 12 11
1

A
U23C U23D A
TSAHCT125PW-GP TSAHCT125PW-GP
7

H28
HOLE
SB Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
H22
Title
2 1
0R0402-PAD EMI/Spring/Boss
1

Size Document Number Rev

D45/D46 PD
Date: Monday, March 17, 2008 Sheet 40 of 47
5 4 3 2 1

WWW.AliSaler.Com
5 4 3 2 1

PEG_RXP[15..0]
7 PEG_RXP[15..0]
PEG_RXN[15..0]
7 PEG_RXN[15..0]
PEG_TXP[15..0]
7 PEG_TXP[15..0]
PEG_TXN[15..0]
7 PEG_TXN[15..0]
U41A

PART 1 OF 7
D D
PEG_TXP0 AK33 AG31 GRXP0 SCD1U10V2KX-5GP C573 2 VGA
1 PEG_RXP0
PEG_TXN0 PCIE_RX0P PCIE_TX0P GRXN0 SCD1U10V2KX-5GP C574 2 PEG_RXN0
AJ33 PCIE_RX0N PCIE_TX0N AG30 VGA
1

PEG_TXP1 AJ35 AF31 GRXP1 SCD1U10V2KX-5GP C581 2 VGA


1 PEG_RXP1
PEG_TXN1 PCIE_RX1P PCIE_TX1P GRXN1 SCD1U10V2KX-5GP C582 2 PEG_RXN1
AJ34 PCIE_RX1N P PCIE_TX1N AF30 VGA
1
C
PEG_TXP2 AH35 I AF28 GRXP2 SCD1U10V2KX-5GP C296 2 VGA
1 PEG_RXP2
PEG_TXN2 PCIE_RX2P PCIE_TX2P GRXN2 SCD1U10V2KX-5GP C297 2 PEG_RXN2
AH34 PCIE_RX2N - PCIE_TX2N AF27 VGA
1

E
PEG_TXP3 AG35 AD31 GRXP3 SCD1U10V2KX-5GP C575 2 VGA
1 PEG_RXP3
PEG_TXN3 AG34
PCIE_RX3P X PCIE_TX3P
AD30 GRXN3 SCD1U10V2KX-5GP C576 2 VGA
1 PEG_RXN3
PCIE_RX3N PCIE_TX3N
P
PEG_TXP4
R GRXP4 SCD1U10V2KX-5GP C279 2 PEG_RXP4
AF33 PCIE_RX4P PCIE_TX4P AD28 VGA
1
PEG_TXN4 AE33 PCIE_RX4N
E PCIE_TX4N AD27 GRXN4 SCD1U10V2KX-5GP C280 2 VGA
1 PEG_RXN4
S
PEG_TXP5 AE35 S AB31 GRXP5 SCD1U10V2KX-5GP C583 2 VGA
1 PEG_RXP5
PEG_TXN5 PCIE_RX5P PCIE_TX5P GRXN5 SCD1U10V2KX-5GP C584 2 PEG_RXN5
AE34 PCIE_RX5N PCIE_TX5N AB30 VGA
1
I
PEG_TXP6 AD35 N AB28 GRXP6 SCD1U10V2KX-5GP C294 2 VGA
1 PEG_RXP6
PEG_TXN6 PCIE_RX6P PCIE_TX6P GRXN6 SCD1U10V2KX-5GP C295 2 PEG_RXN6
AD34 PCIE_RX6N PCIE_TX6N AB27 VGA
1
T
E
C PEG_TXP7 AC35 AA31 GRXP7 SCD1U10V2KX-5GP C579 2 VGA
1 PEG_RXP7 C
PEG_TXN7 AC34
PCIE_RX7P R PCIE_TX7P
AA30 GRXN7 SCD1U10V2KX-5GP C580 2 VGA
1 PEG_RXN7
PCIE_RX7N PCIE_TX7N
F
PEG_TXP8 AB33
A AA28 GRXP8 SCD1U10V2KX-5GP C277 2 VGA
1 PEG_RXP8
PCIE_RX8P PCIE_TX8P
PEG_TXN8 AA33 PCIE_RX8N
C PCIE_TX8N AA27 GRXN8 SCD1U10V2KX-5GP C278 2 VGA
1 PEG_RXN8
E
PEG_TXP9 AA35 W31 GRXP9 SCD1U10V2KX-5GP C589 2 VGA
1 PEG_RXP9
PEG_TXN9 PCIE_RX9P PCIE_TX9P GRXN9 SCD1U10V2KX-5GP C590 2 PEG_RXN9
AA34 PCIE_RX9N PCIE_TX9N W30 VGA
1

PEG_TXP10 Y35 W28 GRXP10 SCD1U10V2KX-5GP C292 2 VGA


1 PEG_RXP10
PEG_TXN10 PCIE_RX10P PCIE_TX10P GRXN10 SCD1U10V2KX-5GP C293 2 PEG_RXN10
Y34 PCIE_RX10N PCIE_TX10N W27 VGA
1

PEG_TXP11 W35 V31 GRXP11 SCD1U10V2KX-5GP C577 2 VGA


1 PEG_RXP11
PEG_TXN11 PCIE_RX11P PCIE_TX11P GRXN11 SCD1U10V2KX-5GP C578 2 PEG_RXN11
W34 PCIE_RX11N PCIE_TX11N V30 VGA
1

PEG_TXP12 V33 V28 GRXP12 SCD1U10V2KX-5GP C274 2 VGA


1 PEG_RXP12
PEG_TXN12 PCIE_RX12P PCIE_TX12P GRXN12 SCD1U10V2KX-5GP C275 2 PEG_RXN12
U33 PCIE_RX12N PCIE_TX12N V27 VGA
1

PEG_TXP13 U35 U31 GRXP13 SCD1U10V2KX-5GP C585 2 VGA


1 PEG_RXP13
PEG_TXN13 PCIE_RX13P PCIE_TX13P GRXN13 SCD1U10V2KX-5GP C586 2 PEG_RXN13
U34 PCIE_RX13N PCIE_TX13N U30 VGA
1

PEG_TXP14 T35 U28 GRXP14 SCD1U10V2KX-5GP C290 2 VGA


1 PEG_RXP14
B PEG_TXN14 PCIE_RX14P PCIE_TX14P GRXN14 SCD1U10V2KX-5GP C291 2 PEG_RXN14 B
T34 PCIE_RX14N PCIE_TX14N U27 VGA
1

PEG_TXP15 R35 R31 GRXP15 SCD1U10V2KX-5GP C268 2 VGA


1 PEG_RXP15
PEG_TXN15 PCIE_RX15P PCIE_TX15P GRXN15 SCD1U10V2KX-5GP C269 2 PEG_RXN15
R34 PCIE_RX15N PCIE_TX15N R30 VGA
1

Clock Calibration 1D1V_S0


CLK_PCIE_PEG AJ31 VGA
3 CLK_PCIE_PEG PCIE_REFCLKP
CLK_PCIE_PEG# AJ30 AG26 VGA_AG26 1 2
3 CLK_PCIE_PEG# PCIE_REFCLKN PCIE_CALRN R170 2KR2F-3-GP
SM Bus AJ27 VGA_AJ27 1 2
PCIE_CALRP R191 1K27R2F-L-GP
AK35 NC_SMB_DATA
AK34 AF3
R211 VGA
NC_SMBCLK NC_DRAM_0
AG9
VGA
VGA_RST# NC_DRAM_1
17,23,25 PCIRST1# 1 2 AM32 PERSTB NC_AC_BATT AK29
NC_FAN_TACH AK14
100R2F-L1-GP-U
216-0707005-00-GP
2

C263 VGA
SC100P50V2JN-3GP 71.0M82M.00U
1

VGA

A ZZZZ A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

M8XM_PCIE
Size Document Number Rev

D45/D46 PD
Date: Friday, March 14, 2008 Sheet 41 of 47
5 4 3 2 1
5 4 3 2 1

U41B
PART 2 OF 7

47 VIP_0 AM12 VIP_0 TXCAM_DPA0P AN9


47 VIP_1 AL12 VIP_1 TXCAP_DPA0N AN10
47 VIP_2 AJ12 VIP_2
AH12 VIP / I2C AR10
47 VIP_3 VIP_3 TX0M_DPA1P
47 VIP_4 AM10 VIP_4 TX0P_DPA1N AP10
U41F 47 VIP_5 AL10 VIP_5
SB 47 VIP_6 AJ10 VIP_6 TX1M_DPA2P AR11
0R2J-2-GP PART 7 OF 7 AH10 AP11
47 VIP_7 VIP_7 TX1P_DPA2N
D 1D8V_S0 R181 1 VGA 2 LVDDR AJ26 LVDDR_1 AG7 VARY_BL TP42
47 VHAD0 AM9 AR12 D
AH26 ControlVARY_BL AL9
VHAD_0 TX2M_DPA3P
AP12
LVDDR_2 VHAD_1 TX2P_DPA3N
DIGON AJ6 ATI_LCDVDD_ON 14
1

C159 AJ9 AR14


VPHCTL TXCBM_DPB0P
SC1U10V2KX-1GP 1 VGA 2LVDDC AK27 LVDDC_1 TXCBP_DPB0N AP14
VGA AL27 AK24 ATI_TXBCLK+ 14 AL7
2

LVDDC_2 TXCLK_UP VPCLK0


TXCLK_UN AL24 ATI_TXBCLK- 14 AK7 VIPCLK TX3M_DPB1P AR15
R182 AM24 AN27 AP15
LVSSR_1 TXOUT_U0P ATI_TXBOUT0+ 14 TX3P_DPB1N
0R2J-2-GP AN28 AN26 AM7
LVSSR_2 TXOUT_U0N ATI_TXBOUT0- 14 47 PSYNC PSYNC
AN21 LVSSR_3 TXOUT_U1P AP27 ATI_TXBOUT1+ 14 TX4M_DPB2P AR16
1D8V_S0 AN24 LVSSR_4 TXOUT_U1N AR27 ATI_TXBOUT1- 14 47 DVALID AJ7 DVALID TX4P_DPB2N AP16
AN25 LVSSR_5 TXOUT_U2P AG24 ATI_TXBOUT2+ 14
AM22 LVSSR_6 TXOUT_U2N AH24 ATI_TXBOUT2- 14 AK6 SDA TX5M_DPB3P AR17
AP21 AK26 AM6 AP17

LVDS channel
LVSSR_7 TXOUT_U3P SCL TX5P_DPB3N
AP26 LVSSR_8 TXOUT_U3N AL26
AM27 LVSSR_9 AN8 DVPCNTL__MVP_0 DPA_PVDD AM14 1D8V_S0
AR21 LVSSR_10 TXCLK_LP AR22 ATI_TXACLK+ 14 AP8 DVPCNTL__MVP_1 DPA_PVSS AL14
AR26 LVSSR_11 TXCLK_LN AP22 ATI_TXACLK- 14 AG1 DVPCNTL_0

1
AM26 AN23 AH3 INTEGRATED AH17 VGA
LVSSR_12 TXOUT_L0P ATI_TXAOUT0+ 14 DVPCNTL_1 DPB_PVDD
AJ22 AN22 AH2 TMDS/DP AG17 VGA C188 C143
LVSSR_13 TXOUT_L0N ATI_TXAOUT0- 14 DVPCNTL_2 DPB_PVSS

SC1U10V2KX-1GP

SC1U10V2KX-1GP
AJ24 AP23 AH1 1D1V_S0
ATI_TXAOUT1+ 14

2
LVSSR_14 TXOUT_L1P DVPCLK
TXOUT_L1N AR23 ATI_TXAOUT1- 14 AJ3 DVPDATA_0 DPB_VDDR_1 AN19
TXOUT_L2P AP24 ATI_TXAOUT2+ 14 AJ2 DVPDATA_1 MULTI_GFX DPB_VDDR_2 AN20
TXOUT_L2N AR24 ATI_TXAOUT2- 14 AJ1 DVPDATA_2 EXTERNAL DPA_VDDR_3 AP19
1D8V_S0 1 2 LPVDD AL22 LPVDD TXOUT_L3P AP25 AK2 DVPDATA_3 TMDS DPA_VDDR_4 AR19
R193 0R3-0-U-GP AK22 AR25 AK1
LPVSS TXOUT_L3N DVPDATA_4
AL3 AN18
VGA DVPDATA_5 DPB_VSSR_1
1

1
C234 AL2 AP18
SC1U10V2KX-1GP 216-0707005-00-GP DVPDATA_6 DPB_VSSR_2 C195VGA C184
AL1 DVPDATA_7 DPB_VSSR_3 AR18 VGA

SC1U10V2KX-1GP

SC1U10V2KX-1GP
VGA AM3 AN16
2

2
DVPDATA_8 DPB_VSSR_4
AM2 DVPDATA_9 DPB_VSSR_6 AN17
71.0M82M.00U AN2 AN15
DVPDATA_10 DPA_VSSR_5
AP3 DVPDATA_11 DPA_VSSR_7 AN11
AR3 DVPDATA_12 DPA_VSSR_8 AN12
VGA AN4 DVPDATA_13 DPA_VSSR_9 AN13
AR4 DVPDATA_14 DPA_VSSR_10 AN14

1
AP4 DVPDATA_15
AN5 AG15 VGA_DP 1 2 R639 R640 R641 SB
DVPDATA_16 DP_CALR

150R2F-1-GP

150R2F-1-GP

150R2F-1-GP
AR5 AH18 R154 VGA 150R2F-1-GP
DVPDATA_17 NC_TPVDDC
C AP5 DVPDATA_18 NC_TPVSSC AG18 C
AP6 AG6 VGA VGA

2
DVPDATA_19 HPD1
47 DVPDATA20 AR6 DVPDATA_20
AN7 PLACE OR RESISTORS CLOSE TO ASIC VGA
47 DVPDATA21 DVPDATA_21
R646 AP7 AR31
47 DVPDATA22 DVPDATA_22 R ATI_CRT_RED 15
1 2 OSC_SPREAD_VGA AR7 AP31 VGA_RB R461 1 VGA 2 0R0402-PAD
3 OSC_SPREAD 47 DVPDATA23 DVPDATA_23 RB
1

47 GPIO0 AG2 GPIO_0 G AR30 ATI_CRT_GREEN 15


90D9R3F-GP R647 AF2 AP30 VGA_GB R200 1 VGA 2 0R0402-PAD
47 GPIO1 GPIO_1 GB
1

SB 147R2F-GP GENERAL
VGA_27MSS R424
47 GPIO2 AF1 GPIO_2 PURPOSE
Close to VGA
VGA_27MSS 47 GPIO3 AE3 GPIO_3 I/O B AR29
VGA_BB R192 1
ATI_CRT_BLUE 15
10KR2J-3-GP AE2 AP29 VGA 2 0R0402-PAD
47 GPIO4
2

GPIO_4 DAC1 BB
VGA 47 GPIO5 AE1 GPIO_5
AD3 AN29 OPTIONAL STRAP TO GROUND
47 GPIO6 ATI_HSYNC 15
2

GPIO_6 HSYNC FOR RB,GB,BB


28 ATI_BL_ON AD2 GPIO_7_BLON VSYNC AN30 ATI_VSYNC 15
AD1 SEE DAC1_RGB SHEET
47 GPIO8 GPIO_8_ROMSO
47 GPIO9 AD5 GPIO_9_ROMSI RSET AN31 VGA_RSET1 2
AD4 R205 VGA 499R2F-2-GP
3.3V_DELAY GPIO_10_ROMSCK AVDD1D8 L6
47 GPIO11 AC3 GPIO_11 AVDD AR32 1 2 1D8V_S0
AC2 BLM15BD121SN1D-GP
47 GPIO12 GPIO_12
47 GPIO13 AC1 GPIO_13 AVSSQ AP32 VGA
AB3 GPIO_14_HPD2
AB2 GPIO_15_PWRCNTL_0 VDD1DI AR28
3.3V_DELAY OSC_SPREAD_VGA AB1 AP28
GPIO_16_SSIN VSS1DI
2

SB 1 2 GPIO17 AF5 PLACE OR RESISTORS CLOSE TO ASIC


GPIO_17_THERMAL_INT

1
SB R210 R125 VGA 10KR2J-3-GP AF4 AM19 VGA_R2
75R2F-2-GP 2 DY 1 R443 VGA VGA
GPIO_18_HPD3 R2 VGA_R2B R441 1
10KR2J-3-GP AG4 GPIO_19_CTF R2B AL19 VGA 2 0R2J-2-GP C300 C241
AG3 SC1U10V2KX-1GP SC1U10V2KX-1GP
VGA

2
GPIO_20_PWRCNTL_1 VGA_G2 R153 1
AD9 AM18 DY 2 75R2F-2-GP
1

GPIO_21_BBEN G2 VGA_G2B R150 1


47 GPIO22 AD8 GPIO_22_ROMCSB G2B AL18 VGA 2 0R2J-2-GP
AD7 GPIO_23_CLKREQB
GPIO24 AB4 AM17 VGA_B2 R151 1 DY 2 75R2F-2-GP
GPIO_24_JMODE B2
1

AB6 AL17 VGA_B2B R148 1 VGA 2 0R2J-2-GP


R127 GPIO_25_TDI B2B
AB7 GPIO_26_TCK
1KR2J-1-GP AB9 DAC2 AK19 PD IF Y,C,COMP OR R2,G2,B2 ARE USED
GPIO_27_TMS C ATI_TV_CRMA 15 R2B,G2B,B2B MUST BE CONNECTED
AA9 AK18
VGA GPIO_28_TDO Y ATI_TV_LUMA 15
1

1D8V_S0
SC1U10V2KX-1GP

C158 TO GROUND OR TERMINATED AT


AF8 AK17
2

GEN_A COMP CONNECTOR


VGA AF7 GEN_B
AG5 AL15
2

GEN_C V2SYNC
1

B AP9 AM15 SB B
R140 GEN_D_HPD4 H2SYNC 3.3V_DELAY
AR9 GEN_E A2VDD
VGA
499R2F-2-GP AP13 AM21 1 2
GEN_F A2VDD R161 0R3-0-U-GP
VGA AR13 GEN_G
AL21 A2VDDQ 1 2 1D8V_S0
2

VGA_VREFG A2VDDQ R176 0R3-0-U-GP


AD12 VREFG

1
AK21 DY DY
A2VSSQ VGA
1

PLACE VREF DIVIDER C210 C177


1

R147 C157 AND CAP CLOSE TO ASIC 1 2 L25 AR20 AH22 SC1U10V2KX-1GP
SC1U10V2KX-1GP
1D8V_S0 1D8V_S0

2
DPLL_PVDD VDD2DI
SCD1U16V2ZY-2GP

VGA VGA BLM15BD121SN1D-GP AP20 AG22


DPLL_PVSS VSS2DI
1

249R2F-GP DEPENDING ON OSC USED VGA DY VGA 3.3V TO 5V LEVEL SHIFT LOGIC REQUIRED
2

SELECT VOLTAGE DIVIDER C185 AM35 AJ21 1 2 IF DDC1,DDC2 USED ON M8x OR DDC1,DDC2,DDC3
2

RESISTOR VALUES C AND B SC1U10V2KX-1GP PCIE_PVDD R2SET R165 715R2F-GP


2

TO ENSURE XTALIN VOLTAGE


AM29 USED ON M7x
LEVEL OF 1.8V DDC1DATA ATI_EDID_DATA 14
VGA_CORE A14 AL29 ATI_EDID_CLK 14
DDC3,DDC4 ARE 5V TOLERANT ON M8x
MPVDD PLL DDC1CLK
B15 MPVSS
USE OSCILLATOR OR CRYSTAL CLOCKS DDC AJ15
VGA_XIN AR33 DP AUX DDC2DATA AH15
VGA_XOUT XTALIN DDC2CLK
AP33 XTALOUT
VGA_CRYS DDC3DATA_DP3_AUXN AJ5 ATI_DDCDATA 15
1R472 2 L4 1 2 DPLLVDDC AG19 AJ4
1MR2J-1-GP 1D1V_S0 DPLL_VDDC DDC3CLK_DP3_AUXP ATI_DDCCLK 15
BLM15BD121SN1D-GP
X5 VGA AG21 TS_FDO DDC4DATA_DP4_AUXN AH14
1 2 TP43 AG14
THERMAL DDC4CLK_DP4_AUXP
20 VGA_G792_N AK4 DMINUS
1

XTAL-27MHZ-62-GP VGA_CRYS AM4 DPLUS


1

VGA_CRYS C569 C570


VGA_CRYS C140 216-0707005-00-GP
SC1P50V2CN-1GP

SC1P50V2CN-1GP
2

SC2200P50V2KX-2GP
2

OPTIONAL XTAL DY
20 VGA_G792_P 71.0M82M.00U
1

VGA VGA
C180
SC1U10V2KX-1GP
2

1D1V_S0
1

1
SC10U6D3V5MX-3GP

SC1U10V2KX-1GP

A C114 C115 C206 A


SB
VGA VGA
SCD1U16V2ZY-2GP
2

VGA
R642
1 2 VGA_XIN ZZZZ
3 VGA_XIN1
1

90D9R3F-GP
SB
R643
147R2F-GP
Wistron Corporation
VGA_27M 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VGA_27M Taipei Hsien 221, Taiwan, R.O.C.
2

Title
M8XM_IO

WWW.AliSaler.Com 5 4 3 2
Size
Custom

Date:
Document Number
D45/D46
Monday, March 24, 2008
1
Sheet 42 of
Rev

47
PD
5 4 3 2 1

U41E
Part 6 of 7
P33 PCIE_VSS_1 VSS_66 P6
P34 PCIE_VSS_2 VSS_67 M9
P35 PCIE_VSS_3 VSS_68 M26
R27 PCIE_VSS_4 VSS_69 K28
R28 PCIE_VSS_5 VSS_70 M32
R29 PCIE_VSS_6 VSS_71 N14
R32 N17 U41D
PCIE_VSS_7 VSS_72
R33 PCIE_VSS_8 VSS_73 N19
1D8V_S0
VGA
U29 PCIE_VSS_9 VSS_74 N22 PART 5 OF 7
D R212 D
U32 PCIE_VSS_10 VSS_75 N33
V29 N3 D1 AR34 PCIE_VDDR 1 2 1D8V_S0
PCIE_VSS_11 VSS_76 VDDR1_1 PCIE_VDDR_1

1
V32 R5 C506 C510 C176 C136 A8 AL33 0R3-0-U-GP
PCIE_VSS_12 VSS_77 VDDR1_2 PCIE_VDDR_2

1
PCI-Express GND

SC10U6D3V5MX-3GP

SC1U10V2KX-1GP
T33 U8 VGA VGA VGA VGA A12 AM33 C310 C287 C298
PCIE_VSS_13 VSS_78 SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP VDDR1_3 PCIE_VDDR_3
V34 P13 A16 AN33 VGA VGA

2
PCIE_VSS_14 VSS_79 VDDR1_4 PCIE_VDDR_4

SCD1U16V2ZY-2GP
V35 P15 SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP A20 AN34

2
PCIE_VSS_15 VSS_80 VDDR1_5 PCIE_VDDR_5
W29 PCIE_VSS_16 VSS_81 P18 A24 VDDR1_6 PCIE_VDDR_6 AN35 VGA
W32 PCIE_VSS_17 VSS_82 P21 A28 VDDR1_7 PCIE_VDDR_7 AP34 VGA

1
SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

Memory I/O
W33 P23 C132 C243 C271 C221 B1 AP35
PCIE_VSS_18 VSS_83 VDDR1_8 PCIE_VDDR_8 R115
AA29 PCIE_VSS_19 VSS_84 P26 VGA VGA VGA VGA H1 VDDR1_9
AA32 P29 H35 R26 PCIE_VDDC 1 2 1D1V_S0

2
PCIE_VSS_20 VSS_85 VDDR1_10 PCIE_VDDC_1 0R3-0-U-GP
AB29 PCIE_VSS_21 VSS_86 P30 L18 VDDR1_11 PCIE_VDDC_2 U26

1
SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP
AB32 R1 L19 V25 C507 C219 C217 C220 C218 C142 C131
PCIE_VSS_22 VSS_87 VDDR1_12 PCIE_VDDC_3

SC10U6D3V5MX-3GP
Y33 PCIE_VSS_23 VSS_88 U5 L21 VDDR1_13 PCIE_VDDC_4 V26 VGA VGA VGA VGA

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
AB34 P9 L22 W25

2
PCIE_VSS_24 VSS_89 VDDR1_14 PCIE_VDDC_5
AB35 PCIE_VSS_25 VSS_90 R10 M10 VDDR1_15 PCIE_VDDC_6 W26 VGA VGA VGA

1
SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP
C284 C198 C285 C134

PCI-Express
AC33 PCIE_VSS_26 VSS_91 R14 M35 VDDR1_16 PCIE_VDDC_7 AA25
AD29 PCIE_VSS_27 VSS_92 R17 VGA VGA VGA VGA P10 VDDR1_17 PCIE_VDDC_8 AD26
AD32 R19 T1 AF26

2
PCIE_VSS_28 VSS_93 VDDR1_18 PCIE_VDDC_9
AF29 PCIE_VSS_29 VSS_94 R22 Y1 VDDR1_19 PCIE_VDDC_10 AA26
AF32 PCIE_VSS_30 VSS_95 V3 B35 VDDR1_20 PCIE_VDDC_11 AB25
AD33 PCIE_VSS_31 VSS_96 AK9 M1 VDDR1_21 PCIE_VDDC_12 AB26
AF34 U10 D35 VGA_CORE
PCIE_VSS_32 VSS_97 VDDR1_22

1
SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP
AF35 U15 C179 C135 C520 C150 K10
PCIE_VSS_33 VSS_98 VDDR1_23
AG27 PCIE_VSS_34 VSS_99 U18 VGA VGA VGA VGA K12 VDDR1_24 VDDC_1 N13
AG29 U21 K24 N15

2
PCIE_VSS_35 VSS_100 VDDR1_25 VDDC_2

1
SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP
AG32 U23 K26 N18 C613 C167 C523 C169
PCIE_VSS_36 VSS_101 VDDR1_26 VDDC_3

SC10U6D3V5MX-3GP
AG33 PCIE_VSS_37 VSS_102 V7 L14 VDDR1_27 VDDC_4 N21 VGA VGA VGA VGA
AJ29 W8 L15 N23

2
PCIE_VSS_38 VSS_103 VDDR1_28 VDDC_5
AJ32 PCIE_VSS_39 VSS_104 V10 L17 VDDR1_29 VDDC_6 P14
AH33 PCIE_VSS_40 VSS_105 V14 VDDC_7 P17

I/O Internal
AL34 V17 1D8V_S0 1 2 VDDCT AA11 P19
PCIE_VSS_41 VSS_106 VDD_CT_1 VDDC_8

1
SC10U6D3V5MX-3GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP
AL35 V19 R132 0R3-0-U-GP AB11 P22 C193 C182 C620
PCIE_VSS_42 VSS_107 VDD_CT_2 VDDC_9

1
AK32 V22 C146 AD10 V18 VGA VGA VGA
C PCIE_VSS_43 VSS_108
V1 VGA AF10
VDD_CT_3 VDDC_10
V21 C

2
VSS_109 VDD_CT_4 VDDC_11

SCD1U16V2ZY-2GP
A2 AK12 P V23

2
VSS_1 VSS_110 VDDC_12
A34 VSS_2 VSS_111 V9 VGA R11 VDD_CT_5 VDDC_13 W14
C3 VSS_3 VSS_112 W10 R25 VDD_CT_6 O VDDC_14 W17

1
Core
C5 W15 U11 W19 C168
VSS_4 VSS_113 VDD_CT_7 VDDC_15
W

SC10U6D3V5MX-3GP
A4 VSS_5 VSS_114 W18 U25 VDD_CT_8 VDDC_16 W22 VGA
C18 W21 AA15

2
VSS_6 VSS_115 ( 3.3V @ 50MA VDDR3)
E VDDC_17
A21 VSS_7 VSS_116 W23 AE14 VDDR3_1 VDDC_18 AA18
C23 AA6 AE15 AA21
VSS_8 VSS_117 VDDR3_2 R VDDC_19
1

1
SC10U6D3V5MX-3GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP
C11 AA10 C130 C181 C162 C165 AF12 AA23 C616
VSS_9 VSS_118 VDDR3_3 VDDC_20

1
SC10U6D3V5MX-3GP

SC1U10V2KX-1GP
C13 AA14 VGA VGA VGA VGA AE17 AB14 C183
VSS_10 VSS_119 VDDR3_4 VDDC_21
C14 AA17 AB17 VGA VGA
2

2
VSS_11 VSS_120 VDDC_22
A18 AA19 AP2 AB19

2
VSS_12 VSS_121 VDDR4_1 VDDC_23
A11 VSS_13 VSS_122 AA22 AR2 VDDR4_2 VDDC_24 AB22
C26 VSS_14 VSS_123 AB8 VDDC_25 AC13
C33 VSS_15 VSS_124 AB10 AN1 VDDR5_1 VDDC_26 AC15

1
SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP
F35 AB13 1D8V_S0 AP1 AC18 C224 C161 C160 C200 C203
VSS_16 VSS_125 VDDR5_2 VDDC_27

SC10U6D3V5MX-3GP
R7 VSS_17 VSS_126 AB15 VDDC_28 AC21 VGA VGA VGA VGA VGA
G10 AB18 A25 AC23

2
VSS_18 VSS_127 VDDRHA_1 VDDC_29
F15 VSS_19 VSS_128 AB21 A32 VDDRHA_2 VDDC_30 AE18
H17 VSS_20 VSS_129 AB23 VDDC_31 AE22
G21 VSS_21 VSS_130 AC14 B25 VSSRHA_1 VDDC_32 AE19
VGA_CORE

Memory I/O
D29 AC17 B32 AE21

Clock
VSS_22 VSS_131 VSSRHA_2 VDDC_33
A29 VSS_23 VSS_132 AC19 VDDC_34 R13
G1 VSS_24 VSS_133 AC22 B2 VDDRHB_1 VDDC_35 R15
F14 VSS_25 VSS_134 AF9 1D8V_S0 L1 VDDRHB_2 VDDC_36 R18
2

J15 VSS_26 VSS_135 AD6 VDDC_37 R21


2

E19 AB5 R146 C2 R23


VSS_27 VSS_136 R149 0R2J-2-GP VSSRHB_1 VDDC_38
E22 VSS_28 VSS_137 AD24 L2 VSSRHB_2 VDDC_39 U14
E24 W5 0R2J-2-GP U17
VSS_29 VSS_138 VDDC_40
D7 AF6 W13 U19
1

VSS_30 VSS_139 BBN_1 VDDC_41

Back
G9 AF14 AA13 U22

Bias
1

VSS_31 VSS_140 BBN_2 VDDC_42


F26 VSS_32 VSS_141 AF21 VDDC_43 V15
B
G29 VSS_33 VSS_142 AF22 VGA U13 BBP_1 VDDC_44 W11 L2 B
D33 VSS_34 VSS_143 AK10 VGA V13 BBP_2 VGA_CORE_VDDCI
M5 VSS_35 VSS_144 AF17 VDDCI_1 M12 1 2
G4 VSS_36 VSS_145 AF18 VDDCI_2 M24

1
SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP
E10 AF19 P11 C148 C156 C209 C208 BLM15BB121SN-GP
VSS_37 VSS_146 VDDCI_3

SC10U6D3V5MX-3GP
E12 VSS_38 VSS_147 AA3 VDDCI_4 P25 VGA VGA VGA VGA VGA
F17 AG12

2
VSS_39 VSS_148 216-0707005-00-GP
G18 VSS_40 VSS_149 AJ14
G22 VSS_41 VSS_150 AH21
F30 VSS_42 VSS_151 D4 71.0M82M.00U
J35 VSS_43 VSS_152 AF15
J18 VSS_44 VSS_153 AG10
H19 VSS_45 VSS_154 AN6 VGA
J21 VSS_46 VSS_155 AK15 Q6
F7 VSS_47 VSS_156 AJ17
J12 AJ18 FDN304P-1-GP
VSS_48 VSS_157
J24 VSS_49 VSS_158 AJ19
J26 VSS_50 VSS_159 AF24 D S 3D3V_S0
K30 VSS_51 VSS_160 AN32
1

J32 VSS_52 VSS_161 AK3


F33 AN3 VGA R117
G

VSS_53 VSS_162 3.3V_DELAY 100KR2J-1-GP


K6 VSS_54 VSS_163 AR8
K9 VSS_55 VSS_164 AM1 VGA
K14 AK30
2

VSS_56 VSS_165
K15 VSS_57 VSS_166 V11
K17 VSS_58
K18 VSS_59
K19 VSS_60 MECH_1 A35 MECH_1 TP94
K21 VSS_61 MECH_2 AR1 MECH_2 TP88 VGA_PWRGD_3
K22 VSS_62 MECH_3 AR35 MECH_3 TP93
M28
D

VSS_63
K3 VSS_64 VGA
L33 CORE GND Q5
VSS_65 R105 2N7002-11-GP
R104
216-0707005-00-GP 37 VGACORE_PWRGD 1 2VGA_PWRGD_1 1 2 VGA_PWRGD_2 G VGA
A A
1

0R3-0-U-GP 75KR2F-GP C111


71.0M82M.00U
S

VGA VGA ZZZZ


SCD1U16V2ZY-2GP

R111
2

VGA 32,34,35,36 CPUCORE_ON 1 2

0R3-0-U-GP OPTIONAL RC NETWORK Wistron Corporation


DY TO FINE TUNE 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
POWER SEQUENCING Taipei Hsien 221, Taiwan, R.O.C.

Title
M8XM_POWER
Size Document Number Rev
Custom PD
D45/D46
Date: Friday, March 14, 2008 Sheet 43 of 47
5 4 3 2 1
5 4 3 2 1

U41C
U41G
ODTA0 Part 3 of 7
45 ODTA0
ODTA1 Part 4 of 7
46 ODTA1 MDA0 MAA0
P27 DQA_0 MAA_0 C27
RASA0# MDA1 P28 B28 MAA1 H15 H2
45 RASA0# RASA1# MDA2 DQA_1 MAA_1 MAA2 DQB_0 MAB_0
46 RASA1# P31 DQA_2 MAA_2 B27 G14 DQB_1 MAB_1 H3
MDA3 P32 G26 MAA3 E14 J3
CASA0# MDA4 DQA_3 MAA_3 MAA4 DQB_2 MAB_2
D
45 CASA0# M27 DQA_4 MAA_4 F27 D14 DQB_3 MAB_3 J5 D
CASA1# MDA5 K29 E27 MAA5 H12 J4
46 CASA1# MDA6 DQA_5 MAA_5 MAA6 DQB_4 MAB_4
K31 DQA_6 MAA_6 D27 G12 DQB_5 MAB_5 J6
WEA0# MDA7 K32 J27 MAA7 F12 G5
45 WEA0# WEA1# MDA8 DQA_7 MAA_7 MAA8 DQB_6 MAB_6
46 WEA1# M33 DQA_8 MAA_8 E29 D10 DQB_7 MAB_7 J9
MDA9 M34 C30 MAA9 B13 F3
DQA_9 MAA_9 DQB_8 MAB_8

MEMORY INTERFACE B
CKEA0 MDA10 MAA10

MEMORY INTERFACE A
45 CKEA0 L34 DQA_10 MAA_10 E26 C12 DQB_9 MAB_9 F4
CKEA1 MDA11 L35 A27 MAA11 B12 J1
46 CKEA1 MDA12 DQA_11 MAA_11 A_A12 DQB_10 MAB_10
J33 DQA_12 MAA_A12 G27 B11 DQB_11 MAB_11 J2
CSA0_0# MDA13 J34 D26 C9 J7
45 CSA0_0# MDA14 DQA_13 MAA_BA2 A_BA0 DQB_12 MAB_A12
H33 DQA_14 MAA_BA0 C28 B9 DQB_13 MAB_BA2 F1
MDA15 H34 B29 A_BA1 A9 G2
CSA1_0# MDA16 DQA_15 MAA_BA1 DQB_14 MAB_BA0
46 CSA1_0# K27 DQA_16 B8 DQB_15 MAB_BA1 G3
MDA17 J29 M29 DQMA#0 J10
MDA18 DQA_17 DQMA_0# DQMA#1 DQB_16
J30 DQA_18 DQMA_1# K33 H10 DQB_17 DQMB_0# D12
MDA19 J31 G30 DQMA#2 F10 C10
CLKA0 MDA20 DQA_19 DQMA_2# DQMA#3 DQB_18 DQMB_1#
45 CLKA0 F29 DQA_20 DQMA_3# E33 D9 DQB_19 DQMB_2# E7
CLKA0# MDA21 F32 C22 DQMA#4 G7 C6
45 CLKA0# MDA22 DQA_21 DQMA_4# DQMA#5 DQB_20 DQMB_3#
D30 DQA_22 DQMA_5# H21 G6 DQB_21 DQMB_4# P3
CLKA1 MDA23 D32 C17 DQMA#6 F6 R4
46 CLKA1 CLKA1# MDA24 DQA_23 DQMA_6# DQMA#7 DQB_22 DQMB_5#
46 CLKA1# G33 DQA_24 DQMA_7# G17 D6 DQB_23 DQMB_6# W3
MDA25 G34 C8 V8
WDQSA[7..0] MDA26 DQA_25 RDQSA0 DQB_24 DQMB_7#
45,46 WDQSA[7..0] G35 DQA_26 QSA_0 M30 C7 DQB_25
MDA27 F34 K34 RDQSA1 B7 J14
RDQSA[7..0] MDA28 DQA_27 QSA_1 RDQSA2 DQB_26 QSB_0
45,46 RDQSA[7..0] D34 DQA_28 QSA_2 G31 A7 DQB_27 QSB_1 B10
MDA29 C34 E34 RDQSA3 B5 F9
DQMA#[7..0] MDA30 DQA_29 QSA_3 RDQSA4 DQB_28 QSB_2
45,46 DQMA#[7..0] C35 DQA_30 QSA_4 B22 A5 DQB_29 QSB_3 B6
MDA31 B34 F21 RDQSA5 C4 P2
MDA[63..0] MDA32 DQA_31 QSA_5 RDQSA6 DQB_30 QSB_4
45,46 MDA[63..0] C24 DQA_32 QSA_6 B17 B4 DQB_31 QSB_5 P8

write strobe read strobe


C MDA33 RDQSA7 C

read strobe
B24 DQA_33 QSA_7 D17 M3 DQB_32 QSB_6 W2
MAA[11..0] MDA34 B23 M2 V6
45,46 MAA[11..0] DQA_34 DQB_33 QSB_7
MDA35 A23 M31 WDQSA0 N2
MDA36 DQA_35 QSA_0B WDQSA1 DQB_34
C21 DQA_36 QSA_1B K35 N1 DQB_35 QSB_0B H14
A_BA0 MDA37 B21 G32 WDQSA2 R3 A10
45,46 A_BA0

write strobe
A_BA1 MDA38 DQA_37 QSA_2B WDQSA3 DQB_36 QSB_1B
45,46 A_BA1 C20 DQA_38 QSA_3B E35 R2 DQB_37 QSB_2B E9
MDA39 B20 A22 WDQSA4 T3 A6
A_A12 MDA40 DQA_39 QSA_4B WDQSA5 DQB_38 QSB_3B
45,46 A_A12 J22 DQA_40 QSA_5B E21 T2 DQB_39 QSB_4B P1
MDA41 H22 A17 WDQSA6 M8 P7
MDA42 DQA_41 QSA_6B WDQSA7 DQB_40 QSB_5B
F22 DQA_42 QSA_7B E17 M7 DQB_41 QSB_6B W1
PLACE MVREF DIVIDERS MDA43 D21 P5 V5
MDA44 DQA_43 ODTA0 DQB_42 QSB_7B
J19 DQA_44 ODTA0 C31 P4 DQB_43
AND CAPS CLOSE TO ASIC MDA45 G19 C25 ODTA1 R9 D2
MDA46 DQA_45 ODTA1 DQB_44 ODTB0
F19 DQA_46 R8 DQB_45 ODTB1 K5
1D8V_S0 MDA47 D19 A33 CLKA0 R6
MDA48 DQA_47 CLKA0 CLKA1 DQB_46
C19 DQA_48 CLKA1 A26 U4 DQB_47 CLKB0 A3
VGA MDA49 B19 NOTE: FOR DUAL RANK CONNECTIONS U3 K1
DQA_49 DQB_48 CLKB1
1

MDA50 A19 B33 CLKA0# USE THE CSxxB_1 CHIP SELECT PINS U2
R476 MDA51 DQA_50 CLKA0# CLKA1# DQB_49
B18 DQA_51 CLKA1# B26 U1 DQB_50 CLKB0# B3
**100R2J-2-GP MDA52 C16 DQA_52 V2 DQB_51 CLKB1# K2
MDA53 B16 A31 RASA0# Y3
MDA54 DQA_53 RASA0# RASA1# DQB_52
C15 D24 Y2 D3
2

MDA55 DQA_54 RASA1# DQB_53 RASB0#


A15 DQA_55 AA2 DQB_54 RASB1# K7
VGA VGA MDA56 H18 C32 CASA0# AA1
DQA_56 CASA0# DQB_55
1

MDA57 F18 H26 CASA1# 1D8V_S0 U9 C1


DQA_57 CASA1# DQB_56 CASB0#
1

1D8V_S0 R475 C572 MDA58 E18 U7 K4


100R2J-2-GP MDA59 DQA_58 CSA0_0# DQB_57 CASB1#
** D18 DQA_59 CSA0_0# A30 VGA PLACE MVREF DIVIDERS U6 DQB_58

1
SCD1U16V2ZY-2GP

VGA MDA60 J17 B30 V4 E1


2

DQA_60 CSA0_1# DQB_59 CSB0_0#


1

MDA61 G15 R142 AND CAPS CLOSE TO ASIC W9 E2


2

B R474 MDA62 DQA_61 CSA1_0# 100R2J-2-GP DQB_60 CSB0_1# B


E15 DQA_62 CSA1_0# G24 ** W7 DQB_61
100R2J-2-GP ** MDA63 D15 H24 W6 L3
DQA_63 CSA1_1# DQB_62 CSB1_0#
W4 M4

2
MVREFDA CKEA0 DQB_63 CSB1_1#
N35 B31
2

MVREFSA MVREFDA CKEA0 CKEA1 MVREFDB


N34 MVREFSA CKEA1 F24 VGA VGA B14 MVREFDB CKEB0 E3

1
VGA VGA MVREFSB A13 K8
MVREFSB CKEB1
1

1
C29 WEA0# R141 ** C151
WEA0#
1

R473 C571 AM34 D22 WEA1# 100R2J-2-GP 1 2 VGA_TESTEN AM30 F2


NC#AM34 WEA1# TESTEN WEB0#

SCD1U16V2ZY-2GP
100R2J-2-GP ** R194 VGA 1KR2J-1-GP VGA_TEST_MCLK AA8 M6

2
TEST_MCLK WEB1#
SCD1U16V2ZY-2GP

VGA_TEST_YCLK AA7
2

2
VGA_MEMTEST TEST_YCLK
AA5 AA4 VGA_DRAM_RST
2

MEMTEST DRAM_RST
VGA 216-0707005-00-GP 1D8V_S0
AH19 PLLTEST
216-0707005-00-GP
R130
71.0M82M.00U VGA

1
VGA VGA VGA 71.0M82M.00U 1D8V_S0 1 2

1
** R144
100R2J-2-GP ** R136 R137 R133 4K7R2J-2-GP
DIVIDER RESISTORS DDR2 DDR3

4K7R2J-2-GP
4K7R2J-2-GP 240R2F-1-GP
VGA VGA
2
MVREF TO 1.8V 100R 40.2R

2
VGA VGA
1

MVREF TO GND 100R 100R R143 1 C152


100R2J-2-GP **
SCD1U16V2ZY-2GP
2
2

A ZZZZ A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
M8XM_MEMORY
Size Document Number Rev
A3 PD
D45/D46
Date: Friday, March 14, 2008 Sheet 44 of 47
5 4 3 2 1

WWW.AliSaler.Com
5 4 3 2 1

CLKA0
44 CLKA0
CLKA0#
44 CLKA0#

1
R243 R242
56R2J-4-GP 56R2J-4-GP RASA0#
44 RASA0#
VGA VGA

2
D CASA0# D
44 CASA0#

1
C348
WEA0#
44 WEA0#
U48 SC470P50V2KX-3GP U46

2
A_BA0 L2 B9 MDA6 VGA A_BA0 L2 B9 MDA31
A_BA1 BA0 DQ15 MDA1 A_BA1 BA0 DQ15 MDA25 CKEA0
L3 BA1 DQ14 B1 L3 BA1 DQ14 B1 44 CKEA0
D9 MDA4 D9 MDA29
A_A12 DQ13 MDA2 A_A12 DQ13 MDA26
R2 A12 DQ12 D1 R2 A12 DQ12 D1
MAA11 P7 D3 MDA7 MAA11 P7 D3 MDA27 CSA0_0#
A11 DQ11 A11 DQ11 44 CSA0_0#
MAA10 M2 D7 MDA0 MAA10 M2 D7 MDA28
MAA9 A10/AP DQ10 MDA3 MAA9 A10/AP DQ10 MDA24
P3 A9 DQ9 C2 P3 A9 DQ9 C2
MAA8 P8 C8 MDA5 MAA8 P8 C8 MDA30 ODTA0
A8 DQ8 A8 DQ8 44 ODTA0
MAA7 P2 F9 MDA22 MAA7 P2 F9 MDA14
MAA6 A7 DQ7 MDA16 MAA6 A7 DQ7 MDA8
N7 A6 DQ6 F1 N7 A6 DQ6 F1
MAA5 N3 H9 MDA23 MAA5 N3 H9 MDA12 WDQSA[7..0]
A5 DQ5 A5 DQ5 44,46 WDQSA[7..0]
MAA4 N8 H1 MDA18 MAA4 N8 H1 MDA9
MAA3 A4 DQ4 MDA19 MAA3 A4 DQ4 MDA13 RDQSA[7..0]
N2 A3 DQ3 H3 N2 A3 DQ3 H3 44,46 RDQSA[7..0]
MAA2 M7 H7 MDA20 MAA2 M7 H7 MDA10
MAA1 A2 DQ2 MDA17 MAA1 A2 DQ2 MDA11 DQMA#[7..0]
M3 A1 DQ1 G2 M3 A1 DQ1 G2 44,46 DQMA#[7..0]
MAA0 M8 G8 MDA21 MAA0 M8 G8 MDA15
A0 DQ0 A0 DQ0 MDA[63..0]
44,46 MDA[63..0]
CLKA0# K8 A9 CLKA0# K8 A9 MAA[11..0]
CK VDDQ1 CK VDDQ1 44,46 MAA[11..0]
CLKA0 J8 C1 CLKA0 J8 C1
CK VDDQ2 CK VDDQ2
VDDQ3 C3 VDDQ3 C3
CKEA0 K2 C7 CKEA0 K2 C7 A_BA1
CKE VDDQ4 CKE VDDQ4 44,46 A_BA1
C9 C9 A_BA0
VDDQ5 VDDQ5 44,46 A_BA0
VDDQ6 E9 VDDQ6 E9
C G1 1D8V_S0 G1 1D8V_S0 A_A12 C
VDDQ7 VDDQ7 44,46 A_A12
CSA0_0# L8 G3 CSA0_0# L8 G3
CS VDDQ8 CS VDDQ8
VDDQ9 G7 VDDQ9 G7
WEA0# K3 G9 WEA0# K3 G9
WE VDDQ10 WE VDDQ10
RASA0# K7 A1 RASA0# K7 A1
RAS VDD1 RAS VDD1
VDD2 E1 VDD2 E1
CASA0# L7 J9 CASA0# L7 J9
CAS VDD3 L32 CAS VDD3 L29
VDD4 M9 VGA VDD4 M9 VGA
DQMA#2 F3 R1 1 2 DQMA#1 F3 R1 1 2
DQMA#0 LDM VDD5 BLM15BB121SN-GP DQMA#3 LDM VDD5 BLM15BB121SN-GP
B3 UDM B3 UDM
J1 VRAM_VDDL1 J1 VRAM_VDDL2
VDDL VDDL
VSSDL J7 VSSDL J7
1

1
SC1U10V2KX-1GP

SC1U10V2KX-1GP
ODTA0 K9 C646 C645 ODTA0 K9 C608 C611
ODT ODT
VGA VGA
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

2
RDQSA2 F7 VGA RDQSA1 F7 VGA
1D8V_S0 WDQSA2 LDQS 1D8V_S0 WDQSA1 LDQS
E8 LDQS VSSQ1 A7 E8 LDQS VSSQ1 A7
VSSQ2 B2 VSSQ2 B2
VSSQ3 B8 VSSQ3 B8
1

1
VSSQ4 D2 VSSQ4 D2
R492 RDQSA0 B7 D8 R241 RDQSA3 B7 D8
4K99R2F-L-GP WDQSA0 UDQS VSSQ5 4K99R2F-L-GP WDQSA3 UDQS VSSQ5
A8 UDQS VSSQ6 E7 A8 UDQS VSSQ6 E7
VGA VSSQ7 F2 VGA VSSQ7 F2
F8 F8
2

2
(SSTL-1.8) VREF = .5*VDDQ
VRAM_VREF1 VSSQ8 (SSTL-1.8) VREF = .5*VDDQ
VRAM_VREF2 VSSQ8
J2 VREF VSSQ9 H2 J2 VREF VSSQ9 H2
VSSQ10 H8 VSSQ10 H8
1

1
A2 NC#A2 A2 NC#A2
1

1
R491 C647 E2 A3 R239 C346 E2 A3
B 4K99R2F-L-GP NC#E2 VSS1 4K99R2F-L-GP NC#E2 VSS1 B
L1 NC#L1 VSS2 E3 L1 NC#L1 VSS2 E3
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
VGA VGA R3 J3 VGA VGA R3 J3
2

2
NC#R3 VSS3 NC#R3 VSS3
R7 N1 R7 N1
2

NC#R7 VSS4 NC#R7 VSS4


R8 NC#R8 VSS5 P9 R8 NC#R8 VSS5 P9

HYB18T512161B2F-25-GP HYB18T512161B2F-25-GP

VGA VGA
PD
PD
2nd source72.55162.00U
1D8V_S0
1D8V_S0
PD
1

1
SC1U10V2KX-1GP
C244 C155 C225 C276 C153 C154 C171 C242 C371
1

1
SC1U10V2KX-1GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP
C530 C347 C525 C619 C286 C315 C245 C314 VGA VGA VGA
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SCD01U50V2ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
VGA VGA VGA
2

2
SCD01U50V2ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

VGA VGA VGA VGA VGA VGA


2

VGA VGA VGA VGA VGA

A ZZZZ A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
VRAM DDR2 A
Size Document Number Rev
A3 PD
D45/D46
Date: Monday, March 24, 2008 Sheet 45 of 47
5 4 3 2 1
5 4 3 2 1

CLKA1
44 CLKA1
CLKA1#
44 CLKA1#

1
R174 R175
56R2J-4-GP 56R2J-4-GP
VGA VGA RASA1#
44 RASA1#

2
D D
CASA1#
44 CASA1#

1
C223

U44 SC470P50V2KX-3GP U40 WEA1#


44 WEA1#

2
A_BA0 L2 B9 MDA36 VGA A_BA0 L2 B9 MDA60
A_BA1 BA0 DQ15 MDA32 A_BA1 BA0 DQ15 MDA56
L3 BA1 DQ14 B1 L3 BA1 DQ14 B1
D9 MDA38 D9 MDA61 CKEA1
DQ13 DQ13 44 CKEA1
A_A12 R2 D1 MDA35 A_A12 R2 D1 MDA58
MAA11 A12 DQ12 MDA34 MAA11 A12 DQ12 MDA59
P7 A11 DQ11 D3 P7 A11 DQ11 D3
MAA10 M2 D7 MDA37 MAA10 M2 D7 MDA62 CSA1_0#
A10/AP DQ10 A10/AP DQ10 44 CSA1_0#
MAA9 P3 C2 MDA33 MAA9 P3 C2 MDA57
MAA8 A9 DQ9 MDA39 MAA8 A9 DQ9 MDA63
P8 A8 DQ8 C8 P8 A8 DQ8 C8
MAA7 P2 F9 MDA45 MAA7 P2 F9 MDA52 ODTA1
A7 DQ7 A7 DQ7 44 ODTA1
MAA6 N7 F1 MDA40 MAA6 N7 F1 MDA50
MAA5 A6 DQ6 MDA46 MAA5 A6 DQ6 MDA54 WDQSA[7..0]
N3 A5 DQ5 H9 N3 A5 DQ5 H9 44,45 WDQSA[7..0]
MAA4 N8 H1 MDA44 MAA4 N8 H1 MDA49
MAA3 A4 DQ4 MDA42 MAA3 A4 DQ4 MDA48 RDQSA[7..0]
N2 A3 DQ3 H3 N2 A3 DQ3 H3 44,45 RDQSA[7..0]
MAA2 M7 H7 MDA43 MAA2 M7 H7 MDA55
MAA1 A2 DQ2 MDA41 MAA1 A2 DQ2 MDA51 DQMA#[7..0]
M3 A1 DQ1 G2 M3 A1 DQ1 G2 44,45 DQMA#[7..0]
MAA0 M8 G8 MDA47 MAA0 M8 G8 MDA53
A0 DQ0 A0 DQ0 MDA[63..0]
44,45 MDA[63..0]
CLKA1# K8 A9 CLKA1# K8 A9 MAA[11..0]
CK VDDQ1 CK VDDQ1 44,45 MAA[11..0]
CLKA1 J8 C1 CLKA1 J8 C1
CK VDDQ2 CK VDDQ2
VDDQ3 C3 VDDQ3 C3
CKEA1 K2 C7 CKEA1 K2 C7 A_BA1
CKE VDDQ4 CKE VDDQ4 44,45 A_BA1
C9 C9 A_BA0
VDDQ5 VDDQ5 44,45 A_BA0
VDDQ6 E9 VDDQ6 E9
C G1 1D8V_S0 G1 1D8V_S0 A_A12 C
VDDQ7 VDDQ7 44,45 A_A12
CSA1_0# L8 G3 CSA1_0# L8 G3
CS VDDQ8 CS VDDQ8
VDDQ9 G7 VDDQ9 G7
WEA1# K3 G9 WEA1# K3 G9
WE VDDQ10 WE VDDQ10
RASA1# K7 A1 RASA1# K7 A1
RAS VDD1 RAS VDD1
VDD2 E1 VDD2 E1
CASA1# L7 J9 CASA1# L7 J9
CAS VDD3 L7 CAS VDD3 L3
VDD4 M9 VGA VDD4 M9 VGA
DQMA#5 F3 R1 1 2 DQMA#6 F3 R1 1 2
DQMA#4 LDM VDD5 BLM15BB121SN-GP DQMA#7 LDM VDD5 BLM15BB121SN-GP
B3 UDM B3 UDM
J1 VRAM_VDDL3 J1 VRAM_VDDL4
VDDL VDDL
VSSDL J7 VSSDL J7
1

1
SC1U10V2KX-1GP

SC1U10V2KX-1GP
ODTA1 K9 C308 C307 ODTA1 K9 C174 C173
ODT ODT
VGA VGA
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

2
RDQSA5 F7 VGA RDQSA6 F7 VGA
1D8V_S0 WDQSA5 LDQS 1D8V_S0 WDQSA6 LDQS
E8 LDQS VSSQ1 A7 E8 LDQS VSSQ1 A7
VSSQ2 B2 VSSQ2 B2
VSSQ3 B8 VSSQ3 B8
1

1
VSSQ4 D2 VSSQ4 D2
R216 RDQSA4 B7 D8 R162 RDQSA7 B7 D8
4K99R2F-L-GP WDQSA4 UDQS VSSQ5 4K99R2F-L-GP WDQSA7 UDQS VSSQ5
A8 UDQS VSSQ6 E7 A8 UDQS VSSQ6 E7
VGA VSSQ7 F2 VGA VSSQ7 F2
F8 F8
2

2
(SSTL-1.8) VREF = .5*VDDQ
VRAM_VREF3 VSSQ8 (SSTL-1.8) VREF = .5*VDDQ
VRAM_VREF4 VSSQ8
J2 VREF VSSQ9 H2 J2 VREF VSSQ9 H2
VSSQ10 H8 VSSQ10 H8
1

1
A2 NC#A2 A2 NC#A2
1

1
R217 C283 E2 A3 R163 C172 E2 A3
B 4K99R2F-L-GP NC#E2 VSS1 4K99R2F-L-GP NC#E2 VSS1 B
L1 NC#L1 VSS2 E3 L1 NC#L1 VSS2 E3
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
VGA VGA R3 J3 VGA VGA R3 J3
2

2
NC#R3 VSS3 NC#R3 VSS3
R7 N1 R7 N1
2

2
NC#R7 VSS4 NC#R7 VSS4
R8 NC#R8 VSS5 P9 R8 NC#R8 VSS5 P9

HYB18T512161B2F-25-GP HYB18T512161B2F-25-GP

VGA VGA
PD
2nd source72.55162.00U PD

1D8V_S0
1D8V_S0
1

1
C636 C641 C262 C345 C521 C547 C629 C648
1

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC1U10V2KX-1GP
C564 C591 C164 C632 C644 C626 C318 C332 VGA VGA VGA
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC1U10V2KX-1GP

SCD01U50V2ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
VGA VGA VGA
2

2
SCD01U50V2ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

VGA VGA VGA VGA VGA


2

VGA VGA VGA VGA VGA

A ZZZZ A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
VRAM DDR2 B
Size Document Number Rev
A3 PD
D45/D46
Date: Monday, March 24, 2008 Sheet 46 of 47
5 4 3 2 1

WWW.AliSaler.Com
5 4 3 2 1

Note:1 VIP3 MUST NOT BE PULLED HIGH ON M82-M


Note:2 GPIO8 MUST NOT BE PULLED HIGH ON M86-M or M7X

RECOMMENDED SETTINGS
D 3.3V_DELAY 0= DO NOT INSTALL RESISTOR D
CONFIGURATION STRAPS 1 = INSTALL 10K RESISTOR
X = DESIGN DEPENDANT
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, NA = NOT APPLICABLE
R419 1 VGA 2 10KR2J-3-GP RSVD = ATI RESERVED
42 GPIO0 THEY MUST NOT CONFLICT DURING RESET
R420 1 VGA 2 10KR2J-3-GP (DO NOT INSTALL)
42 GPIO1
R421 1 DY 2 10KR2J-3-GP
42 GPIO2
R122 1 DY 2 10KR2J-3-GP M8x M7x
42 GPIO3
R422 1 DY 2 10KR2J-3-GP STRAPS PIN DESCRIPTION OF DEFAULT SETTINGS
42 GPIO4
R423 1 VGA 2 10KR2J-3-GP
42 GPIO5
R121 1 DY 2 10KR2J-3-GP
42 GPIO6
R425 1 DY 2 10KR2J-3-GP BIF_MSI_DIS VIP1 MESSAGE SIGNAL INTERRUPT ENABLED NA 0 NOTE 1: HD AUDIO MUST ONLY BE ENABLED
42 GPIO8
R123 1 DY 2 10KR2J-3-GP
42 GPIO9
R428 10KR2J-3-GP BIF_AUDIO_EN VIP3 ENABLE HD AUDIO X X
ON SYSTEMS THAT ARE LEGALLY ENTITLED.
42 GPIO11 1 DY 2 (M7XM and M86M ONLY) Note:1 IT IS THE RESPONSIBILITY OF THE SYSTEM
R426 1 DY 2 10KR2J-3-GP
42 GPIO12
R427 1 VGA 2 10KR2J-3-GP BIF_64BAR_EN_A VIP5 64 BIT BARS DISABLED NA 0 DESIGNER TO ENSURE ENTITLEMENT
42 GPIO13
R124 1 DY 2 10KR2J-3-GP TX_PWRS_ENB GPIO0 PCIE FULL TX OUTPUT SWING X X
42 GPIO22
NOTE 2: HDMI MUST ONLY BE ENABLED
R135 1 DY 2 10KR2J-3-GP TX_DEEMPH_EN GPIO1 PCIE TRANSMITTER DE-EMPHASIS ENABLED X X
42 VIP_0
R134 10KR2J-3-GP
ON SYSTEMS THAT ARE LEGALLY ENTITLED.
42 VIP_1 1 DY 2
IT IS THE RESPONSIBILITY OF THE SYSTEM
R145 1 DY 2 10KR2J-3-GP BIF_DEBUG_ACCESS GPIO4 DEBUG SIGNALS MUXED OUT 0 0
42 VIP_2
R139 1 DY 2 10KR2J-3-GP DESIGNER TO ENSURE ENTITLEMENT
42 VIP_3
R439 1 DY 2 10KR2J-3-GP BIF_AUDIO_EN GPIO8 ENABLE HD AUDIO ( M82M ONLY) Note:2 X RSVD
42 VIP_4
R436 1 DY 2 10KR2J-3-GP
42 VIP_5
R131 1 DY 2 10KR2J-3-GP BIF_GEN2_EN_A GPIO5 Allows either PCIe 2.5GT/s or 5.0GT/s operation X 0
42 VIP_6
R129 1 DY 2 10KR2J-3-GP
42 VIP_7
BIOS_ROM_EN GPIO_22_ROMCSB DISABLE EXTERNAL BIOS ROM NA X
R435 1 DY 2 10KR2J-3-GP
42 VHAD0
R120? 1 DY 2 10KR2J-3-GP SB ROMIDCFG(3:0) GPIO[13:11,9] SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT XX X X X X X X
42 DVALID
R434 1 DY 2 10KR2J-3-GP
42 PSYNC
VIP_DEVICE_STRAP_ENA VSYNC IGNORE VIP DEVICE STRAPS O O
C C
BIF_VGA DIS PSYNC VGA ENABLED 0 O

BIF_HDMI_EN HSYNC HDMI ENABLE (SEE NOTE 2) X X

DEBUG_ I2C_ENABLE GPIO6 Internal use only 0 0


1D8V_S0

R431 1 VGA 2 10KR2J-3-GP


42 DVPDATA20
R430 1 VGA 2 10KR2J-3-GP ANY UNUSED
42 DVPDATA21
R432 1 VGA 2 10KR2J-3-GP MEM_TYPE GPIO OR DVP MEMORY TYPE,MAKE AND SIZE INFO X X X X X X X X
42 DVPDATA22
R433 1 VGA 2 10KR2J-3-GP THAT ARE NOT
42 DVPDATA23
CONFIG STRAPS
Only populate the required straps, FOR EXAMPLE
see table and databook DVPDATA20:23
IN THIS DESIGN
2

2
10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

VRAM SETTING
1

ATI RESERVED CONFIGURATION STRAPS For Hynix 上R431,R430,R432,R433 (63.10334.1DL)


VGA VGA VGA VGA ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, Delete R587,R627,R649,R653
R587 R627 R649 R653 THEY MUST NOT CONFLICT DURING RESET

VHAD0 VIP0 VIP2 VIP4 VIP6 VIP7 GPIO2 GPIO3 H2SYNC


For Qimonda 上R431,R430,R432,R587 (63.10334.1DL)

B Delete R433,R627,R649,R653 B
PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET For Samsung 上R431,R430,R627,R433 (63.10334.1DL)
DVPDATA20 1
GPIO_28_TDO GENERICC GPIO21_BB_EN
DVPDATA21 1 HY5PS121621CFP-25 Hynix Delete R587,R432,R649,R653
DVPDATA22 1 72.51216.F0U 手動改共同BOM
DVPDATA23 1 手動改D45 BOM U43 71.CNTIG.H0U 手動改NET
DM2 62.10017.G31
U57 71.ICH9M.E0U U49 84.04634.037 DM2 62.10017.G31
U15 84.08896.037
DVPDATA20 1 H29 34.4B417.001 U35 62.10053.401
R186,187,188,198,201,202-> 63.R0034.1DL H30 34.4B417.001
DVPDATA21 1 HYB18T512161B2F-25 Qimonda H27 34.4F403.001
DVPDATA22 1 72.18512.M0U H31 34.4F403.001
H7 34.4F403.001
DVPDATA23 0 D45 VRAM SELECT H9 34.4F403.001
H10 34.4G501.001
DVPDATA20 1 U11 71.00773.00G
DVPDATA21 1 K4N51163QE-ZC25 SamSung U64 71.00380.003
U35 62.10053.401
DVPDATA22 0 72.45116.A0U
手動改D46 BOM U43 71.CNTIG.G0U
U7 71.08111.E03
DVPDATA23 1
A
U57 71.ICH9M.E0U A

DVPDATA20 1 H5PS5162FFR-25C
ZZZZ

DVPDATA21 1 HYNIX Wistron Corporation


DVPDATA22 0 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
DVPDATA23 0 72.55162.00U
Title
STRAPS
Size Document Number Rev
Custom PD
D45/D46
Date: Monday, March 17, 2008 Sheet 47 of 47
5 4 3 2 1

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