Schmatics Dell 7548 7547 Quanta AM6 MB - DA0AM6MB8E0 REV E PDF

1 2 3 4 5 6 7 8
f ix
vina AM6 BLOCK DIAGRAM
1600 MT/S
A
DDR3L SO-DIMM A
1600 MT/S AMD

DDR3L SO-DIMM Broadwell ULT PCIE X4
Opal XT DDR3Lx8
Haswell ULT TDP 25W
USB3.0 Port *1 USB2.0 / USB3.0
power share
15W /28W
USB2.0 / USB3.0
USB3.0 Port*1 BGA
DDI 1 Redriver
USB2.0 HDMI CONN
USB2.0 Port *1 Lynx Point LP PS8401A
MCP 1168pins
eDP(x4 lanes) eDP Panel 15.6"
UHD/QHD/FHD/HD
B
USB2.0 B
Touch Panel
USB2.0
Camera FFS sensor
SATA 6Gb/s
Digital Mic HDD Conn
2.5" 7.0mm
HP+MIC
Combo Jack x1 Audio Codec HDA
ALC3234 USB2.0
Speaker 2Wx2 M2 (22X30)
PCIE
Bluetooth
WiFi
USB 2.0
Card Reader
C C
RTS5176E
I2C
Touch PAD
40 mm X 24 mm
PS/2 LPC
SPI
Keyboard CONN KBC
ITE 8528E HSPI
24MHz 32.768KHz
Thermal IC
NCT7718W
SPI ROM
64Mbit
SPI ROM
PWM FAN
D 64Mbit D
www.vinafix.com Quanta Computer Inc.

PROJECT : AM6
Size Document Number Rev
A
Block Diagram
Date: Monday, May 05, 2014 Sheet 1 of 58
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
x
fiHSIO
in a Port USB3.0 PCIE SATA USB2.0
v USB3.0_1 USB2.0_0
1 Left Power Share Left Power Share
USB3.0_2 USB2.0_1
2 Right
PCIE CLK Right /w 3.0
A A
USB3.0_3 PCIE1 CLK0 USB2.0_2

3 X X X Right
USB3.0_4 PCIE2 CLK1 USB2.0_3
4 X X X Card Reader
PCIE3 CLK2 USB2.0_4
5 X X Camera
6 PCIE4 CLK3 USB2.0_5

WIFI WIFI eTP
GPU 4X GPU 4X Blue Tooth
B B
GPU 4X X X
9 PCIE5
GPU 4X
10 PCIE5
GPU 4X
11 PCIE6 SATA3
X X
12 PCIE6 SATA2
X X
13 PCIE6 SATA1
X HDD
C 14 PCIE6 SATA0 C
X X
D D
Quanta Computer Inc.

PROJECT : AM6
A
PORT ASSIGNMENT
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
fix
ina
+3.3V_SUS +3.3V_RUN
v MB
2.2K 2.2K 2.2K 2.2K
+3.3V_RUN
AP2 SMBCLK SMB_PCH_CLK
DMN66D0LDW
AH1 SMBDATA SMB_PCH_DAT SODIMM A
A A
DMN66D0LDW
+3.3V_SUS
Haswell SODIMM B
ULT
2.2K 2.2K
+3.3V_RUN +3.3V_SUS
AN1 SMB_CLK0
Free-fall sensor
AK1 SMB_DAT0
4.7K 4.7K 4.7K 4.7K

+3.3V_RUN
F1 I2C1_SCL
DMN66D0LDW
G4 I2C1_SDA Touch pad
DMN66D0LDW
+3.3V_SUS
B
2.2K 2.2K B
AU3 SMB_CLK_ME1
AH3 SMB_DATA_ME1
Function IC Address
Thermal IC NCT7718 1001100xb (98h)
Thermal IC G781-1P8 1001101xb (9Ah)
Charge IC BQ24715RGRR 00010010 (0x12h)
+3.3V_ALW Battery Battery 00010110 (0X16h)
DMN66D0LDW
DMN66D0LDW
SMBUS
+3.3V_SUS
DIMM A SPD (A0h)

DIMM B SPD (A4h)
2.2K 2.2K
Free-fall sensor LNG3DMTR (50h)
MB 115 SMBDAT1 I2C Touch Pad (2Ch)
116 SMBCLK1
+3.3V_ALW
100
5
C SIO 100 6 Battery
C
4.7K 4.7K
ITE8528E 110 SMBCLK0
0
10
+V3.3_THERMAL2
111 SMBDAT0 0 11 Charger
4.7K 4.7K
V3.3_THERMAL2
8
+3.3V_RUN MOS
7 THERMAL(G781-1P8)
MOS GPU
4.7K 4.7K
94 SMBCLK3 8
95 SMBDAT3 7 THERMAL(NCT7718)
D D

PROJECT : AM6
A
SMBUS
1 2 3 4 5 6 7 8
5 4 3 2 1
a fix
in
Adapter 90W VER : 1A
v
Charger
(BQ24715RGRR) +PWR_SRC
D D
Battery 2S2P
+3.3V_EN2 ALW_ON SIO_SLP_S5# DDR_PG_CTRL +3.3V_SUS 1.8V_GFX_PGOOD 1.8V_GFX_PGOOD H_VR_ENABLE_MCP
RTK RTK RTK RTK TI

RT8230CGQW RT8231AGQW RT8228AZ RT8899AGQW TPS51622RSM
+3.3V_ALW +5V_ALW +15V_ALW +V_VDDQ +DDR_VTT +1.05V_SUS +VGPU_CORE +1.35V_GFX +VCCIN
C C
SUS_ON RUN_ON +3.3V_RUN +3V_GFX DGPU_PWR_EN RUN_ON MODPHY_EN RUN_ON +3V_GFX
Load Switch Load Switch LDO LDO Load Switch Load Switch Load Switch Load Switch Load Switch
AO6402A RQ3E150BNFU7TB G9661-25ADJF12U G9661-25ADJF12U AO6402A AO6402A FDMC7678 RQ3E150BNFU7TB RQ3E150BNFU7TB
B B
+3.3V_SUS +3.3V_RUN +1.5V_RUN +1.8V_GFX +3V_GFX +5V_RUN +V1.05DX_MODPHY +1.05V_RUN +PCIE_VDDC_GFX
A A

PROJECT : AM6
A
Power Block Diagram
5 4 3 2 1
5 4 3 2 1
a fix
Battery Mode 2
+PWR_SRC 1 +PWR_SRC +VCHGR
n
vi
7
+15V_ALW LATCH
3 +3.3V_RTC_LDO +3.3V_ALW 5
(POWER_SW_IN0#)
+5V_ALW 7
+5V_ALW PWR 3V/5V
9 BTN VR CHARGER Battery
SUS +3.3V_SUS
+3.3V_ALW
EN2
EN1
MOS SW
D D
G
4 3.3V_ALW_ON
+PWR_SRC
4
SYS_PWR_SW#
10 (S5 start point.
+1.05V_SUS (Only available when S5 -> S0)
1.05V 8 6 ALW_ON
SUS_ON
VR
11 RSMRST# SUS_ON to RSMRST# delay 15mS
DPWROK & RSMRST#
EN
9 EC 12 AC_PRESENT
+3.3V_SUS 26 ACPRESENT
SIO_PWRBTN#
HWPG 13 14 PWRBTN#
SIO_SLP_S5#
SLP_S5#
SIO_SLP_S4# 15
+PWR_SRC SLP_S4#
SIO_SLP_S3#
16 SLP_S3#
SIO_SLP_S3#
SIO_SLP_S4#
SIO_SLP_S5#
26 HWPG
SYS_PWROK
DDR/VTT +V_VDDQ 17 APWROK
EC_PWROK
C C
27 EC_PWROK
VR
RUN_ON
PCH_PWROK
26 HWPG
VCCST_PWRGD
+DDR_VTT 34 PLTRST#
19 PLTRST#
32 20 27 16 15 14
SYS_PWROK
32 SYS_PWROK
DDR_PWRGD 18
PG HWPG to EC_PWROK delay 5mS EC_PWROK to SYS_PWROK delay 100mS
+PWR_SRC
S5
S3
25 1.5V_RUN_PWRGD Haswell ULT

16
DDR_PG_CTRL +VCCIN
IMVP 29
SIO_SLP_S5#14
VR
IMVP_PWRGD
PG 30
EN
+5V_RUN
21
B RUN SVID H_VR_ENABLE_MCP 28 33 31 B
+5V_ALW
+3.3V_ALW MOS SW +3.3V_RUN SVID CPUPWRGOOD
+1.05V_SUS 23 33 CPU MCP
+1.05V_RUN 28 H_VR_ENABLE_MCP
22 +3.3V_ALW +3V_GFX VR_EN
G2
GFX PWR 30 IMVP_PWRGD
VR_READY
DGPU_PWR_EN G1
Page 55 MOS
G
GPIO17
GPIO50
G1 DGPU_PWR_EN
GPIO54
RUN_ON 20 +1.05V_SUS +PCIE_VDDC_GFX
G4 +PWR_SRC
GFX PWR
+3V_GFX G2 +VGPU_CORE
MOS G6 G7
+5V_ALW
DGPU_PWROK
+1.35V_GFX
+3.3V_ALW
IMVP G6 G8
+1.5V_RUN 24
DGPU_RST#
A
1.5V VR A
+1.8V_GFX G3
VR GFX DGPU_PWROK
1.5V_RUN_PWRGD 25 PG G7
EN
PG
EN
VR Quanta Computer Inc.

1.8V_GFX_PGOOD G5
PG 1.8V_GFX_PGOOD G5
EN
RUN_ON 20 DGPU PROJECT : AM6

+3V_GFX G2 POWER SEQUENCE A

5 4 3 2 1
5 4 3 2 1
Power x Sequence
fito Shark Bay ULT PSS, 490828, Rev1.1
in
(G3 a S0)
v +PWR_SRC
+5V_ALW2 and +3.3V_RTC_LDO G3 mode: > EC reset time + output ALW_ON

S5 mode: > Power button DE-BOUNCE time
POWER_ SW_IN0#
D D
LATCH
G3 mode: Asserted by HW latch of power button event
3.3V_ALW_ON S0 mode: Be keeped on high by ALW_ON
1.12 ms (3.3_ALW_ON to +3.3V_ALW)
+3.3V_ALW
(EC on) 168 ms (EC, EC reset time about 50.4ms, 1650 Tick*(1/32.768K))
ALW_ON(EC)
1 ms (ALW_ON to +5V_ALW)
+5V_ALW
1.34 ms (ALW_ON to +15V_ALW)
+15V_ALW
G3 mode: EC don't care this event.

SYS_PWR_SW# S5 mode: Upon power always exist, and this pin keeped on high. Start from this event.
45.4 us (EC, ALW_ON to SUS_ON, EC)

SUS_ON(EC)
4.94 ms (SUS_ON to +3.3_SUS)

+3.3V_SUS
(VCCSUS, VCCDSW)
2.72 ms (SUS_ON to +1.05V_SUS)
+1.05V_SUS
35.1 ms (+3.3V_SUS to RSMRST#, t05=min 10ms)

(For a non-DeepSx system, DPWROK and RSMRST# go high at the same time)
RSMRST#(EC) (VCCDSW (+3.3V_SUS) to DPWROK (RSMRST#), t04=min 10ms)
(DPWROK, suspend power well)
Valid SUSPWRDNACK will assert low to gives an added flexibility for the EC to turn ON the Suspend Rails.
SUSPWRDNACK (RSMRST# de-assertion to SUSPWRDNACK valid. Timing set by PCH.), t06=min 200ms)
C C
For a non-DeepSx system SUS_ACK# will rise with +3.3V_SUS due to weak internal pull-up
SUSACK#(PCH IPU)
SIO_PWRBTN#(EC) minimum duration of PWRBTN# assertion=16ms. PWRBTN# can assert before or after than RSMRST#
102 ms (RSMRST# to SIO_SLP_S5#, t07=min 5ms)
SIO_SLP_S5#(PCH)
35.5 us (SIO_SLP_S5# to SIO_SLP_S4#, t09=min 30us)
SIO_SLP_S4#(PCH)
43.1 us (SIO_SLP_S4# to SIO_SLP_S3#, t10=min 30us)
SIO_SLP_S3#(PCH)
+V_VDDQ
27.2 ms (VDDQ (CPU) (-20% of nominal value) to VR_VDDQPWRGD, t44=min 100ns)
DDR_PWRGD
DDR_PG_CTRL
16.3 us (DDR_PG_CTRL to +DDR_VTT, tCPU13=max 35us)
+DDR_VTT
22.5 ms (EC, SLP_S3# to RUN_ON)

RUN_ON(EC)
+5V_RUN
163 ms (VccSUS (+3.3_SUS) to VccASW (+1.05V_PCH), t29= min 0ms)
+1.05V_RUN 163 ms (VCCSUS to VccCorePCH (+1.05V_RUN), t31=min 0ms)

B (VccCorePCH, VCCST, VCCASW) B
+3.3V_RUN
(VccSPI)
+1.5V_RUN
1.5V_RUN_PWRGD
SIO_EXT_SCI#
SIO_EXT_SMI# 22.5 ms (VDDQ ramping & stable before VCCST stable, tCPU02b=max infinity ms)
26.8 ms (VDDQ to VCCST_PWRGD, tCPU01=min 1ms)
HWPG(ALL_SYS_PWRGD) 5.08 ms (VCCASW (+1.05V_RUN) to APWROK (HWPG), t11=min 1ms)

(APWROK, VCCST_PWRGD) 5.08 ms(VCCST (+1.05V_RUN) to VCCST_PWRGD, tCPU00=min 1ms)
-386 ns (VCCST_PWRGD to VR_EN (IMVP_VR_EN), tCPU05=max 100ns)

IMVP_VR_ON(EC)
(VR_EN)
28.2 ms(VDDQ (+V_VDDQ_VR) ramping&stable to VCCIN ramping, tCPU03=min 100ns)
5.56 ms(VCCST (+1.05V_RUN) ramping&stable to VCCIN ramping, tCPU04=min 100ns)
+VCCIN 824 us(VR_EN (IMVP_VR_EN) asserted until VCCIN ramped to Vboot, tCPU07=max 2.5ms)
A (VCCIN- CPU CORE) A
IMVP_PWRGD
(VR_READY)
19.3 ms(VccCorePCH (+1.05V_RUN) stable to PWROK (EC_PWROK), t41= min 5ms)
EC_PWROK(EC) 15.1 ms(ALL_SYS_PWRGD (HWPG) to PWROK (EC_PWROK), t14= min 5ms)
(PCH_PWROK(PWROK)) 15.1 ms(APWROK (HWPG) to PWROK (EC_PWROK), t30= min 0ms)
125 ms(ALL_SYS_PWRGD (HWPG) to SYSPWROK, t15= min 99ms)
SYS_PWROK
valid Quanta Computer Inc.
CPU SVID BUS(CPU)
126 ms(ALL_SYS_PWRGD (HWPG) to PLTRST#, tULT14=min 99ms)
PROJECT : AM6
PLTRST#(PCH) PLTRST# could de-assert prior to final SVID value Size Document Number Rev
A
G3 to S0
G3 S0 Date: Monday, May 05, 2014 Sheet 6 of 58
5 4 3 2 1
5 4 3 2 1
fix
vina Haswell ULT (DISPLAY)
+VCCIOA_OUT
U17A HSW_ULT_DDR3L
D EDP_COMP R70 24.9/F_4 D
INT_HDMI_TXN2 C54 C45

[32] INT_HDMI_TXN2 DDI1_TXN0 EDP_TXN0 EDP_TXN0 [31]
INT_HDMI_TXP2 C55 B46
[32] INT_HDMI_TXP2 DDI1_TXP0 EDP_TXP0 EDP_TXP0 [31] +3.3V_RUN
INT_HDMI_TXN1 B58 A47
[32] INT_HDMI_TXN1 DDI1_TXN1 EDP_TXN1 EDP_TXN1 [31]
INT_HDMI_TXP1 C58 B47
[32] INT_HDMI_TXP1 DDI1_TXP1 EDP_TXP1 EDP_TXP1 [31]
INT_HDMI_TXN0 B55
[32] INT_HDMI_TXN0 DDI1_TXN2
INT_HDMI_TXP0 A55 C47 RP1 2.2KX2
[32] INT_HDMI_TXP0 DDI1_TXP2 EDP_TXN2 EDP_TXN2 [31]
INT_HDMI_TXCN A57 C46 HDMI_SCL 1 2
[32] INT_HDMI_TXCN DDI1_TXN3 EDP_TXP2 EDP_TXP2 [31]
INT_HDMI_TXCP B57 A49 HDMI_SDA 3 4
[32] INT_HDMI_TXCP DDI1_TXP3 DDI EDP EDP_TXN3 EDP_TXN3 [31]
B49
EDP_TXP3 EDP_TXP3 [31]
C51 PIRQ_GPIO77 RP3 2 1 10KX2
C50 DDI2_TXN0 A45 EDP_AUXN PIRQ_GPIO78 4 3
C53 DDI2_TXP0 EDP_AUXN B45 EDP_AUXP EDP_AUXN [31] PIRQ_GPIO79 RP2 2 1 10KX2
B54 DDI2_TXN1 EDP_AUXP EDP_AUXP [31] PIRQ_GPIO80 4 3
C49 DDI2_TXP1 D20 EDP_COMP
B50 DDI2_TXN2 EDP_RCOMP A43 DP_UTIL DGPU_PW R_EN R269 10K_4
A53 DDI2_TXP2 EDP_DISP_UTIL TP46
B53 DDI2_TXN3
DDI2_TXP3
1 OF 19
GPIO51 R61 10K_4
KB_DET# R102 10K_4
GPIO53 R58 10K_4
U17I HSW_ULT_DDR3L
GPIO55 R13 10K_4
C C
LCD_PW M B8 B9 HDMI_SCL
[31] LCD_PW M EDP_BKLCTL DDPB_CTRLCLK HDMI_SCL [32]
A9 C9 HDMI_SDA
[31,40] eDP_BL_EN EDP_BKLEN DDPB_CTRLDATA HDMI_SDA [32]
C6 eDP SIDEBAND D9
[31] DP_ENVDD EDP_VDDEN DDPC_CTRLCLK D11
DDPC_CTRLDATA
PIRQ_GPIO77 U6 +3V
R450 2 1 0_4 PIRQ_GPIO78 P4 PIRQA/GPIO77 C5
[38] FFS_INT1 PIRQB/GPIO78 +3V DDPB_AUXN
R451 2 1 *0_4_NC PIRQ_GPIO79 N4 +3V B6
PIRQ_GPIO80 N2 PIRQC/GPIO79 DISPLAY DDPC_AUXN B5
PIRQD/GPIO80 +3V DDPB_AUXP
TP16 PCI_PME_N AD4 A6
PME PCIE DDPC_AUXP
GPIO55 U7 +3V
KB_DET# L1 GPIO55
[42] KB_DET# GPIO52 +3V
DGPU_PW R_EN L3 +3V +3V C8
[56] DGPU_PW R_EN GPIO54 DDPB_HPD INT_HDMI_HP [32]
GPIO51 R5 +3V +3V A8
GPIO53 L4 GPIO51 DDPC_HPD D6 EDP_HPD_R R236 0_4
GPIO53 +3V +3V EDP_HPD EDP_HPD [31]
1
R239 R62
1M_4
100K_4
9 OF 19
2
B B
PCH Strap Table

Pin Name Strap description Sampled Configuration note
0 = Port B is not detected. This signal has a weak internal pull-down. IPD 20K is disabled when PLTRST# is de-asserted.
DDPB_CTRLDATA Port B Detected PCH_PWROK
PU 2.2K to +3.3V_RUN
1 = Port B is detected.
0 = Port C is not detected. This signal has a weak internal pull-down. IPD 20K is disabled when PLTRST# is de-asserted.
DDPC_CTRLDATA Port C Detected PCH_PWROK
NC
1 = Port C is detected.
A A

PROJECT : AM6
A
Haswell ULT 1/12
5 4 3 2 1
5 4 3 2 1
f ix
vina[19] M_A_DQ[63..0]
Haswell ULT (DDR3L)
[20] M_B_DQ[63..0]
U17C HSW_ULT_DDR3L U17D HSW_ULT_DDR3L
M_A_DQ0 AH63 AU37 M_A_CLKN0

SA_DQ0 SA_CLK#0 M_A_CLKN0 [19]
D M_A_DQ1 AH62 AV37 M_A_CLKP0 M_B_DQ0 AY31 AM38 M_B_CLKN0 D
SA_DQ1 SA_CLK0 M_A_CLKP0 [19] SB_DQ0 SB_CK#0 M_B_CLKN0 [20]
M_A_DQ2 AK63 AW36 M_A_CLKN1 M_B_DQ1 AW31 AN38 M_B_CLKP0
SA_DQ2 SA_CLK#1 M_A_CLKN1 [19] SB_DQ1 SB_CK0 M_B_CLKP0 [20]
M_A_DQ3 AK62 AY36 M_A_CLKP1 M_B_DQ2 AY29 AK38 M_B_CLKN1
SA_DQ3 SA_CLK1 M_A_CLKP1 [19] SB_DQ2 SB_CK#1 M_B_CLKN1 [20]
M_A_DQ4 AH61 M_B_DQ3 AW29 AL38 M_B_CLKP1
SA_DQ4 SB_DQ3 SB_CK1 M_B_CLKP1 [20]
M_A_DQ5 AH60 AU43 M_A_CKE0 M_B_DQ4 AV31
SA_DQ5 SA_CKE0 M_A_CKE0 [19] SB_DQ4
M_A_DQ6 AK61 AW43M_A_CKE1 M_B_DQ5 AU31 AY49 M_B_CKE0
SA_DQ6 SA_CKE1 M_A_CKE1 [19] SB_DQ5 SB_CKE0 M_B_CKE0 [20]
M_A_DQ7 AK60 AY42 M_B_DQ6 AV29 AU50 M_B_CKE1
SA_DQ7 SA_CKE2 SB_DQ6 SB_CKE1 M_B_CKE1 [20]
M_A_DQ8 AM63 AY43 M_B_DQ7 AU29 AW49
M_A_DQ9 AM62 SA_DQ8 SA_CKE3 M_B_DQ8 AY27 SB_DQ7 SB_CKE2 AV50
M_A_DQ10 AP63 SA_DQ9 AP33 M_A_CS#0 M_B_DQ9 AW27 SB_DQ8 SB_CKE3
SA_DQ10 SA_CS#0 M_A_CS#0 [19] SB_DQ9
M_A_DQ11 AP62 AR32 M_A_CS#1 M_B_DQ10 AY25 AM32 M_B_CS#0
SA_DQ11 SA_CS#1 M_A_CS#1 [19] SB_DQ10 SB_CS#0 M_B_CS#0 [20]
M_A_DQ12 AM61 M_B_DQ11AW25 AK32 M_B_CS#1
SA_DQ12 SB_DQ11 SB_CS#1 M_B_CS#1 [20]
M_A_DQ13 AM60 AP32 M_B_DQ12 AV27
M_A_DQ14 AP61 SA_DQ13 SA_ODT0 M_B_DQ13 AU27 SB_DQ12 AL32
M_A_DQ15 AP60 SA_DQ14 AY34 M_A_RAS# M_B_DQ14 AV25 SB_DQ13 SB_ODT0
SA_DQ15 SA_RAS M_A_RAS# [19] SB_DQ14
M_A_DQ16 AP58 AW34M_A_W E# M_B_DQ15 AU25 AM35 M_B_RAS#
SA_DQ16 SA_WE M_A_W E# [19] SB_DQ15 SB_RAS M_B_RAS# [20]
M_A_DQ17 AR58 AU34 M_A_CAS# M_B_DQ16 AM29 AK35 M_B_W E#
SA_DQ17 SA_CAS M_A_CAS# [19] SB_DQ16 SB_WE M_B_W E# [20]
M_A_DQ18 AM57 M_B_DQ17 AK29 AM33 M_B_CAS#
SA_DQ18 M_A_BS[2..0] [19] SB_DQ17 SB_CAS M_B_CAS# [20]
M_A_DQ19 AK57 AU35 M_A_BS0 M_B_DQ18 AL28
SA_DQ19 SA_BA0 SB_DQ18 M_B_BS[2..0] [20]
M_A_DQ20 AL58 AV35 M_A_BS1 M_B_DQ19 AK28 AL35 M_B_BS0
M_A_DQ21 AK58 SA_DQ20 SA_BA1 AY41 M_A_BS2 M_B_DQ20 AR29 SB_DQ19 SB_BA0 AM36 M_B_BS1
SA_DQ21 SA_BA2 M_A_A[15..0] [19] SB_DQ20 SB_BA1
M_A_DQ22 AR57 M_B_DQ21 AN29 AU49 M_B_BS2
SA_DQ22 SB_DQ21 SB_BA2 M_B_A[15..0] [20]
M_A_DQ23 AN57 AU36 M_A_A0 M_B_DQ22 AR28
M_A_DQ24 AP55 SA_DQ23 SA_MA0 AY37 M_A_A1 M_B_DQ23 AP28 SB_DQ22 AP40 M_B_A0
M_A_DQ25 AR55 SA_DQ24 SA_MA1 AR38 M_A_A2 M_B_DQ24 AN26 SB_DQ23 SB_MA0 AR40 M_B_A1
M_A_DQ26 AM54 SA_DQ25 SA_MA2 AP36 M_A_A3 M_B_DQ25 AR26 SB_DQ24 SB_MA1 AP42 M_B_A2
M_A_DQ27 AK54 SA_DQ26 SA_MA3 AU39 M_A_A4 M_B_DQ26 AR25 SB_DQ25 SB_MA2 AR42 M_B_A3
M_A_DQ28 AL55 SA_DQ27 SA_MA4 AR36 M_A_A5 M_B_DQ27 AP25 SB_DQ26 SB_MA3 AR45 M_B_A4
M_A_DQ29 AK55 SA_DQ28 SA_MA5 AV40 M_A_A6 M_B_DQ28 AK26 SB_DQ27 SB_MA4 AP45 M_B_A5
C M_A_DQ30 AR54 SA_DQ29 SA_MA6 AW39M_A_A7 M_B_DQ29 AM26 SB_DQ28 SB_MA5 AW46M_B_A6 C
M_A_DQ31 AN54 SA_DQ30 DDR CHANNEL A SA_MA7 AY39 M_A_A8 M_B_DQ30 AK25 SB_DQ29 SB_MA6 AY46 M_B_A7
M_A_DQ32 AY58 SA_DQ31 SA_MA8 AU40 M_A_A9 M_B_DQ31 AL25 SB_DQ30 SB_MA7 AY47 M_B_A8
M_A_DQ33AW58 SA_DQ32 SA_MA9 AP35 M_A_A10 M_B_DQ32 AY23 SB_DQ31 DDR CHANNEL B SB_MA8 AU46 M_B_A9
M_A_DQ34 AY56 SA_DQ33 SA_MA10 AW41M_A_A11 M_B_DQ33AW23 SB_DQ32 SB_MA9 AK36 M_B_A10
M_A_DQ35AW56 SA_DQ34 SA_MA11 AU41 M_A_A12 M_B_DQ34 AY21 SB_DQ33 SB_MA10 AV47 M_B_A11
M_A_DQ36 AV58 SA_DQ35 SA_MA12 AR35 M_A_A13 M_B_DQ35AW21 SB_DQ34 SB_MA11 AU47 M_B_A12
M_A_DQ37 AU58 SA_DQ36 SA_MA13 AV42 M_A_A14 M_B_DQ36 AV23 SB_DQ35 SB_MA12 AK33 M_B_A13
M_A_DQ38 AV56 SA_DQ37 SA_MA14 AU42 M_A_A15 M_B_DQ37 AU23 SB_DQ36 SB_MA13 AR46 M_B_A14
M_A_DQ39 AU56 SA_DQ38 SA_MA15 M_A_DQSN[7..0] [19] M_B_DQ38 AV21 SB_DQ37 SB_MA14 AP46 M_B_A15
M_A_DQ40 AY54 SA_DQ39 AJ61 M_A_DQSN0 M_B_DQ39 AU21 SB_DQ38 SB_MA15 M_B_DQSN[7..0] [20]
M_A_DQ41AW54 SA_DQ40 SA_DQSN0 AN62 M_A_DQSN1 M_B_DQ40 AY19 SB_DQ39 AW30M_B_DQSN0
M_A_DQ42 AY52 SA_DQ41 SA_DQSN1 AM58 M_A_DQSN2 M_B_DQ41AW19 SB_DQ40 SB_DQSN0 AV26 M_B_DQSN1
M_A_DQ43AW52 SA_DQ42 SA_DQSN2 AM55 M_A_DQSN3 M_B_DQ42 AY17 SB_DQ41 SB_DQSN1 AN28 M_B_DQSN2
M_A_DQ44 AV54 SA_DQ43 SA_DQSN3 AV57 M_A_DQSN4 M_B_DQ43AW17 SB_DQ42 SB_DQSN2 AN25 M_B_DQSN3
M_A_DQ45 AU54 SA_DQ44 SA_DQSN4 AV53 M_A_DQSN5 M_B_DQ44 AV19 SB_DQ43 SB_DQSN3 AW22M_B_DQSN4
M_A_DQ46 AV52 SA_DQ45 SA_DQSN5 AL43 M_A_DQSN6 M_B_DQ45 AU19 SB_DQ44 SB_DQSN4 AV18 M_B_DQSN5
M_A_DQ47 AU52 SA_DQ46 SA_DQSN6 AL48 M_A_DQSN7 M_B_DQ46 AV17 SB_DQ45 SB_DQSN5 AN21 M_B_DQSN6
M_A_DQ48 AK40 SA_DQ47 SA_DQSN7 M_A_DQSP[7..0] [19] M_B_DQ47 AU17 SB_DQ46 SB_DQSN6 AN18 M_B_DQSN7
M_A_DQ49 AK42 SA_DQ48 AJ62 M_A_DQSP0 M_B_DQ48 AR21 SB_DQ47 SB_DQSN7 M_B_DQSP[7..0] [20]
M_A_DQ50 AM43 SA_DQ49 SA_DQSP0 AN61 M_A_DQSP1 M_B_DQ49 AR22 SB_DQ48 AV30 M_B_DQSP0
M_A_DQ51 AM45 SA_DQ50 SA_DQSP1 AN58 M_A_DQSP2 M_B_DQ50 AL21 SB_DQ49 SB_DQSP0 AW26M_B_DQSP1
M_A_DQ52 AK45 SA_DQ51 SA_DQSP2 AN55 M_A_DQSP3 M_B_DQ51 AM22 SB_DQ50 SB_DQSP1 AM28 M_B_DQSP2
M_A_DQ53 AK43 SA_DQ52 SA_DQSP3 AW57M_A_DQSP4 M_B_DQ52 AN22 SB_DQ51 SB_DQSP2 AM25 M_B_DQSP3
M_A_DQ54 AM40 SA_DQ53 SA_DQSP4 AW53M_A_DQSP5 M_B_DQ53 AP21 SB_DQ52 SB_DQSP3 AV22 M_B_DQSP4
M_A_DQ55 AM42 SA_DQ54 SA_DQSP5 AL42 M_A_DQSP6 M_B_DQ54 AK21 SB_DQ53 SB_DQSP4 AW18M_B_DQSP5
M_A_DQ56 AM46 SA_DQ55 SA_DQSP6 AL49 M_A_DQSP7 M_B_DQ55 AK22 SB_DQ54 SB_DQSP5 AM21 M_B_DQSP6
M_A_DQ57 AK46 SA_DQ56 SA_DQSP7 M_B_DQ56 AN20 SB_DQ55 SB_DQSP6 AM18 M_B_DQSP7
M_A_DQ58 AM49 SA_DQ57 AP49 M_B_DQ57 AR20 SB_DQ56 SB_DQSP7
B M_A_DQ59 AK49 SA_DQ58 SM_VREF_CA AR51 M_B_DQ58 AK18 SB_DQ57 B
M_A_DQ60 AM48 SA_DQ59 SM_VREF_DQ0 AP51 M_B_DQ59 AL18 SB_DQ58
M_A_DQ61 AK48 SA_DQ60 SM_VREF_DQ1 M_B_DQ60 AK20 SB_DQ59
M_A_DQ62 AM51 SA_DQ61 M_B_DQ61 AM20 SB_DQ60
M_A_DQ63 AK51 SA_DQ62 M_B_DQ62 AR18 SB_DQ61
SA_DQ63 M_B_DQ63 AP18 SB_DQ62
SB_DQ63
3 OF 19 4 OF 19
SM_VREF_CA
SM_VREF_CA [20]
SM_VREF_DQ0
SM_VREF_DQ0 [19]
SM_VREF_DQ1
SM_VREF_DQ1 [20]
A A

PROJECT : AM6
A
Haswell ULT 2/12
5 4 3 2 1
5 4 3 2 1
fix
ina
GPIO Pull-up/Pull-down(CLG)
v +3.3V_RUN
DGPU_RST# R280 10K_4

Hasswell ULT(GPIO,LPIO,MISC) GPU_EVENT#
DEVSLP1
R295
R270
10K_4
10K_4
GPIO39 R254 10K_4
SIO_RCIN# R87 10K_4
D D
AUDIO_PW R_EN R275 10K_4
FFS_INT2 R292 10K_4
+V1.05S_VCCST GSPI_CS R259 10K_4
IRQ_SERIRQ R264 10K_4
U17J HSW_ULT_DDR3L
R256 GPIO91 RP14 2 1 10KX2
1K_4 GPIO92 4 3
GPIO93 4 3
GPIO94 2 1
AUDIO_PW R_EN P1 D60 PCH_THRMTRIP# RP13 10KX2
GPIO8 AU2 BMBUSY/GPIO76 +3V THRMTRIP V4 SIO_RCIN# GPIO85 R255 10K_4
GPIO8 +3V_S5 +3V RCIN/GPIO82 SIO_RCIN# [40]
AM7 DSW T4 IRQ_SERIRQ
GPIO15 AD6 LAN_PHY_PWR_CTRL/GPIO12 CPU/ SERIRQ AW15 PCH_OPIRCOMP IRQ_SERIRQ [40] GPIO84 R14 10K_4
KB_LED_DET Y1 GPIO15 +3V_S5 MISC PCH_OPI_RCOMP AF20 TOUCH_PANEL_INTR# R260 10K_4
[42] KB_LED_DET
DGPU_PW ROK T3 GPIO16 +3V RSVD AB21 TOUCHPANEL_EN R258 10K_4
[56] DGPU_PW ROK
PCIE_SLOT3_W AKE_N AD5 GPIO17 +3V RSVD
EC_W AKE# AN5 GPIO24 +3V_S5
GPIO28 AD7 GPIO27 DSW GPIO4 2 1
NFC_IRQ_R AN3 GPIO28 +3V_S5 GPIO5 4 3
GPIO26 +3V_S5 R6 GSPI_CS RP16 10KX2
+3V GSPI0_CS/GPIO83
LPT_CR_RST# AG6 L6 GPIO84 I2C1_SDA RP114 3 2.2KX2
USB3.0_RD_EN AP1 GPIO56 +3V_S5 +3V GSPI0_CLK/GPIO84 N6 GPIO85 I2C1_SCL 2 1
SLATE_MODE_HALL_IN AL4 GPIO57 +3V_S5 +3V GSPI0_MISO/GPIO85 L8 BBS
GPIO59 AT5 GPIO58 +3V_S5 +3V GSPI0_MOSI/GPIO86 R7 GPIO87 URAT1_RTS 2 1
SNSR_HUB_RST_ACCEL_DRDY_N AK4 GPIO59 +3V_S5 GPIO
+3V GSPI1_CS/GPIO87 L5 DCR_EN URAT1_CTS 4 3
GPIO47 AB6 GPIO44 +3V_S5 +3V GSPI1_CLK/GPIO88 N7 TOUCHPANEL_EN
DCR_EN [31] RP9 10KX2
FFS_INT2 U4 GPIO47 +3V_S5 +3V GSPI1_MISO/GPIO89 K2 TOUCH_PANEL_INTR# URAT1_RX 2 1
C
[38] FFS_INT2
GPU_EVENT# Y3 GPIO48 +3V +3V GSPI_MOSI/GPIO90 J1 GPIO91 URAT1_TX 4 3 C
DGPU_RST# P3 GPIO49 +3V +3V UART0_RXD/GPIO91 K3 GPIO92 RP10 10KX2
[21] DGPU_RST#
MODPHY_EN Y2 GPIO50 +3V +3V UART0_TXD/GPIO92 J2 GPIO93 SDIO_CLK RP0 4 3 10KX2
[17] MODPHY_EN
GPIO13 AT3 HSIOPC/GPIO71 +3V +3V
SERIAL IO UART0_RTS/GPIO93 G1 GPIO94 SDIO_CMD 2 1
SENSOR_HUB_INT AH4 GPIO13 +3V_S5 +3V UART0_CTS/GPIO94 K4 URAT1_RX
USB2_CAM1_PW R_EN AM4 GPIO14 +3V_S5 +3V UART1_RXD/GPIO0 G2 URAT1_TX SDIO_D1 RP15 4 3 10KX2
LPT_LAN_RST# AG5 GPIO25 DSW +3V UART1_TXD/GPIO1 J3 URAT1_RTS SDIO_D2 2 1
SNR_HUB_EN AG3 GPIO45 +3V_S5 +3V UART1_RST/GPIO2 J4 URAT1_CTS
GPIO46 +3V_S5 +3V UART1_CTS/GPIO3 F2 GPIO4 SDIO_D3 R237 10K_4
+3V I2C0_SDA/GPIO4
[42] PCH_TP_INTR# PCH_TP_INTR# AM3 +3V_S5 +3V F3 GPIO5 DCR_EN R15 10K_4
SIO_EXT_SCI# AM2 GPIO9 I2C0_SCL/GPIO5 G4 I2C1_SDA
GPIO33
[40] SIO_EXT_SCI#
P2 GPIO10 +3V_S5 +3V I2C1_SDA/GPIO6 F1 I2C1_SCL
SENSOR_STANDBY_N C4 DEVSLP0/GPIO33 +3V +3V I2C1_SCL/GPIO7 E3 SDIO_CLK DGPU_PW ROK R263 10K_4
SDIO_POWER_EN/GPIO70 +3V +3V SDIO_CLK/GPIO64
DEVSLP1 L2 F4 SDIO_CMD GPIO33 R276 10K_4
[38] DEVSLP1
GPIO39 N5 DEVSLP1/GPIO38 +3V +3V SDIO_CMD/GPIO65 D3 SDIO_D0 SENSOR_STANDBY_N R245 10K_4
ACZ_SPKR V2 DEVSLP2/GPIO39 +3V +3V SDIO_D0/GPIO66 E4 SDIO_D1
[34] ACZ_SPKR SPKR/GPIO81 +3V +3V SDIO_D1/GPIO67
+3V C3 SDIO_D2
SDIO_D2/GPIO68 E2 SDIO_D3
+3V SDIO_D3/GPIO69
10 OF 19
+3.3V_SUS
EC_W AKE# R149 10K_4

USB2_CAM1_PW R_EN R122 10K_4
PCH Strap Table

Deep Sleep will be turn off
B +3.3V_SUS B
Pin Name Strap description Sampled Configuration note GPIO8 R333 10K_4
0 = Disable This signal has a weak internal pull-down. PCIE_SLOT3_W AKE_N R104 10K_4
GPIO15 TLS Confidentiality RSMRST# Deep Sleep will be turn off GPIO28 R90 10K_4
+3.3V_SUS R103 *10K_4_NC GPIO15 NFC_IRQ_R R123 10K_4
1 = Enable SENSOR_HUB_INT R310 10K_4
0 = Disable This signal has a weak internal pull-down. LPT_CR_RST# R110 10K_4
SPKR/GPIO81 No Reboot mode PCH_PWROK USB3.0_RD_EN R330 10K_4
SLATE_MODE_HALL_IN R324 10K_4
1 = Enable NA SNSR_HUB_RST_ACCEL_DRDY_N
R116 10K_4
0 = SPI This signal has a weak internal pull-down. LPT_LAN_RST# R117 10K_4
GSPI0_MOSI/GPIO86 Boot BIOS Strap Bit (BBS) PCH_PWROK SNR_HUB_EN R302 10K_4
+3.3V_RUN R265 *1K_4_NC BBS PCH_TP_INTR# R325 10K_4
1 = LPC
0 = Disable This signal has a weak internal pull-down. GPIO47 R95 10K_4
SDIO_D0/GPIO66 Top Swap Override PCH_PWROK GPIO13 R150 10K_4
+V3.3S_1.8S_LPSS_SDIO R21 *1K_4_NCSDIO_D0 SIO_EXT_SCI# R326 10K_4
1 = Enable
+3.3V_RUN +3.3V_TP
PCH_OPIRCOMP R359 49.9/F_4
GPIO59 R164 2 1 100K_4
GPIO87 R64 2 1 100K_4
2
4
RP25
2.2KX2
A A
5
Q29A
2N7002KDW
1
3
I2C1_SCL 4 3
I2C1_PCH_CLK [42]

2
Q29B
2N7002KDW
I2C1_SDA 1 6 PROJECT : AM6
I2C1_PCH_DAT [42] Size Document Number Rev
A
Haswell ULT 3/12
5 4 3 2 1
5 4 3 2 1
fix
vina
D Haswell ULT (PCIE,USB) D
U17K HSW_ULT_DDR3L
F10 AN8
[21] PEG_RXN0 PERN5_L0 USB2N0 USBP0- [36]
E10 DSW AM8 USB3.0 Port (Power Share)
[21] PEG_RXP0 PERP5_L0 USB2P0 USBP0+ [36]
C453 1 2 0.1U/16V_4 PEG_TXN0_C C23 AR7
[21] PEG_TXN0 PETN5_L0 USB2N1 USBP1- [36]
C454 1 2 0.1U/16V_4 PEG_TXP0_C C22 DSW AT7 USB3.0 Port (Right)
[21] PEG_TXP0 PETP5_L0 USB2P1 USBP1+ [36]
F8 AR8
E8 DSW AP8 USB2.0 Port
C451 1 2 0.1U/16V_4 PEG_TXN1_C B23 AR10
GPU C452 1 2 0.1U/16V_4 PEG_TXP1_C A23 DSW AT10 Card Reader
H10 AM15
G10 DSW AL15 Camara
C457 1 2 0.1U/16V_4 PEG_TXN2_C B21 AM13
C458 1 2 0.1U/16V_4 PEG_TXP2_C C21 DSW AN13 eDP Touch Panel
E6 AP11
F6 DSW AN11 Bluetooth
C C455 1 2 0.1U/16V_4 PEG_TXN3_C B22 AR13 C
[21] PEG_TXN3 PETN5_L3 USB2N7
C456 1 2 0.1U/16V_4 PEG_TXP3_C A21 DSW AP13
[21] PEG_TXP3 PETP5_L3 USB2P7
G11
F11 PERN3 G20
PERP3 USB3RN1 USB3.0_RX1- [36]
H20
USB3RP1 USB3.0_RX1+ [36]
C29 USB3.0 Port (Left Power Share)
B30 PETN3 PCIE USB C33
PETP3 USB3TN1 USB3.0_TX1- [36]
B34
USB3TP1 USB3.0_TX1+ [36]
F13
[39] PCIE_RXN4 PERN4
G13 E18
[39] PCIE_RXP4 PERP4 USB3RN2 USB3.0_RX2- [36]
WIFI F18
USB3RP2 USB3.0_RX2+ [36]
C462 0.1U/16V_4 PCIE_TXN4_C B29 USB3.0 Port (Right)
[39] PCIE_TXN4 PETN4
C459 0.1U/16V_4 PCIE_TXP4_C A29 B33
[39] PCIE_TXP4 PETP4 USB3TN2 USB3.0_TX2- [36]
A33
USB3TP2 USB3.0_TX2+ [36]
G17
F17 PERN1/USB3RN3
PERP1/USB3RP3
C30
C31 PETN1/USB3TN3 AJ10 USB_BIAS R121 22.6/F_4
PETP1/USB3TP3 USBRBIAS AJ11
F15 USBRBIAS AN10
G15 PERN2/USB3RN4 RSVD AM10
PERP2/USB3RP4 RSVD
B31
A31 PETN2/USB3TN4
PETP2/USB3TP4 AL3 USB_OC0#
+3V_S5 OC0/GPIO40 USB_OC0# [36]
+3V_S5 AT1 USB_OC1# USB_OC1# [36,37]
+V1.05S_AUSB3PLL OC1/GPIO41 AH2 USB_OC2#
B
+3V_S5 OC2/GPIO42 B
E15 +3V_S5 AV3 USB_OC3#
E13 RSVD OC3/GPIO43
R39 1 2 3K/F_4 PCIE_RCOMP A27 RSVD
R43 1 2 *0_4_SHORT_NC PCIE_IREF B27 PCIE_RCOMP
PCIE_IREF
11 OF 19 Deep Sleep will be turn off +3.3V_SUS
USB_OC0# R312 1 2 10K_4

USB_OC1# R329 1 2 10K_4
USB_OC2# R303 1 2 10K_4
USB_OC3# R163 1 2 10K_4
Overcurrent Pin Setting
Pin Default Port Mapping AM6 setting
OC0# Port 0, Port 1 Port 0
A OC1# Port 2, Port 3 Port 1, Port 2 A
OC2# Port 4, Port 5 no use

OC3# Port 6, Port 7 no use
PROJECT : AM6
A
Haswell ULT 4/12
5 4 3 2 1
5 4 3 2 1
f ix
vina C539 15P/50V_4 RTC_X1 RTC_RST#
1
Y2
3
32.768KHZ R351
10M_4 2 Q40
[40] EC_RTC_RST
2N7002W
2
C536 15P/50V_4 RTC_X2
1
1
D
R460
100K_4
Haswell ULT (RTC, HDA, JTAG, SATA) D
2
+RTC_CELL
RTC RESET U17E HSW_ULT_DDR3L
R159 20K/F_4 RTC_RST#
R158 20K/F_4 SRTC_RST# RTC_X1 AW5

RTC_X2 AY5 RTCX1
R373 1M_4 SM_INTRUDER# AU6 RTCX2 J5
+RTC_CELL INTRUDER SATA_RN0/PERN6_L3
C275 C274 PCH_INTVRMEN AV7 H5
SRTC_RST# AV6 INTVRMEN RTC
SATA_RP0/PERP6_L3 B15
1U/6.3V_4 1U/6.3V_4 C542 2 1 *10P/50V_4_NC RTC_RST# AU7 SRTCRST SATA_TN0/PETN6_L3 A15
RTCRST SATA_TP0/PETP6_L3
R360 33_4 J8 SATA_RXN1 SATA_RXN1 [38]
[34] HDA_BITCLK SATA_RN1/PERN6_L2 H8 SATA_RXP1 SATA_RXP1 [38] HDD
SATA_RP1/PERP6_L2 A17 SATA_TXN1
SATA_TN1/PETN6_L2 SATA_TXN1 [38]
B17 SATA_TXP1
SATA_TP1/PETP6_L2 SATA_TXP1 [38]
HDA_BITCLK_R AW8 J6
HDA_SYNC_R AV11 HDA_BCLK/I2S0_SCLK SATA_RN2/PERN6_L1 H6
HDA_RST#_R AU8 HDA_SYNC/I2S0_SFRM SATA_RP2/PERP6_L1 B14
HDA_SDIN0 AY10 HDA_RST/I2S_MCLK AUDIO SATA SATA_TN2/PETN6_L1 C15
[34] HDA_SDIN0 HDA_SDI0/I2S0_RXD SATA_TP2/PETP6_L1
R368 1K_4 AU12
[40] PCH_MELOCK HDA_SDI1/I2S1_RXD
R369 33_4 HDA_SDOUT_R AU11 F5
[34] HDA_SDOUT HDA_SDO/I2S0_TXD SATA_RN3/PERN6_L0
AW10 E5 R291 1 2 10K_4 +3.3V_RUN
C AV10 HDA_DOCK_EN/I2S1_TXD SATA_RP3/PERP6_L0 C17 C
AY8 HDA_DOCK_RST/I2S1_SFRM SATA_TN3/PETN6_L0 D17
I2S1_SCLK SATA_TP3/PETP6_L0 SMC_EXTSMI_N SMC_EXTSMI_N [40]
R370 33_4 HDA_SYNC_R
[34] HDA_SYNC
+3V V1
R371 33_4 HDA_RST#_R SATA0GP/GPIO34 U1 GPIO35 R289 1 2 10K_4
[34] HDA_RST# +3V SATA1GP/GPIO35
+3V V6 GPIO36 R83 1 2 10K_4
SATA2GP/GPIO36 AC1 GPIO37 R296 1 2 10K_4
+3V SATA3GP/GPIO37
XDP_TRST_CPU_N AU62
[18] XDP_TRST_CPU_N PCH_TRST
XDP_TCK1 AE62 A12 SATA_IREF R44 *0_4_SHORT_NC
+V1.05S_ASATA3PLL
XDP_TDI AD61 PCH_TCK SATA_IREF L11
PCH_JTAG_TDO AE61 PCH_TDI RSVD K10
XDP_TMS AD62 PCH_TDO JTAG
RSVD C12 SATA_RCOMP R40 1 2 3K/F_4
RSVD_PGDMON AL11 PCH_TMS SATA_RCOMP U3 PCH_SATA_LED#
RSVD SATALED PCH_SATA_LED# [46]
TP13 PM_TEST_RST_N AC4
R305 0_4 PCH_JTAGX AE63 RSVD
PCH JTAG Debug (CLG) [18] XDP_TCK0
AV2 JTAGX
RSVD
MP remove(Intel)
+1.05V_SUS
5 OF 19
XDP_TMS R298 51_4
XDP_TDI R299 51_4
PCH_JTAG_TDO R109 51_4
PCH_JTAGX R306 *1K_4_NC
XDP_TCK1 R309 *51_4_NC

B B
RSVD_PGDMON R146 *1K_4_NC

DFXTESTMODE
HIGH - DFXTESTMODE DISABLED(DEFAULT)
LOW - DFXTESTMODE ENABLED
PCH Strap Table

HDA_SDO Flash Descriptor Security PCH_PWROK 0 = Security Effect (Int PD) This signal has a weak internal pull-down. The internal pull-down is disabled after PLTRST# deasserts.
Override / Intel ME Debug Mode 1 = Can be Override
INTVRMEN Integrated 1.05V VRM enable ALWAYS 0 = Integrated VRMs disabled. +RTC_CELL R157 *330K_4_NC PCH_INTVRMEN R147 330K_4
1 = Integrated VRMs enabled. An external resistor is required
A A

PROJECT : AM6
A
Haswell ULT 5/12
5 4 3 2 1
5 4 3 2 1
fix
vina Haswell ULT (CLK)
C449 12P/50V_4
U17F
3
4
HSW_ULT_DDR3L
Y0 +3.3V_RUN
R235 24MHz
1M_4
D RN0 10KX4 D
1
2
C43 A25 XTAL24_IN PCIE_CLK_REQ0# 1 2
C42 CLKOUT_PCIE_N0 XTAL24_IN B25 XTAL24_OUT C448 12P/50V_4 PCIE_CLK_REQ1# 3 4
PCIE_CLK_REQ0# U2 CLKOUT_PCIE_P0 XTAL24_OUT PCIE_CLK_REQ2# 5 6
PCIECLKRQ0/GPIO18 +3V
K21 PCIE_CLK_REQ3# 7 8
B41 RSVD M21
A41 CLKOUT_PCIE_N1 RSVD C26 DIFFCLK_BIASREF R42 1 2 3K/F_4
CLKOUT_PCIE_P1 DIFFCLK_BIASREF +V1.05S_AXCK_LCPLL
PCIE_CLK_REQ1# Y5 +3V PCIE_CLK_REQ5# R286 10K_4
PCIECLKRQ1/GPIO19 C35 TESTLOW _0 RP17 3 4 10KX2
C41 CLOCK TESTLOW_C35 C34 TESTLOW _1 1 2
B42 CLKOUT_PCIE_N2 TESTLOW_C34 AK8 TESTLOW _2 3 4
PCIE_CLK_REQ2# AD1 CLKOUT_PCIE_P2 SIGNALS TESTLOW_AK8 AL8 TESTLOW _3 1 2
PCIECLKRQ2/GPIO20 +3V TESTLOW_AL8 RP7 10KX2 Deep Sleep will be turn off
CLK_PCIE_W LANN B38 AN15 LPC_CLK_0 R144 1 2 22_4
[39] CLK_PCIE_W LANN CLKOUT_PCIE_N3 CLKOUT_LPC_0 LPC_CLK_EC [40]
CLK_PCIE_W LANP C37 AP15 LPC_CLK_1 R145 1 2 22_4
[39] CLK_PCIE_W LANP CLKOUT_PCIE_P3 CLKOUT_LPC_1 LPC_CLK_DEBUG [39]
PCIE_CLK_REQ3# N1 +3V
[39] PCIE_CLK_REQ3# PCIECLKRQ3/GPIO21 +3.3V_SUS
B35
CLK_PCIE_VGAN A39 CLKOUT_ITPXDP A35
[21] CLK_PCIE_VGAN CLKOUT_PCIE_N4 CLKOUT_ITPXDP_P
CLK_PCIE_VGAP B39 GPIO73 R378 10K_4
[21] CLK_PCIE_VGAP CLKOUT_PCIE_P4
R288 10K_4 PCIE_REQ_GPU# U5 +3V RP21 2.2KX2
R287 *10K_4_NC PCIECLKRQ4/GPIO22 SMB_CLK0 3 4
+3.3V_RUN
B37 EC11 *10P/50V_4_NC SMB_DAT0 1 2
A37 CLKOUT_PCIE_N5 2 1 LPC_CLK_EC
PCIE_CLK_REQ5# T2 CLKOUT_PCIE_P5 RP22 10KX2
PCIECLKRQ5/GPIO23 +3V
GPIO11 1 2
6 OF 19 GPIO60 3 4
RP19 2.2KX2
UMA Discrete SMBCLK 3 4
C SMBDATA 1 2 C
R288 *10K_4_NC 10K_4

Haswell ULT (LPC/SPI/SMB/CLINK) RP20 2.2KX2
R287 10K_4 *10K_4_NC SMB_DATA_ME1 1 2
SMB_CLK_ME1 3 4
U17G HSW_ULT_DDR3L
LPC_LAD0 AU14 +3V_S5 AN2 GPIO11

[39,40] LPC_LAD0 LAD0
[39,40] LPC_LAD1
LPC_LAD1 AW12
LAD1 +3V_S5 SMBALERT/GPIO11
SMBCLK
AP2 SMBCLK
LPC_LAD2 AY12 LPC +3V_S5 AH1 SMBDATA
[39,40] LPC_LAD2 LAD2 SMBDATA
LPC_LAD3 AW11 SMBUS
+3V_S5 SML0ALERT/GPIO60 AL2 GPIO60
[39,40] LPC_LAD3 LAD3
LPC_LFRAME# AV12 +3V_S5 AN1 SMB_CLK0
[39,40] LPC_LFRAME# LFRAME
+3V_S5
SML0CLK AK1 SMB_DAT0 SMBus/Pull-up(CLG)
EC5 *10P/50V_4_NC SML0DATA AU4 GPIO73
+3V_S5 SML1ALERT/PCHHOT/GPIO73
2 1 +3V_S5 AU3 SMB_CLK_ME1
SML1CLK/GPIO75 AH3 SMB_DATA_ME1 +3.3V_RUN
+3V_S5 SML1DATA/GPIO74
PCH_SPI_CLK AA3
[41] PCH_SPI_CLK SPI_CLK
PCH_SPI_CS0# Y7 AF2
[41] PCH_SPI_CS0# SPI_CS0 CL_CLK
Y4 AD2
SPI_CS1 CL_DATA
2
4
AC2 SPI C-LINK AF4
PCH_SPI_SI AA2 SPI_CS2 CL_RST RP23
[41] PCH_SPI_SI SPI_MOSI
PCH_SPI_SO AA4 2.2KX2
[41] PCH_SPI_SO SPI_MISO
PCH_SPI_IO2 Y6
[41] PCH_SPI_IO2 SPI_IO2
5
PCH_SPI_IO3 AF1 Q13A
[41] PCH_SPI_IO3 SPI_IO3 2N7002KDW
1
3
SMBCLK 3 4
SMB_PCH_CLK [19,20,38]
B 7 OF 19 B
2
Q13B
2N7002KDW
SMBDATA 6 1
SMB_PCH_DAT [19,20,38]
+3.3V_SUS
5
SMB_CLK_ME1 4 3
SMBCLK1 [40]
Q11A
*2N7002KDW _NC
2
Q11B
*2N7002KDW _NC
SMB_DATA_ME1 1 6
A SMBDAT1 [40] A

PROJECT : AM6
A
Haswell ULT 6/12
5 4 3 2 1
5 4 3 2 1
f ix
ina
PCH Pull-high/low(CLG)
Haswell ULT (SYSTEM POWER MANAGEMENT)
v
D D
+3.3V_SUS
PCIE_W AKE#_R R118 10K_4
AC_PRESENT R161 *10K_4_NC
PM_BATLOW # R130 10K_4

U17H HSW_ULT_DDR3L
SYSTEM POWER MANAGEMENT

SIO_PW RBTN# R160 *10K_4_NC
ME_SUS_PW R_ACK_R R311 0_4 SUSACK#_R AK2 AW7 DSW VRMEN
SYS_RESET# AC3 SUSACK DSWVRMEN AV5 DPW ROK_R R358 1 2 *0_4_SHORT_NC RSMRST#
SYS_PW ROK AG2 SYS_RESET DPWROK AJ5 PCIE_W AKE#_R
[40] SYS_PW ROK SYS_PWROK DSW WAKE
[40,44] EC_PW ROK EC_PW ROK AY7
HW PG AB5 PCH_PWROK
[14,40,47] HW PG APWROK
PLTRST# AG7 +3V CLKRUN/GPIO32 V5 CLKRUN#
PLTRST CLKRUN# [40]
+3V_S5SUS_STAT/GPIO61 AG4 TP3 TP17
+3V_S5 SUSCLK/GPIO62 AE6 TP8093 TP15 +3.3V_RUN
DSW SLP_S5/GPIO63 AP5 SIO_SLP_S5#
SIO_SLP_S5# [40,51]
RSMRST# AW6 DSW CLKRUN# R78 8.2K_4
[40] RSMRST# RSMRST
R162 1 2 *0_4_SHORT_NCME_SUS_PW R_ACK_R AV4 +3V_S5 SYS_RESET# R300 10K_4
[40] ME_SUS_PW R_ACK SUSWARN/SUSPWRDNACK/GPIO30
SIO_PW RBTN# AL7 DSW DSW SLP_S4 AJ6 SIO_SLP_S4#
[40] SIO_PW RBTN# PWRBTN SIO_SLP_S4# [40,51]
AC_PRESENT AJ8 AT4 SIO_SLP_S3#
[40] AC_PRESENT
PM_BATLOW # AN4 ACPRESENT/GPIO31 DSW DSW SLP_S3
AL5
SIO_SLP_S3# [40,51]
BATLOW/GPIO72 DSW DSW SLP_A
TP71 PCH_SLP_S0 AF3 DSW SLP_SUS AP4 TP4 TP33 RSMRST# R376 10K_4
TP24 PCH_SLP_W LAN# AM5 SLP_S0 AJ7
C SLP_WLAN/GPIO29 DSW DSW SLP_LAN
SYS_PW ROK R301 1 2 *47K_4_NC C
8 OF 19

+3.3V_SUS
R113 1 2 *0_4_SHORT_NC PLTRST#

[21,39,40] BUF_PLT_RST#
ME_SUS_PW R_ACK_R R156 10K_4
2
R114
100K_4
1
B B
PCH Strap Table

DSWVRMEN DeepSx Well On-Die Voltage ALWAYS 0 = Disable 1. This signal is always sampled. +RTC_CELL 330K_4 R372 DSW VRMEN
Regulator Enable 1 = Enable 2. This signal is in the RTC well.
A A

PROJECT : AM6
A
Haswell ULT 7/12
5 4 3 2 1
5 4 3 2 1
f ix
vina
Haswell ULT MCP(POWER)
Haswell ULT 15W : 32A
CPU VDDQ CPU VCC 28W : 40A
+VCCIN
+V_VDDQ Haswell ULT 15W & 28W: 1.4A
U17L HSW_ULT_DDR3L
D +V_VDDQ D
C284 10U/4V_6 L59 C36 C210 10U/4V_6
C283 10U/4V_6 J58 RSVD VCC C40 C199 10U/4V_6 24 X 10UF(0603 MLCC)
6X10UF MLCC C279 10U/4V_6 RSVD VCC C44 C181 10U/4V_6
VCC
4X2.2UF MLCC C278
C286
10U/4V_6
10U/4V_6
AH26
AJ31 VDDQ VCC
C48
C52
C182
C219
10U/4V_6
10U/4V_6
C280 10U/4V_6 AJ33 VDDQ VCC C56 C214 10U/4V_6
AJ37 VDDQ VCC E23 C168 10U/4V_6
AN33 VDDQ VCC E25 C201 10U/4V_6
AP43 VDDQ 1.4A 32A VCC E27 C169 10U/4V_6
C270 1U/6.3V_4 AR48 VDDQ VCC E29 C170 10U/4V_6
C273 1U/6.3V_4 AY35 VDDQ VCC E31 C185 10U/4V_6
C271 1 20.1U/16V_4 AY40 VDDQ VCC E33 C200 10U/4V_6
C272 1 20.1U/16V_4 AY44 VDDQ VCC E35 C166 10U/4V_6
AY50 VDDQ VCC E37 C167 10U/4V_6
+V1.05S_VCCST VDDQ VCC E39 C203 10U/4V_6
F59 VCC E41 C183 10U/4V_6
+VCCIN VCC VCC
N58 E43 C202 10U/4V_6
+VCCIOA_OUT AC58 RSVD VCC E45 C226 10U/4V_6
RSVD VCC E47 C186 10U/4V_6
R243 VCCSENSE E63 VCC E49 C209 10U/4V_6
AB23 VCC_SENSE VCC E51 C213 10U/4V_6
10K_4
TP43 +VCCIO_OUT A59 RSVD VCC E53 C204 10U/4V_6
E20 VCCIO_OUT VCC E55 C171 10U/4V_6
VCOMP_OUT(+VCCIOA_OUT) only be used to connect eDP_RCOMP. AD23 VCCIOA_OUT VCOMP_OUT VCC E57 C184 10U/4V_6
SDM10K45-7-F 1 2 D2 VCCST_PWRGD AA23 RSVD VCC F24
[13,40,47] HWPG RSVD VCC
AE59 F28
RSVD VCC F32
H_CPU_SVIDALRT# L62 VCC F36
VR_SVID_CLK N63 VIDALERT HSW ULT POWER VCC F40
VR_SVID_DATA L63 VIDSCLK VCC F44 C218 1 2 100P/50V_4
B59 VIDSOUT VCC F48
H_VR_ENABLE_MCP F60 VCCST_PWRGD VCC F52 C224 1 2 100P/50V_4
[54] H_VR_ENABLE_MCP VR_EN VCC
R242 1 2 10K_4 IMVP_PWRGD C59 F56
VR_READY VCC G23 C229 1 2 100P/50V_4
C
D63 VCC G25 C
[54] IMVP_PWRGD VSS VCC
FIVR_EN_BUF H59 G27 C162 1 2 100P/50V_4
P62 PWR_DEBUG VCC G29
VSS VCC
1
TP10 MCP_RSVD_69 P60 G31 R262 100/F_4 +VCCIN

C464 TP12 MCP_RSVD_70 P61 RSVD_TP VCC G33
N59 RSVD_TP VCC G35
0.1U/16V_4 TP58 MCP_RSVD_71
2
TP59 MCP_RSVD_72 N61 RSVD_TP VCC G37 VCCSENSE

RSVD_TP VCC VCCSENSE [54]
T59 G39
R6 *10K_4_NC IMVP_PWRGD AD60 RSVD VCC G41
+V1.05S_VCCST RSVD VCC
AD59 G43
AA59 RSVD VCC G45
AE60 RSVD VCC G47 FIVR_EN_BUF R77 150_6
RSVD VCC +V1.05S_VCCST
AC59 G49
AG58 RSVD VCC G51
U59 RSVD VCC G53
+V1.05S_VCCST V59 RSVD VCC G55
RSVD VCC G57
AC22 VCC H23
AE22 VCCST VCC J23
+VCCIN AE23 VCCST VCC K23
+V1.05S_VCCST AB57
VCCST
VCC
VCC
VCC
VCC
K57
L22
AD57 M23
AG57 VCC VCC M57
+1.05V_RUN +V1.05S_VCCST C24 VCC VCC P57
C28 VCC VCC U57
C32 VCC VCC W57
VCC 12 OF 19 VCC
R94 1 2 *0_8_SHORT_NC
+V1.05S_VCCST
SVID ALERT
1
B CLOSE TO CPU B
C485
R283 0.1U/16V_4
2
75_4
H_CPU_SVIDALRT# R285 43_4

VR_SVID_ALERT# [54]
+V1.05S_VCCST +V1.05S_VCCST
CLOSE TO VR
SVID DATA
1
C488 C47
CLOSE TO CPU R284 0.1U/16V_4 R7 0.1U/16V_4
2
130_4 130_4
2
VR_SVID_DATA
VR_SVID_DATA [54]
+V1.05S_VCCST
SVID CLK
CLOSE TO VR
1
C49
R8 0.1U/16V_4
2
54.9/F_4
VR_SVID_CLK
VR_SVID_CLK [54]
A A

PROJECT : AM6
A
Haswell ULT 8/12
5 4 3 2 1
5 4 3 2 1
fix
vina Haswell ULT (GND)
U17N HSW_ULT_DDR3L U17O HSW_ULT_DDR3L U17P HSW_ULT_DDR3L

U17R HSW_ULT_DDR3L
D H17 D
A11 AJ35 AP22 AV59 D33 VSS H57
A14 VSS VSS AJ39 AP23 VSS VSS AV8 D34 VSS VSS J10
A18 VSS VSS AJ41 AP26 VSS VSS AW16 D35 VSS VSS J22 N23
A24 VSS VSS AJ43 AP29 VSS VSS AW24 D37 VSS VSS J59 RSVD R23
A28 VSS VSS AJ45 AP3 VSS VSS AW33 D38 VSS VSS J63 RSVD T23
VSS VSS VSS VSS VSS VSS AT2 RSVD
A32 AJ47 AP31 AW35 D39 K1 RSVD U10
VSS VSS VSS VSS VSS VSS AU44 RSVD
A36 AJ50 AP38 AW37 D41 K12 RSVD
VSS VSS VSS VSS VSS VSS AV44
A40 AJ52 AP39 AW4 D42 L13 RSVD
VSS VSS VSS VSS VSS VSS D15
A44 AJ54 AP48 AW40 D43 L15 RSVD AL1
A48 VSS VSS AJ56 AP52 VSS VSS AW42 D45 VSS VSS L17 RSVD AM11
A52 VSS VSS AJ58 AP54 VSS VSS AW44 D46 VSS VSS L18 RSVD AP7
VSS VSS VSS VSS VSS VSS F22 RSVD
A56 AJ60 AP57 AW47 D47 L20 RSVD AU10
VSS VSS VSS VSS VSS VSS H22 RSVD
AA1 AJ63 AR11 AW50 D49 L58 RSVD AU15
VSS VSS VSS VSS VSS VSS J21 RSVD
AA58 AK23 AR15 AW51 D5 L61 RSVD AW14
AB10 VSS VSS AK3 AR17 VSS VSS AW59 D50 VSS VSS L7 RSVD AY14
AB20 VSS VSS AK52 AR23 VSS VSS AW60 D51 VSS VSS M22 RSVD
AB22 VSS VSS AL10 AR31 VSS VSS AY11 D53 VSS VSS N10 18 OF 19
AB7 VSS VSS AL13 AR33 VSS VSS AY16 D54 VSS VSS N3
AC61 VSS VSS AL17 AR39 VSS VSS AY18 D55 VSS VSS P59
AD21 VSS VSS AL20 AR43 VSS VSS AY22 D57 VSS VSS P63
AD3 VSS VSS AL22 AR49 VSS VSS AY24 D59 VSS VSS R10
AD63 VSS VSS AL23 AR5 VSS VSS AY26 D62 VSS VSS R22
AE10 VSS VSS AL26 AR52 VSS VSS AY30 D8 VSS VSS R8
AE5 VSS VSS AL29 AT13 VSS VSS AY33 E11 VSS VSS T1
AE58 VSS VSS AL31 AT35 VSS VSS AY4 E17 VSS VSS T58
AF11 VSS VSS AL33 AT37 VSS VSS AY51 F20 VSS VSS U20
C AF15 VSS VSS AL40 AT43 VSS VSS AY59 F34 VSS VSS U9 C
AF17 VSS VSS AL45 AT46 VSS VSS AY6 F38 VSS VSS V10
AF18 VSS VSS AL46 AT49 VSS VSS B20 F42 VSS VSS V3
AG1 VSS VSS AL51 AT61 VSS VSS B24 F46 VSS VSS V7
AG11 VSS VSS AL52 AT62 VSS VSS B26 F50 VSS VSS W20
AG21 VSS VSS AL54 AT63 VSS VSS B28 F54 VSS VSS W22
AG23 VSS VSS AL57 AU1 VSS VSS B32 F58 VSS VSS Y10
AG60 VSS VSS AL60 AU16 VSS VSS B36 F61 VSS VSS Y59
AG61 VSS VSS AL61 AU18 VSS VSS B4 G18 VSS VSS Y63
AG62 VSS VSS AM1 AU20 VSS VSS B40 G22 VSS VSS
AG63 VSS VSS AM17 AU22 VSS VSS B44 G3 VSS
AH17 VSS VSS AM23 AU24 VSS VSS B48 G5 VSS V58
AH19 VSS VSS AM31 AU26 VSS VSS B52 G6 VSS VSS AH46
AH20 VSS VSS AM52 AU28 VSS VSS B56 G8 VSS VSS V23
AH22 VSS VSS AN17 AU30 VSS VSS B60 H13 VSS VSS E62 VSSSENSE
VSS VSS VSS VSS VSS VSS_SENSE VSSSENSE [54]
AH24 AN23 AU33 C11 16 OF 19 AH16
AH28 VSS VSS AN31 AU51 VSS VSS C14 VSS
AH30 VSS VSS AN32 AU53 VSS VSS C18
AH32 VSS VSS AN35 AU55 VSS VSS C20
AH34 VSS VSS AN36 AU57 VSS VSS C25 100/F_4
AH36 VSS VSS AN39 AU59 VSS VSS C27 R268
AH38 VSS VSS AN40 AV14 VSS VSS C38
AH44 VSS VSS AN45 AV24 VSS VSS D12
B AH57 VSS VSS AN52 AV39 VSS VSS D23 B
AJ13 VSS VSS AN60 AV41 VSS VSS D25
AJ25 VSS VSS AP10 AV49 VSS VSS D29
AJ27 VSS VSS AP17 AV51 VSS VSS D30
AJ29 VSS VSS AP20 AV55 VSS 15 OF 19 VSS D31
VSS VSS VSS VSS
14 OF 19
U17Q HSW_ULT_DDR3L
DC_TEST_AY2_AW 2 AY2 A3 DC_TEST_A3_B3

DC_TEST_AY3_AW 3 AY3 DAISY_CHAIN_NCTF_AY2 DAISY_CHAIN_NCTF_A3 A4 TP_DC_TEST_A4
DAISY_CHAIN_NCTF_AY3 DAISY_CHAIN_NCTF_A4 TP42
TP76 TP_DC_TEST_AY60 AY60
DC_TEST_AY61_AW 61 AY61 DAISY_CHAIN_NCTF_AY60 A60 TP_DC_TEST_A60
DAISY_CHAIN_NCTF_AY61 DAISY_CHAIN_NCTF_A60 TP48
DC_TEST_AY62_AW 62 AY62 A61 DC_TEST_A61_B61
TP47 TP_DC_TEST_B2 B2 DAISY_CHAIN_NCTF_AY62 DAISY_CHAIN_NCTF_A61 A62 TP_DC_TEST_A62
DAISY_CHAIN_NCTF_B2 DAISY_CHAIN_NCTF_A62 TP52
DC_TEST_A3_B3 B3 AV1 TP_DC_TEST_AV1 TP72
DC_TEST_A61_B61 B61 DAISY_CHAIN_NCTF_B3 DAISY_CHAIN_NCTF_AV1 AW1 TP_DC_TEST_AW 1
A DAISY_CHAIN_NCTF_B61 DAISY_CHAIN_NCTF_AW1 TP73 A
B62 AW2 DC_TEST_AY2_AW 2
DC_TEST_B62_B63 B63 DAISY_CHAIN_NCTF_B62 DAISY_CHAIN_NCTF_AW2 AW3 DC_TEST_AY3_AW 3
C1 DAISY_CHAIN_NCTF_B63 DAISY_CHAIN_NCTF_AW3 AW61 DC_TEST_AY61_AW 61
DC_TEST_C1_C2 C2 DAISY_CHAIN_NCTF_C1 DAISY_CHAIN_NCTF_AW61 AW62 DC_TEST_AY62_AW 62
DAISY_CHAIN_NCTF_C2 17 OF 19 DAISY_CHAIN_NCTF_AW62 AW63 TP_DC_TEST_AW 63
DAISY_CHAIN_NCTF_AW63 TP74
PROJECT : AM6
A
Haswell ULT 9/12
5 4 3 2 1
5 4 3 2 1
fix
ina
U17S
v
HSW_ULT_DDR3L
CFG0 AC60 AV63 MCP_RSVD_19 TP77

CFG1 AC62 CFG0 RSVD_TP AU63 MCP_RSVD_20 TP75
AC63 CFG1 RSVD_TP
CFG3 AA63 CFG2
TP68 CFG3
D CFG4 AA60 C63 MCP_RSVD_21 TP50 D
CFG5 Y62 CFG4 RSVD_TP C62 MCP_RSVD_22 TP51
TP66 CFG5 RSVD_TP
CFG6 Y61 B43
TP14 CFG6 RSVD
CFG7 Y60
TP67 CFG7
CFG8 V62 A51 MCP_RSVD_24 TP45
CFG9 V61 CFG8 RSVD_TP B51 MCP_RSVD_25 TP44
CFG10 V60 CFG9 RSVD_TP
CFG11 U60 CFG10 L60 MCP_RSVD_26 TP60
TP9 CFG11 RSVD_TP
CFG12 T63
TP64 CFG12
CFG13 T62 RESERVED N60
TP63 CFG13 RSVD
CFG14 T61
TP11 CFG14
CFG15 T60 W23
TP61 CFG15 RSVD Y22
NOA_STBN_0 AA62 RSVD AY15 PROC_OPI_COMP R379 49.9/F_4
TP70 CFG16 PROC_OPI_RCOMP
NOA_STBN_1 U63
TP62 CFG18
NOA_STBP_0 AA61 AV62
TP69 CFG17 RSVD
NOA_STBP_1 U62 D58
TP65 CFG19 RSVD
R93 49.9/F_4 NOA_RCOMP V63 P22
CFG_RCOMP VSS N21
A5 VSS
RSVD P20
E1 RSVD R20
D1 RSVD RSVD
J20 RSVD
H18 RSVD
TD_IREF B12 RSVD
TD_IREF 19 OF 19
C R41 C
8.2K/F_4
Processor Strapping The CFG signals have a default value of '1' if not terminated on the board.
1 0
CFG0
(DEFAULT) NORMAL OPERATION CFG0 R108 *1K_4_NC
Reserved
CFG1 CFG1 R297 *1K_4_NC

Reserved (DEFAULT) NORMAL OPERATION
CFG2
CFG3 Debug capability is determined by IA32_Debug_Interface_MSR (C80h) bit[0] default

CFG3 R293 *1K_4_NC
B MSR Privacy Bit Feature IA32_Debug_Interface_MSR (C80h) bit[0] setting setting overridden B
CFG4 Disabled Enabled

CFG4 R107 1K_4
eDP enable
CFG[19:5] CFG8 R92 *1K_4_NC

CFG9 R294 *1K_4_NC
CFG10 R100 *1K_4_NC

A A

PROJECT : AM6
A
Haswell ULT 10/12
5 4 3 2 1
5 4 3 2 1
f ix
vina Haswell ULT PCH(POWER)
3.3 SUS: 205mA
1.05 SUS: 2066mA
1.05 RUN: 2578mA
C70 10U/6.3V_6 3.3 RUN: 58mA C281 1U/6.3V_4
C189 *1U/6.3V_4_NC
C175 1U/6.3V_4 C251 2 1 0.1U/16V_4
U17M HSW_ULT_DDR3L
C176 1U/6.3V_4
C282 2 1 0.1U/16V_4
K9
D +V1.05DX_MODPHY VCCHSIO D
C194 1U/6.3V_4 L10 1.838A C246 1U/6.3V_4
M9 VCCHSIO
N8 VCCHSIO HSIO RTC AH11
+1.05V_RUN VCC1_05 VCCSUS3_3 +3.3V_SUS Deep Sleep will be turn off
P9 1mA AG10
VCC1_05 VCCRTC +RTC_CELL
+V1.05S_AUSB3PLL B18 AE7 +VCCRTCEXTC2252 1 0.1U/16V_4
+V1.05S_ASATA3PLL B11 VCCUSB3PLL 41mA DCPRTC
VCCSATA3PLL 42mA
R446 0_4 +3.3V_RUN
Y20 SPI
18mA VCCSPI Y8 +VCCSPI R97 *0_4_NC
RSVD +3.3V_SUS
+V1.05S_APLLOPI AA21 OPI C208 2 1 0.1U/16V_4
W21 VCCAPLL
VCCAPLL
57mA
AG14
+3.3V_RUN +V3.3DX_1.5DX_1.8DX_AUDIO VCCASW +1.05V_RUN
AG13
VCCASW
*C80-->4.7U J13 USB3
R106 2 1 *0_4_SHORT_NC
+1.05V_SUS
C179 10U/6.3V_6 DCPSUS3 10mA J11
VCC1_05 +1.05V_RUN
C174 1U/6.3V_4 H11 C152 10U/6.3V_6
AH14 HDA VCC1_05 H15 C156 1U/6.3V_4
+V3.3DX_1.5DX_1.8DX_AUDIO VCCHDA
11mA 1.954A VCC1_05 AE8 C237 1U/6.3V_4
C242 1U/6.3V_4 VCC1_05 AF22 C243 2 11U/6.3V_4
AH13 VRM VCC1_05 AG19
+1.05V_SUS DCPSUS2
25mA DCPSUSBYP
CORE AG20 +DCPSUSBYPC234 1U/6.3V_4
C255 1U/6.3V_4 DCPSUSBYP AE9
VCCASW +1.05V_RUN
658mA VCCASW AF9
Deep Sleep will be turn off AC9 AG8 C230 10U/6.3V_6
+3.3V_SUS VCCSUS3_3 VCCASW
C211 10U/6.3V_6 AA9 AD10
VCCSUS3_3 62mA
GPIO/LPC
+3.3V_SUS R119 0_4 VCCDSW3_3 AH10

VCCDSW3_3119mA 109mA DCPSUS1
DCPSUS1
AD8
+1.05V_SUS
C217 1U/6.3V_4 V8 C238 1U/6.3V_4
W9 VCC3_3 C220 1U/6.3V_4
+3.3V_RUN VCC3_3
3mA J15
THERMAL SENSOR VCCTS1_5 +1.5V_RUN
C216 1U/6.3V_4 K14
+3.3V_RUN
41mA VCC3_3
VCC3_3
K16
C1932 1 0.1U/16V_4
+V3.3S_1.8S_LPSS_SDIO +3.3V_RUN
+V1.05S_AXCK_DCB J18 R76 *0_6_SHORT_NC
K19 VCCCLK SERIAL IO U8 2 1
VCCCLK
185mA VCCSDIO
+V1.05S_AXCK_LCPLL A20 T9
J17 VCCACLKPLL 31mA 17mA VCCSDIO C205 1U/6.3V_4
+1.05V_RUN VCCCLK
R21
+1.05V_RUN VCCCLK LPT LP POWER
C C177 1U/6.3V_4 T21 C
1U/6.3V_4 C188 K18 VCCCLK SUS OSCILLATOR AB8
RSVD
1mADCPSUS4 +V1.05A_AOSCSUS
M20
V21 RSVD C198 1U/6.3V_4
AE20 RSVD AC20
Deep Sleep will be turn off +3.3V_SUS VCCSUS3_3 RSVD
AE21 AG16
VCCSUS3_3 USB2 VCC1_05 +1.05V_RUN
AG17
VCC1_05 C239 1U/6.3V_4
13 OF 19
1mA
+1.05V_RUN +V1.05S_AXCK_LCPLL +1.05V_SUS +V1.05A_AOSCSUS
L2 2.2uH_8 L8 2.2uH_8
boot strap capacitor VCCDSW3_3 C233 0.47U/6.3V_4 +DCPSUSBYP
1
C85 C197
C107 C101 C195 C196
10U/6.3V_6 0.1U/16V_4 1U/6.3V_4 10U/6.3V_6 0.1U/16V_4 1U/6.3V_4
2
41mA
+1.05V_RUN +V1.05S_AXCK_DCB
+V1.05DX_MODPHY +V1.05S_AUSB3PLL
L3 2.2uH_8
L4 2.2uH_8
+15V_ALW
1
C82
1
+V1.05DX_MODPHY C87 C89 C92
C106 C93 10U/6.3V_6 0.1U/16V_4 1U/6.3V_4
2
+1.05V_SUS 10U/6.3V_6 0.1U/16V_4 1U/6.3V_4
2
B +1.05V_RUN B
*-->4.7U
Q6
FDMC7678
2
42mA
R227 3 R29 1 2 *0_12_NC +1.05V_RUN +V1.05S_APLLOPI
10K_4 5 2 +V1.05DX_MODPHY +V1.05S_ASATA3PLL
1
1
1
+3.3V_RUN C446 L1 2.2uH_8

1U/6.3V_4 C61 L9 2.2uH_8
2
4
1
0.1U/16V_4
2
1
2 Q7 C83
1
AP2319GN-HF C97 C90 C221
2
10U/6.3V_6 0.1U/16V_4 1U/6.3V_4 C223 C215

3
2
R233 *-->4.7U 10U/6.3V_6 0.1U/16V_4 1U/6.3V_4
2
2
100K_4
R19 1 2 330_4 R231
100_4
1
R11 1 2 330_4
1
R234
3
*0_4_SHORT_NC
2N7002KDW
3
1 2 5
[9] MODPHY_EN Q4A 2 Q5
DMN601WK-7 C62
4
2
0.01U/16V_4
1
R232
*10K_4_NC
1
2 2N7002KDW
Q4B
1
A A

PROJECT : AM6
Haswell ULT 11/12 A

5 4 3 2 1
5 4 3 2 1
fix
vina
D D
U17B HSW_ULT_DDR3L
PROC_DETECT# D61
TP49 CATERR# K61 PROC_DETECT MISC
TP56 PECI_EC_R N62 CATERR J62 PRDY TP54
[40] PECI_EC_R PECI PRDY K62 PREQ TP57
*0.1U/16V_4_NC 2 1 C593 PREQ E60 XDP_TCK0
PROC_TCK XDP_TCK0 [11]
E61 PROC_TMS TP53
R279 56_4 H_PROCHOT# K63 JTAG PROC_TMS E59 XDP_TRST_CPU_N
[40,48,50,54] IMVP7_PROCHOT# PROCHOT PROC_TRST XDP_TRST_CPU_N [11]
THERMAL F63 PROC_TDI TP55
R277 2 1 62_4 PROC_TDI F62 XDP_TDO_CPU
+V1.05S_VCCST PROC_TDO
R248 10K_4 H_CPUPW RGD C61
PROCPWRGD PWR +V1.05S_VCCST
J60
BPM#0 H60
BPM#1 H61 XDP_TDO_CPU R271 51/F_4
BPM#2 H62
C R154 200/F_4 SM_RCOMP_0 AU60 BPM#3 K59 C
R153 120/F_4 SM_RCOMP_1 AV60 SM_RCOMP0 DDR3L BPM#4 H63 XDP_TCK0 R304 51/F_4
R152 100/F_4 SM_RCOMP_2 AU61 SM_RCOMP1 BPM#5 K60
R151 2 1 470_4 DDR3_DRAMRST# AV15 SM_RCOMP2 BPM#6 J61 XDP_TRST_CPU_N R316 *51/F_4_NC
+V_VDDQ
LPT_DDR_PG_CTRL AV61 SM_DRAMRST DSW BPM#7
[19,20] DDR3_DRAMRST# SM_PG_CNTL1
[20] LPT_DDR_PG_CTRL
2 OF 19
B B
A A

PROJECT : AM6
A
Haswell ULT 12/12
5 4 3 2 1
A B C D E
fix
vina
JDIM0A M_A_DQ[63..0] [8] +V_VDDQ

[8] M_A_A[15..0] M_A_A0 98 5 M_A_DQ5 JDIM0B
M_A_A1 97 A0 DQ0 7 M_A_DQ4 75 44
1 M_A_A2 96 A1 DQ1 15 M_A_DQ3 76 VDD1 VSS16 48 1
M_A_A3 95 A2 DQ2 17 M_A_DQ2 81 VDD2 VSS17 49
M_A_A10 107 A9 DQ9 33 M_A_DQ30
2.48A 100 VDD9 VSS24 71
M_A_A11 84 A10/AP DQ10 35 M_A_DQ31 105 VDD10 VSS25 72
PC2100 DDR3 SDRAM SO-DIMM

M_A_A13 119 A12/BC# DQ12 24 M_A_DQ25 111 VDD12 VSS27 128
A15 DQ15 39 M_A_DQ44 118 VDD15 VSS30 138
[8] M_A_BS[2..0] DQ16 VDD16 VSS31

M_A_BS0 109 41 M_A_DQ41 123 139
M_A_BS1 108 BA0 DQ17 51 M_A_DQ45 124 VDD17 VSS32 144
M_A_BS2 79 BA1 DQ18 53 M_A_DQ46 VDD18 VSS33 145
114 BA2 DQ19 40 M_A_DQ42 199 VSS34 150
[8] M_A_CS#0 S0# DQ20 +3.3V_RUN VDDSPD VSS35
121 42 M_A_DQ40 151
[8] M_A_CS#1 101 S1# DQ21 50 77 VSS36 155
M_A_DQ47
[8] M_A_CLKP0 103 CK0 DQ22 52 M_A_DQ43 122 NC1 VSS37 156
[8] M_A_CLKN0 102 CK0# DQ23 57 M_A_DQ55 125 NC2 VSS38 161
[8] M_A_CLKP1 104 CK1 DQ24 59 M_A_DQ49 NCTEST VSS39 162
[8] M_A_CLKN1 73 CK1# DQ25 67 VSS40
M_A_DQ50 R196 *10K/F_4_NC 198 167
[8] M_A_CKE0 74 CKE0 DQ26 69 +3.3V_RUN EVENT# VSS41
M_A_DQ51 DDR3_DRAMRST# 30 168
[8] M_A_CKE1 115 CKE1 DQ27 56 M_A_DQ48 [18,20] DDR3_DRAMRST# RESET# VSS42 172
SO-DIMMA SPD ADDRESS IS 0XA0 [8] M_A_CAS# 110 CAS# DQ28 58 M_A_DQ53 VSS43 173
[8] M_A_RAS# 113 RAS# DQ29 68 1 VSS44 178
M_A_DQ52 +SMDDR_VREF_DQA
2 1 10KX2 [8] M_A_WE# 197 WE# DQ30 70 126 VREF_DQ VSS45 179
RP8 DIMM0_SA0 M_A_DQ54
SA0 DQ31 +SMDDR_VREF_CA VREF_CA VSS46
4 3 DIMM0_SA1 201 129 M_A_DQ12 184
202 SA1 DQ32 131 M_A_DQ13 VSS47 185
2 [12,20,38] SMB_PCH_CLK 200 SCL DQ33 141 M_A_DQ11 2 VSS48 189 2
[12,20,38] SMB_PCH_DAT SDA DQ34 143 M_A_DQ15 3 VSS1 VSS49 190
M_A_ODT0 116 DQ35 130 M_A_DQ10 8 VSS2 VSS50 195
[20] M_A_ODT0 120 ODT0 DQ36 132 9 VSS3 VSS51 196
M_A_ODT1 M_A_DQ8
(204P)
[20] M_A_ODT1 ODT1 DQ37 140 M_A_DQ9 13 VSS4 VSS52
C396 C344
11 DQ38 142 M_A_DQ14 0.01U/16V_4 0.01U/16V_4 14 VSS5
28 DM0 DQ39 147 M_A_DQ22 19 VSS6
46 DM1 DQ40 149 M_A_DQ18 20 VSS7 203
DM2 DQ41 VSS8 VTT1 +DDR_VTT
63 157 M_A_DQ23 25 204
(204P)
136 DM3 DQ42 159 M_A_DQ16 26 VSS9 VTT2
153 DM4 DQ43 146 M_A_DQ19 31 VSS10 205
170 DM5 DQ44 148 M_A_DQ20 32 VSS11 HOLE1 206
187 DM6 DQ45 158 M_A_DQ17 37 VSS12 HOLE2
DM7 DQ46 160 M_A_DQ21 38 VSS13 207
[8] M_A_DQSP[7..0] M_A_DQSP0 12 DQ47 163 M_A_DQ32 43 VSS14 PAD1 208
M_A_DQSP3 29 DQS0 DQ48 165 M_A_DQ33 VSS15 PAD2
M_A_DQSP5 47 DQS1 DQ49 175 M_A_DQ39
M_A_DQSP6 64 DQS2 DQ50 177 M_A_DQ37 DDR3-DIMM1_H=4.0_RVS
M_A_DQSP1 137 DQS3 DQ51 164 M_A_DQ36 ddr-ds2rk-20401-tp4b-204p-ruv
M_A_DQSP2 154 DQS4 DQ52 166 M_A_DQ38 DGMK4000412
[8] M_A_DQSN[7..0] M_A_DQSN0 10 DQS7 DQ55 181 M_A_DQ59
M_A_DQSN3 27 DQS#0 DQ56 183 M_A_DQ58
DQS#7 DQ63 Place these Caps near So-Dimm1.
3 DDR3-DIMM1_H=4.0_RVS 3
ddr-ds2rk-20401-tp4b-204p-ruv
DGMK4000412 +V_VDDQ +SMDDR_VREF_CA
C328 1U/6.3V_4 C397 0.1U/16V_4

M3 VREF + M1 VREF
C331 1U/6.3V_4 C394 2.2U/6.3V_6
+V_VDDQ
C329 1U/6.3V_4 SM_VREF_DQ0 [8]
C330 1U/6.3V_4 +SMDDR_VREF_DQA
R186
C382 4.7U/6.3V_6 C341 0.1U/16V_4 +SMDDR_VREF_DQA 1.8K/F_4
C333 4.7U/6.3V_6 C337 2.2U/6.3V_6

R184 2.2/F_4
+3.3V_ALW C385 *4.7U/6.3V_6_NC
2
C388 4.7U/6.3V_6
C319
1
C335 4.7U/6.3V_6 +DDR_VTT 0.022U/16V_4
1
RT1
*10K/NTC/TSM0B103J4252RE_4_NC C327 4.7U/6.3V_6 C340 1U/6.3V_4
R180 C343 R185
C386 10U/6.3V_6 C347 1U/6.3V_4 24.9/F_4 0.01U/16V_4 1.8K/F_4
2
AC_OFF C387 10U/6.3V_6 C365 1U/6.3V_4

[40,50] AC_OFF
C334 10U/6.3V_6 C368 1U/6.3V_4
1
R453 C350 *4.7U/6.3V_6_NC

*1.5K/F_4_NC
4 C349 10U/6.3V_6 4
2
+3.3V_RUN
C313 0.1U/16V_4
Reserve, please close to JDIM0 C318 2.2U/6.3V_6
PROJECT : AM6
A
DDR3 DIMM1-RVS (4.0H)
A B C D E
5 4 3 2 1
f ix +V_VDDQ
ina
JDIM1B
75 44
76 VDD1 VSS16 48
v
JDIM1A M_B_DQ[63..0] [8] 81 VDD2 VSS17 49
[8] M_B_A[15..0] M_B_A0 98 5 M_B_DQ0 82 VDD3 VSS18 54
M_B_A1 97 A0 DQ0 7 M_B_DQ5 87 VDD4 VSS19 55
18
M_B_A6 90 A5 DQ5 16 M_B_DQ3
2.48A 100 VDD9 VSS24 71

D M_B_A10 107 A9 DQ9 33 M_B_DQ28 112 VDD13 VSS28 133 D
M_B_A11 84 A10/AP DQ10 35 M_B_DQ30 117 VDD14 VSS29 134
M_B_A13 119 A12/BC# DQ12 24 M_B_DQ25 123 VDD16 VSS31 139
M_B_A15 78 A14 DQ14 36 M_B_DQ31 VDD18 VSS33 145
A15 DQ15 39 M_B_DQ39 199 VSS34 150
[8] M_B_BS[2..0] DQ16 +3.3V_RUN VDDSPD VSS35

M_B_BS0 109 41 M_B_DQ33 151
M_B_BS1 108 BA0 DQ17 51 M_B_DQ34 77 VSS36 155
M_B_BS2 79 BA1 DQ18 53 M_B_DQ38 122 NC1 VSS37 156
114 BA2 DQ19 40 M_B_DQ36 125 NC2 VSS38 161
[8] M_B_CS#0 121 S0# DQ20 42 M_B_DQ32 NCTEST VSS39 162
[8] M_B_CS#1 101 S1# DQ21 50 VSS40
M_B_DQ35 R197 *10K/F_4_NC 198 167
[8] M_B_CLKP0 103 CK0 DQ22 52 +3.3V_RUN 30 EVENT# VSS41 168
M_B_DQ37
[8] M_B_CLKN0 102 CK0# DQ23 57 M_B_DQ43 [18,19] DDR3_DRAMRST# RESET# VSS42 172
[8] M_B_CLKP1 104 CK1 DQ24 59 VSS43 173
M_B_DQ40
[8] M_B_CLKN1 73 CK1# DQ25 67 M_B_DQ47 1 VSS44 178
[8] M_B_CKE0 CKE0 DQ26 +SMDDR_VREF_DQB VREF_DQ VSS45
74 69 M_B_DQ42 126 179
[8] M_B_CKE1 CKE1 DQ27 +SMDDR_VREF_CA VREF_CA VSS46
115 56 M_B_DQ44 184
SO-DIMMB SPD ADDRESS IS 0XA4 [8] M_B_CAS# 110 CAS# DQ28 58 M_B_DQ41 VSS47 185
[8] M_B_RAS# 113 RAS# DQ29 68 2 VSS48 189
M_B_DQ46
[8] M_B_WE# DIMM1_SA0 197 WE# DQ30 70 M_B_DQ45 3 VSS1 VSS49 190
R182 10K/F_4
R183 10K/F_4 DIMM1_SA1 201 SA0 DQ31 129 M_B_DQ56 8 VSS2 VSS50 195
+3.3V_RUN 202 SA1 DQ32 131 M_B_DQ61 9 VSS3 VSS51 196
(204P)
[12,19,38] SMB_PCH_CLK 200 SCL DQ33 141 M_B_DQ60 13 VSS4 VSS52
C369 C345
[12,19,38] SMB_PCH_DAT SDA DQ34 143 M_B_DQ58 0.01U/16V_4 0.01U/16V_4 14 VSS5
M_B_ODT0 116 DQ35 130 M_B_DQ59 19 VSS6
M_B_ODT1 120 ODT0 DQ36 132 M_B_DQ57 20 VSS7 203
ODT1 DQ37 VSS8 VTT1 +DDR_VTT
140 M_B_DQ62 25 204
11 DQ38 142 M_B_DQ63 26 VSS9 VTT2
28 DM0 DQ39 147 M_B_DQ8 31 VSS10 205
46 DM1 DQ40 149 M_B_DQ13 32 VSS11 HOLE1 206
C 63 DM2 DQ41 157 M_B_DQ10 37 VSS12 HOLE2 C
(204P)
136 DM3 DQ42 159 M_B_DQ11 38 VSS13 207
153 DM4 DQ43 146 M_B_DQ12 43 VSS14 PAD1 208
170 DM5 DQ44 148 M_B_DQ9 VSS15 PAD2
187 DM6 DQ45 158 M_B_DQ14
DM7 DQ46 160 M_B_DQ15 DDR3-DIMM1_H=4.0_RVS
[8] M_B_DQSP[7..0] M_B_DQSP0 12 DQ47 163 M_B_DQ21 ddr-ds2rk-20401-tp4b-204p-ruv
M_B_DQSP3 29 DQS0 DQ48 165 M_B_DQ16 DGMK4000412
M_B_DQSP4 47 DQS1 DQ49 175 M_B_DQ18
[8] M_B_DQSN[7..0] M_B_DQSN0 10 DQS7
DQS#0
DQ55
DQ56
181 M_B_DQ49 M3 VREF + M1 VREF
M_B_DQSN3 27 183 M_B_DQ52
M_B_DQSN4 45 DQS#1 DQ57 191 M_B_DQ53 +V_VDDQ
M_B_DQSN5 62 DQS#2 DQ58 193 M_B_DQ48
DQS#3 DQ59 SM_VREF_DQ1 [8]
M_B_DQSN7 135 180 M_B_DQ50
M_B_DQSN1 152 DQS#4 DQ60 182 M_B_DQ51
M_B_DQSN2 169 DQS#5 DQ61 192 M_B_DQ54 R179
M_B_DQSN6 186 DQS#6 DQ62 194 M_B_DQ55 +SMDDR_VREF_DQB 1.8K/F_4
DQS#7 DQ63
DDR3-DIMM1_H=4.0_RVS R177 2.2/F_4

ddr-ds2rk-20401-tp4b-204p-ruv
DGMK4000412
2
C311
DDR3L SODIMM ODT GENERATION 0.022U/16V_4
1
Q27
B 5 R178 C339 R181 B
Place these Caps near So-Dimm2. 24.9/F_4 0.01U/16V_4 1.8K/F_4
4 3 R427 22_4 +DDR_VTT
2 DDR_PG_CTRL +V_VDDQ +SMDDR_VREF_CA
1 6 C322 1U/6.3V_4 C395 0.1U/16V_4
R4401 2 100K_4
+5V_ALW C325 1U/6.3V_4 C400 2.2U/6.3V_6
2N7002KDW C383 1U/6.3V_4 M3 VREF + M1 VREF
C384 1U/6.3V_4 +SMDDR_VREF_DQB +V_VDDQ
+V_VDDQ SM_VREF_CA [8]

C391 4.7U/6.3V_6 C336 0.1U/16V_4
C324 4.7U/6.3V_6 C316 2.2U/6.3V_6 R195

+SMDDR_VREF_CA 1.8K/F_4
C323 *4.7U/6.3V_6_NC
The 74AUP1G07 provides the single non-inverting buffer C390 4.7U/6.3V_6 R198 2.2/F_4
with open-drain output. C392 4.7U/6.3V_6 +DDR_VTT
2
+5V_ALW +V_VDDQ C326 4.7U/6.3V_6 C320 1U/6.3V_4 C398
U24 0.022U/16V_4
1
R437 *0_4_SHORT_NC C321 10U/6.3V_6 C332 1U/6.3V_4
[18] LPT_DDR_PG_CTRL
1
1 5
NC VCC C389 10U/6.3V_6 C364 1U/6.3V_4 R200 C367 R194
1
R431 24.9/F_4 0.01U/16V_4 1.8K/F_4

R430 *0_4_NC 2 C588 220K/F_4 C393 10U/6.3V_6 C366 1U/6.3V_4
A A 0.1U/16V_4 A
2
C338 *4.7U/6.3V_6_NC
3 4
GND Y C346 10U/6.3V_6
3
74AUP1G07GW DDR_PG_CTRL 2 Q28

1 2 DMN601WK-7 +3.3V_RUN

1
R438 2M_4 C314 0.1U/16V_4

[51] DDR_PG_CTRL
C315 2.2U/6.3V_6
M_A_ODT0 R436 66.5/F_4 M_A_B_DIMM_ODT PROJECT : AM6
[19] M_A_ODT0
M_A_ODT1 R435 66.5/F_4 Size Document Number Rev
[19] M_A_ODT1 M_B_ODT0 R434 66.5/F_4 A
M_B_ODT1 R439 66.5/F_4
DDR3 DIMM2-RVS (4.0H)
5 4 3 2 1
f ix
ina
U14A
v
PART 1 0F 9
[10] PEG_TXP0 AA38 PCIE_RX0P PCIE_TX0P Y33 PEG_RXP0_C C102 1 2 0.1U/16V_4

PEG_RXP0 [10]
[10] PEG_TXN0 Y37 PCIE_RX0N PCIE_TX0N Y32 PEG_RXN0_C C108 1 2 0.1U/16V_4
PEG_RXN0 [10]
[10] PEG_TXP1 Y35 PCIE_RX1P PCIE_TX1P W33 PEG_RXP1_C C100 1 2 0.1U/16V_4

PEG_RXP1 [10]
[10] PEG_TXN1 W36 PCIE_RX1N PCIE_TX1N W32 PEG_RXN1_C C91 1 2 0.1U/16V_4
PEG_RXN1 [10]
[10] PEG_TXP2 W38 PCIE_RX2P PCIE_TX2P U33 PEG_RXP2_C C88 1 2 0.1U/16V_4

PEG_RXP2 [10]
[10] PEG_TXN2 V37 PCIE_RX2N PCIE_TX2N U32 PEG_RXN2_C C81 1 2 0.1U/16V_4
PEG_RXN2 [10]
[10] PEG_TXP3 V35

U36
PCIE_RX3P
PCIE_RX3N
PCIE_TX3P
PCIE_TX3N
U30 PEG_RXP3_C
U29 PEG_RXN3_C
C80
C74
1
1
2 0.1U/16V_4
2 0.1U/16V_4
PEG_RXP3 [10] Opal XT Power-on sequence
[10] PEG_TXN3 PEG_RXN3 [10]
U38 PCIE_RX4P PCIE_TX4P T33

T37 PCIE_RX4N PCIE_TX4N T32 DGPU_PWR_EN
T35 PCIE_RX5P PCIE_TX5P T30 +3V_GFX/+1.8V_GFX/
R36 PCIE_RX5N PCIE_TX5N T29
+PCIE_VDDC_GFX(1.05V)/
+1.35V_GFX & +VGPU_CORE
R38 PCIE_RX6P PCIE_TX6P P33
P37 PCIE_RX6N PCIE_TX6N P32 <20ms
P35 PCIE_RX7P PCIE_TX7P P30 DGPU_PWROK

N36 PCIE_RX7N PCIE_TX7N P29
>100ms
N38 PCIE_RX8P PCIE_TX8P N33
M37 PCIE_RX8N PCIE_TX8N N32 PERSTB
(DGPU_RST#) >100us
PCI EXPRESS INTERFACE
M35 PCIE_RX9P PCIE_TX9P N30

L36 PCIE_RX9N PCIE_TX9N N29
PCIE Clock
L38 PCIE_RX10P PCIE_TX10P L33
K37 PCIE_RX10N PCIE_TX10N L32
+3V_GFX
K35 PCIE_RX11P PCIE_TX11P L30
J36 PCIE_RX11N PCIE_TX11N L29
C541 0.1u/16V_4
J38 PCIE_RX12P PCIE_TX12P K33
5
H37 PCIE_RX12N PCIE_TX12N K32 U22
2
[9] DGPU_RST#
4 PERST_BUF#
PERST_BUF# [56]
H35 PCIE_RX13P PCIE_TX13P J33 1
[13,39,40] BUF_PLT_RST#
G36 PCIE_RX13N PCIE_TX13N J32
74AHC1G08GW R362
3
G38 PCIE_RX14P PCIE_TX14P K30 *100K_4_NC
F37 PCIE_RX14N PCIE_TX14N K29
F35 PCIE_RX15P PCIE_TX15P H33

E37 PCIE_RX15N PCIE_TX15N H32
CLOCK
[12] CLK_PCIE_VGAP AB35 PCIE_REFCLKP
[12] CLK_PCIE_VGAN AA36 PCIE_REFCLKN
CALIBRATION
PCIE_CALR_TX Y30 PCIE_CALR_TX R53 1.69K/F_4
R84 1K_4 TEST_PG AH16 TEST_PG PCIE_CALR_RX Y29 PCIE_CALR_RX R52 1K/F_4 +PCIE_VDDC_GFX
PERST_BUF# AA30 PERSTB

100-CG2491(216-0855000)
PROJECT : AM6
A
Opal_XT/PEG*16
f ix
ina
U14B
PART 2 0F 9
v AD29
AC29
MUTI GFX
GENLK_CLK
GENLK_VSYNC
TXCAP_DPA3P
TXCAM_DPA3N
AU24
AV23
TX0P_DPA2P AT25
AJ21 SWAPLOCKA TX0M_DPA2N AR24
DPA
AK21 SWAPLOCKB
TX1P_DPA1P AU26
TX1M_DPA1N AV25
AR8 DVPCNTL_MVP_0 TX2P_DPA0P AT27

AU8 DVPCNTL_MVP_1 TX2M_DPA0N AR26
AP8 DVPCNTL_0
AW8 DVPCNTL_1 TXCBP_DPB3P AR30
AR3 DVPCNTL_2 TXCBM_DPB3N AT29
AR1 DVPCLK
AU1 DVPDATA_0 TX3P_DPB2P AV31
AU3 DVPDATA_1 TX3M_DPB2N AU30
DPB
AW3 DVPDATA_2
AP6 DVPDATA_3 TX4P_DPB1P AR32
AW5 DVPDATA_4 TX4M_DPB1N AT31
AU5 DVPDATA_5
AR6 DVPDATA_6 TX5P_DPB0P AT33
AW6 DVPDATA_7 TX5M_DPB0N AU32
AU6 DVPDATA_8
AT7 DVPDATA_9 TXCCP_DPC3P AU14 +3V_GFX +3V_GFX
AV7 DVPDATA_10 TXCCM_DPC3N AV13
AN7 DVPDATA_11 Initial Startup VID (Boot VID)
AV9 DVPDATA_12 TX0P_DPC2P AT15
AT9 DVPDATA_13 TX0M_DPC2N AR14 R332 R331
AR10 DVPDATA_14 *10K_4_NC 10K_4 SVC SVD VDDC/VDDCI Output Voltage (V)
DPC
AW10 DVPDATA_15 TX1P_DPC1P AU16
AU10 DVPDATA_16 TX1M_DPC1N AV15
to VR SVC
AP10 DVPDATA_17 PWRCNTRL1 0 0 1.1
AV11 DVPDATA_18 TX2P_DPC0P AT17
AT11 DVPDATA_19 TX2M_DPC0N AR16 PWRCNTRL0
AR12 DVPDATA_20 0 1 1.0
AW12 AU20 to VR SVD
+3V_GFX DVPDATA_21 TXCDP_DPD3P
AU12 DVPDATA_22 TXCDM_DPD3N AT19
AP12 DVPDATA_23 R320 R319 1 0 0.9
TX3P_DPD2P AT21 10K_4 *10K_4_NC
TX3M_DPD2N AR20
DPD
1 1 0.8
R133 4.7K_4 GPU_SMBCLK AJ23 SMBCLK TX4P_DPD1P AU22
SMBus
R126 4.7K_4 GPU_SMBDAT AH23 SMBDATA TX4M_DPD1N AV21
TX5P_DPD0P AT23
TX5M_DPD0N AR22
GPU_SCL AK26 SCL
+3V_GFX TP25 AJ26 I2C
GPU_SDA SDA
TP18
R AD39
GENERAL PURPOSE I/O AVSSN#1 AD37
GPU_GPIO0 AH20 GPIO_0 +3V_GFX
TP31 AH18 AE36
R336 GPU_GPIO1 GPIO_1 G
TP27
10K_4 GPU_GPIO2 AN16 GPIO_2 AVSSN#2 AD35
TP28
2
B AF37
[40] DGPU_AC_DC# 3 1 GPU_AC_DC# AH17 GPIO_5_AC_BATT AVSSN#3 AE38
AJ17 GPIO_6
DAC1
AK17 GPIO_7_BLON HSYNC AC36 GPU_HSYNC_COM R257 *10K_4_NC
2N7002W GPU_GPIO8 AJ13 AC38 GPU_VSYNC_COM R249 *10K_4_NC
Q16
TP30
TP6
GPU_GPIO9 AH15
GPIO_8_ROMSO
GPIO_9_ROMSI
VSYNC
Check need or not
GPU_GPIO10 AJ16 GPIO_10_ROMSCK +1.8V_GFX
TP32 AK16 AB34
GPU_GPIO11 GPIO_11 RSET R250 499/F_4 +1.8V_AVDD
TP7
GPU_GPIO12 AL16 GPIO_12 DAC1 Analog Power : 1.8V@18mA
TP21
AM16 GPIO_13 AVDD AD34 L13
TP29 AM14 GPIO_14_HPD2 AVSSQ AE34 BLM15BD121SN1D_300MA
AM13 GPIO_15_PWRCNTL_0
to VR SVD [56] PWRCNTRL0 AK14 AC33
GPIO_16 VDD1DI C484 C483 C482
AG30 GPIO_17_THERMAL_INT VSS1DI AC34 0.1u/16V_4 1u/6.3V_4 10u/6.3V_6
"Opal" uses GPIO_15 as the designated pin for SVD, AN14 GPIO_18_HPD3
and GPI0_20 as the designated pin for SVC. R86 10K_4 GPIO_19_CTF AM17 GPIO_19_CTF
AL13 GPIO_20_PWRCNTL_1 NC#1 V13
to VR SVC [56] PWRCNTRL1 AJ14 U13
GPU_GPIO21 GPIO_21 NC#2
TP5
GPU_GPIO22 AK13 GPIO_22_ROMCSB NC#3 AC31
TP23
CLKREQB AN13 CLKREQB NC#4 AD30 +1.8V_VDD1DI
TP22 AC32
NC#5 DAC1 Digital Power : 1.8V@117mA
NC#6 AD32 L5
AG32 GPIO_29 NC#7 AF32 BLM15BD121SN1D_300MA
AG33 GPIO_30 NC#8 AA29
NC#9 AG21 C128 C129 C130
AJ19 GENERICA 0.1u/16V_4 1u/6.3V_4 10u/6.3V_6
AK19 GENERICB
GPU_GENERICC AJ20 GENERICC
TP20
AK20 GENERICD
AJ24 GENERICE_HPD4 NC_TSVSSQ AF33
AH26 GENERICF_HPD5
AH24 GENERICG_HPD6
PS_0 AM34 PS_0

+1.8V_GFX PS_0 [24]
TP4 AC30 CEC_1
Place close to Chip TP19 AK24 HPD1 PS_1 AD31 PS_1

MLPS PS_1 [24]
R129
499/F_4
GPU_VREFG AH13 VREFG PS_2 AG31 PS_2

PS_2 [24]
R127 C253 BACO

249/F_4 R318 *4.7K_4_NC AL21 PX_EN PS_3 AD33 PS_3
PS_3 [24]
0.1u/16V_4
DEBUG DDC/AUX
DDC1CLK AM26
DDC1DATA AN26
R49 1K_4 TESTEN AD28 TESTEN
AUX1P AM27
R48 *5.11K/F_4_NC AUX1N AL27
+3V_GFX
R132 *10K_4_NC AM23 JTAG_TRSTB DDC2CLK AM19
R317 *10K_4_NC AN23 JTAG_TDI DDC2DATA AL19
R125 *10K_4_NC AK23 JTAG_TCK
R124 *10K_4_NC AL24 JTAG_TMS AUX2P AN20
TP26 AM24 JTAG_TDO AUX2N AM20
DDCCLK_AUX3P AL30
DDCDATA_AUX3N AM30
THERMAL
DDCCLK_AUX4P AL29
VGA_THERMDP AF29 DPLUS DDCDATA_AUX4N AM29
[45] VGA_THERMDP VGA_THERMDN AG29 DMINUS
[45] VGA_THERMDN AN21
DDCCLK_AUX5P
DDCDATA_AUX5N AM21
PU:Disable MLPS R85 10K_4 GPU_GPIO28 AK32 GPIO_28_FDO
AK30
PD:Enable MLPS AL31
DDCCLK_AUX6P
AK29
TS_A DDCDATA_AUX6N
120 ohm @ 100MHz
on-die thermal sensor power : 1.8V@8mA DDCVGACLK AJ30
L15 +1.8V_TSVDD AJ32 TSVDD DDCVGADATA AJ31
+1.8V_GFX
BLM15BD121SN1D_300MA AJ33
C494 C495
TSVSS
C498
10u/6.3V_6 1u/6.3V_4 0.1u/16V_4 100-CG2491(216-0855000)
Opal XT
PROJECT : AM6
A
Opal_XT/GPIO_DP_CRT_I2C
f ix
v ina
237mA
+1.8V_GFX L10 PBY160808T-501Y-N_1.2A DPLL_PVDD
U14G
C244 C245
C231
U14I PART 7 0F 9
10u/6.3V_6 1u/6.3V_4 0.1u/16V_4
VARY_BL AK27
PART 9 0F 9 AJ27
LVDS CONTROL DIGON
AM32 DPLL_PVDD XTALIN AV33 GPU_XTALIN C509 10p/50V_4 TXCLK_UP_DPF3P AK35

280mA TXCLK_UN_DPF3N AL36
3
4
L21 PBY160808T-501Y-N_1.2A DPLL_VDDC AN31 DPLL_VDDC
+PCIE_VDDC_GFX
Y1 TXOUT_U0P_DPF2P AJ38
C519 C506 R313 TXOUT_U0N_DPF2N AK37
C527 AN32 DPLL_PVSS 1M_4 27MHz_XTAL
10u/6.3V_6 1u/6.3V_4 0.1u/16V_4 TXOUT_U1P_DPF1P AH35
1
2
XTALOUT AU34 GPU_XTALOUT C508 10p/50V_4 TXOUT_U1N_DPF1N AJ36
TXOUT_U2P_DPF0P AG38
TXOUT_U2N_DPF0N AH37
H7 MPLL_PVDD
NEED 220 ohm @ 100MHz H8 MPLL_PVDD TXOUT_U3P AF35
150mA TXOUT_U3N AG36
LVTMDP
L0 PBY160808T-501Y-N_1.2A MPLL_PVDD XO_IN AW34 XO_IN R327 10K_4
+1.8V_GFX
C32 C36 AM10 SPLL_PVDD
PLLS/XTAL
C27
10u/6.3V_6 1u/6.3V_4 0.1u/16V_4 TXCLK_LP_DPE3P AP34
TXCLK_LN_DPE3N AR34
AN9 SPLL_VDDC XO_IN2 AW35 XO_IN2 R322 10K_4
TXOUT_L0P_DPE2P AW37
TXOUT_L0N_DPE2N AU35
AN10 SPLL_PVSS TXOUT_L1P_DPE1P AR37

120 ohm @ 100MHz TXOUT_L1N_DPE1N AU39
75mA
L19 BLM15BD121SN1D_300MA SPLL_PVDD TXOUT_L2P_DPE0P AP35
+1.8V_GFX
CLKTESTA AK10 CLKTESTA TXOUT_L2N_DPE0N AR35
C522 C512 AF30 NC_XTAL_PVDD CLKTESTB AL10 CLKTESTB
C529 AF31 NC_XTAL_PVSS TXOUT_L3P AN36
10u/6.3V_6 1u/6.3V_4 0.1u/16V_4 TXOUT_L3N AP37
C258 C256
*0.1u/16V_4_NC *0.1u/16V_4_NC
100-CG2491(216-0855000)
NEED 120 ohm @ 100MHz
100mA 100-CG2491(216-0855000) R136 R135
+PCIE_VDDC_GFX L20 PBY160808T-501Y-N_1.2A SPLL_VDDC *51.1/F_4_NC *51.1/F_4_NC
C523 C517
C530
10u/6.3V_6 1u/6.3V_4 0.1u/16V_4

PROJECT : AM6
A
Opal_XT/XTAL_LVDS
f ix VDDC_CT
ina
VDDC_CT
MLPS Strap Name AM6 AM6 Description AMD Recommended Settings
Bit Settings Settings
v
R_pu R88
8.45K/F_4 R_pu R68 PS_0[1] ROM_CONFIG[0] 1 Memory Aperture Size Select : 256MB Serial ROM type or Memory Design dependent,
*0_4_NC Aperture Size Select SIZE ROM_CONFIG[2;0]
PS_0 If STRAP_BIOS_ROM_EN = 1, 128MB 000
[22] PS_0 ROM_CONFIG[2:0] define the 256MB 001
PS_1 PS_0[2] ROM_CONFIG[1] 0
[22] PS_1 ROM type. 64MB 010
R_pd Reserved 011
Ca C207 R89 R_pd If STRAP_BIOS_ROM_EN = 0,
*82n/16V_4_NC 2K/F_4 Ca C155 R69 0 ROM_CONFIG[2:0] define the
PS_0[3] ROM_CONFIG[2] primary memory-aperture size.
*0.1u/16V_4_NC 4.75K/F_4
PS_0[4] N/A 1 N/A Reserved for internal use only. 1

Must be 1 at reset.
the strap option indicates
AUD_PORT_CONN_PINSTRAP[0] 1 All endpoints are usable. the number of audio-capable Design dependent
PS_0[5] display outputs.
PCIe GEN3 capability.
PS_1[1] STRAP_BIF_GEN3_EN_A 0 PCIe GEN3 is not supported. (use GEN2) 1 = PCIe GEN3 is supported. Design dependent
0 = PCIe GEN3 is not supported.
Determines whether or not the
PS_1[2] STRAP_BIF_CLK_PM_EN 0 The CLKREQB power management capability PCIe reference clock power 0
SP : Mars DDR3 Memory TYPE Set is disabled management capability
VDDC_CT 0 = The CLKREQB power
VDDC_CT management capability is
disabled
1 = The CLKREQB power
management capability is
R_pu R82 enabled
*0_4_NC R_pu R266 Reserved for internal use only.
*0_4_NC PS_1[3] N/A 0 Must be 0 at reset. 0
N/A
PS_2
[22] PS_2
PS_3 Control the transmitter full-/
[22] PS_3 half-swing mode
R_pd PS_1[4] 1 The transmitter full-swing is enabled 1
C180 R79 STRAP_TX_CFG_DRV_FULL_SWING 0 = The transmitter half-swing is
Ca R_pd enabled
680n/6.3V_4 4.75K/F_4 Ca C477 R267
*680n/6.3V_4_NC 1 = The transmitter full-swing is
4.75K/F_4 enabled
PCI EXPRESS transmitter,
PS_1[5] STRAP_TX_DEEMPH_EN 1 Tx deemphasis enabled. deemphasis enable. Design dependent
0 = Tx deemphasis disabled.
1 = Tx deemphasis enabled.
PS_2[1] N/A 0 Reserved. Reserved. N/A

To enable the external BIOS
ROM device.
PS_2[3] STRAP_BIOS_ROM_EN 0 Disable the external BIOS 0 = Disable the external BIOS Design dependent
ROM device. ROM device.
1 = Enable the external BIOS
ROM device.
MLPS Bit Bits [5:1]
VGA disable determines
PS_2[4] STRAP_BIF_VGA_DIS 0 Standalone dGPU design whether or not the card will be Standalone dGPU
recognized as the system's VGA design = 0
PS_0 11001 controller AMD PowerXpress
0 = VGA controller capacity design = 1
enabled.
PS_1 11000 1 = The device will not be
recognized as the system’s VGA
controller.
PS_2 00000
PS_3 11XXX
PS_3[1] BOARD_CONFIG[0] X
VRAM vendor BOARD_CONFIG[2:0] Board configuration related

PS_3[2] BOARD_CONFIG[1] X Hynix 000 default strapping, such as for memory Design dependent
Micron 001 ID
MLPS PS_3[3] BOARD_CONFIG[2] X
Samsung 010
STRAPS TO INDICATE THE NUMBER

Ca Bits [5:4] P/N R_pu R_pd Bits [3:1] R_pu/R_pd P/N PS_3[4] AUD_PORT_CONN_PINSTRAP[1] 1 OF AUDIO CAPABLE DISPLAY OUTPUTS
No usable endpoints. 111 = No usable endpoints.
110 = One usable endpoint.
PS_3[5] AUD_PORT_CONN_PINSTRAP[2] 1 101 = Two usable endpoints. Design dependent
680nF 00 CH4681K9B00 NC 4.75K 000 2K CS22002FB19 100 = Three usable endpoints.
011 = Four usable endpoints.
010 = Five usable endpoints.
82nF 01 CH3823K1B00 8.45K 2K 001 3.24K CS23242FB09 001 = Six usable endpoints.
000 = All endpoints are usable.
10nF 10 CH31003KB11 4.53K 2K 010 3.4K CS23402FB08
NC 11 NA 6.98K 4.99K 011 4.53K CS24532FB08

System Memory Aperture size
4.53K 4.99K 100 4.75K CS24752FB12
GPIO9 SIZE GPIO13 GPIO12 GPIO11
3.24K 5.62K 101 4.99K CS24992FB26
BIOSROM ROM_CONFIG2 ROM_CONFIG1 ROM_CONFIG0
3.4K 10K 110 5.62K CS25622FB18
0 128M 0 0 0
4.75K NC 111 6.98K CS26982FB01
0 256M 0 0 1
8.45K CS28452FB12
0 64M 0 1 0
10K CS31002FB26 Reserved
0 0 1 1
Opal USE
Vendor Vendor P/N STN B/S P/N Size MLPS
H5TC4G63AFR-11C
Hynix AKD5PGWTW11 * 8 4GB
(256M*16) 000
MT41J256M16HA-093G:E
Micron AKD5PZSTL02 *8 4GB
(256M*16) 001
K4W4G1646D-BC1A
Samsung AKD5PGWT500 * 8 4GB
(256M*16) 010
PROJECT : AM6
A
Opal_XT/STRAPS_Thermal
ix
af
U14E
PART 5 0F 9 +1.8V_GFX
vin
+1.35V_GFX
(2.2A) MEM I/O (440mA)
AC7 VDDR1 NC_PCIE_VDDR AA31 PCIE_VDDR L12 BLM15PX181SN1D_1.5A
AD11 VDDR1 NC_PCIE_VDDR AA32
AF7 VDDR1 NC_PCIE_VDDR AA33
C18 C19 C25 C39 C425 AG10 VDDR1 NC_PCIE_VDDR AA34 C471 C472 C473 C470 C467
4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 10u/6.3V_6 10u/6.3V_6 AJ7 VDDR1 NC_PCIE_VDDR W30 0.1u/16V_4 0.1u/16V_4 1u/6.3V_4 1u/6.3V_4 4.7u/6.3V_6
AK8 VDDR1 NC_PCIE_VDDR Y31
AL9 VDDR1 NC_BIF_VDDC V28
G11 VDDR1 NC_BIF_VDDC W29
G14 VDDR1 PCIE_PVDD AB37
G17
PCIE
VDDR1
G20 VDDR1 PCIE_VDDC G30
C135 C43 C126 C250 C10 C64 C149 G23 VDDR1 PCIE_VDDC G31 +PCIE_VDDC_GFX
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 G26 VDDR1 PCIE_VDDC H29 (1.88A)
G29 VDDR1 PCIE_VDDC H30
H10 VDDR1 PCIE_VDDC J29
J7 VDDR1 PCIE_VDDC J30
J9 VDDR1 PCIE_VDDC L28 C84 C103 C113 C57 C63 C65 C66
K11 VDDR1 PCIE_VDDC M28 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 4.7u/6.3V_6 4.7u/6.3V_6
K13 VDDR1 PCIE_VDDC N28
C69 C240 C8 C222 K8 VDDR1 PCIE_VDDC R28
0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 L12 VDDR1 PCIE_VDDC T28
L16 VDDR1 PCIE_VDDC U28
L21 VDDR1
L23 VDDR1
L26 VDDR1 BIF_VDDC N27 R9 *short_8_NC +PCIE_VDDC_GFX
L7 BACO T27
VDDR1 BIF_VDDC
+ M11 VDDR1
C15 C163 C34 C6 C26 N11 VDDR1 C94 C51 C52
0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 *100u/6.3V_3528_NC P7 VDDR1 VDDC AA15 1u/6.3V_4 4.7u/6.3V_6 *4.7u/6.3V_6_NC
R11 CORE AA17
VDDR1 VDDC
U11 VDDR1 VDDC AA20
U7 VDDR1 VDDC AA22
Y11 VDDR1 VDDC AA24
Y7 VDDR1 VDDC AA27
VDDC AB16 +VGPU_CORE
VDDC AB18 (30A)
VDDC AB21
Level translation between core and I/O, VDDC AB23
excluding memory receivers. VDDC_CT LEVEL VDDC AB26
(17mA) TRANSLATION VDDC AB28 C125 C165 C172 C145 C142 C104 C148
L16 VDDC_CT AF26 VDD_CT VDDC AC17 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
+1.8V_GFX
BLM15BD121SN1D_300MA AF27 VDD_CT VDDC AC20
AG26 VDD_CT VDDC AC22
C502 C504 C173 C159 AG27 VDD_CT VDDC AC24
4.7u/6.3V_6 1u/6.3V_4 1u/6.3V_4 0.1u/16V_4 VDDC AC27
VDDC AD18
I/O power for 3.3-V pins, such as GPIOs. I/O VDDC AD21
(60mA) AF23 VDDR3 VDDC AD23
+3V_GFX L22 VDDR3 AF24 VDDR3 VDDC AD26
FCM1005KF-221T03_300MA AG23 VDDR3 VDDC AF17 C110 C140 C77 C153 C71 C132 C67 C76 C143 C137
AG24 VDDR3 VDDC AF20 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
C531 C528 C520 C507 VDDC AF22
4.7u/6.3V_6 *4.7u/6.3V_6_NC 1u/6.3V_4 1u/6.3V_4 DVP VDDC AG16
AD12 VDDR4 VDDC AG18
AF11 VDDR4
AF12 VDDR4 VDDC AH22
Power for all DVP pins; DVPDATA_[23:0]—DVO or GPIO. AF13 VDDR4 VDDC AH27
(300mA) VDDC AH28
L17 VDDR4 VDDC M26
+1.8V_GFX
FCM1005KF-221T03_300MA AF15 VDDR4 VDDC N24 C139 C122 C121 C123 C138 C120 C118 C119 C72 C78
AG11 VDDR4 VDDC R18 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6
C524 C158 C164 AG13 VDDR4 VDDC R21
4.7u/6.3V_6 1u/6.3V_4 0.1u/16V_4 AG15 VDDR4 VDDC R23
VDDC R26
VDDC T17
VDDC T20
VDDC T22
VDDC T24
VDDC U16
VDDC U18
C511 VDDC U21
4.7u/6.3V_6 VDDC U23
VDDC U26
VDDC V17
VDDC V20
VDDC V22
VDDC V24
VDDC V27
VDDC Y16
VDDC Y18
VDDC Y21
VDDC Y23
VDDC Y26
VDDC Y28
(8.8A)
VDDCI AA13
+VGPU_CORE
VDDCI AB13
VDDCI AC12
VDDCI AC15 C144 C134 C95 C86
VDDCI AD13 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
VDDCI AD16
VDDCI M15
VDDCI M16
GPUVDDC/GPUVSS route a differtial pair. VDDCI M18
VOLTAGE M23
VDDCI
SENESE N13
CORE I/O
VDDCI
ISOLATED
AF28 FB_VDDC VDDCI N15

[56] VGPU_CORE_SENSE N17
VDDCI C79 C73
VDDCI N20 4.7u/6.3V_6 4.7u/6.3V_6
TP8 AG28 FB_VDDCI VDDCI N22
VDDCI R12
VDDCI R13
AH29 R16
[56] VSS_GPU_SENSE FB_GND VDDCI
VDDCI T12
T15
VDDCI
V15
VDDCI
VDDCI Y13 PROJECT : AM6
A
100-CG2491(216-0855000)
Opal_XT/MainPower
f ix
vina
U14H
PART 8 0F 9
(330mA)
DPAB_VDD10 L18 +PCIE_VDDC_GFX
DP_VDDR DP_VDDC
PBY160808T-501Y-N_1.2A
DP_VDDC AP31 C526 C521 C510
DP_VDDC AP32
DP_VDDC AN33 4.7u/6.3V_6 1u/6.3V_4 0.1u/16V_4
DP_VDDC AP33
AN24 DP_VDDR
AP24 DP_VDDR NC DP_VDDC AP13 (330mA)
AP25 DP_VDDR NC DP_VDDC AT13
AP26 DP_VDDR NC DP_VDDC AP14
AU28 DP_VDDR NC DP_VDDC AP15
AV29 DP_VDDR
DP_VDDC AL33
DP_VDDC AM33
AP20 DP_VDDR DP_VDDC AK33
AP21 DP_VDDR DP_VDDC AK34
AP22 DP_VDDR
AP23 DP_VDDR
AU18 DP_VDDR
AV19 DP_VDDR
+1.8V_GFX DP GND
DP_VSSR AN27
AH34 DP_VDDR DP_VSSR AP27
AJ34 DP_VDDR DP_VSSR AP28
AF34 DP_VDDR DP_VSSR AW24
AG34 DP_VDDR DP_VSSR AW26
(330mA) AM37 DP_VDDR DP_VSSR AN29
L14 PBY160808T-501Y-N_1.2A DPEF_VDD18 AL38 DP_VDDR DP_VSSR AP29
DP_VSSR AP30
DP_VSSR AW30
C492 C489 C490 DP_VSSR AW32
4.7u/6.3V_6 1u/6.3V_4 0.1u/16V_4 DP_VSSR AN17
DP_VSSR AP16
DP_VSSR AP17
DP_VSSR AW14
DP_VSSR AW16
DP_VSSR AN19
DP_VSSR AP18
DP_VSSR AP19
DP_VSSR AW20
CALIBRATION
DP_VSSR AW22
DP_VSSR AN34
DP_VSSR AP39
AW28 DPAB_CALR DP_VSSR AR39
DP_VSSR AU37
DP_VSSR AF39
DP_VSSR AH39
AW18 DPCD_CALR DP_VSSR AK39
DP_VSSR AL34
DP_VSSR AV27
DP_VSSR AR28
R290 150/F_4 AM39 DPEF_CALR DP_VSSR AV17
DP_VSSR AR18
DP_VSSR AN38
DP_VSSR AM35
100-CG2491(216-0855000)

PROJECT : AM6
A
Opal_XT/DP_Powers
<VGA>
fix
ina
U14F
v
PART 6 0F 9
AB39 PCIE_VSS GND A3

E39 PCIE_VSS GND A37
F34 PCIE_VSS GND AA16
F39 PCIE_VSS GND AA18
G33 PCIE_VSS GND AA2
G34 PCIE_VSS GND AA21
H31 PCIE_VSS GND AA23
J31 PCIE_VSS GND AA6
J34 PCIE_VSS GND AB12
K31 PCIE_VSS GND AB15
L31 PCIE_VSS GND AB22
L34 PCIE_VSS GND AB24
M34 PCIE_VSS GND AB27
M39 PCIE_VSS GND AC11
N31 PCIE_VSS GND AC13
N34 PCIE_VSS GND AC16
P31 PCIE_VSS GND AC18
R34 PCIE_VSS GND AC23
T31 PCIE_VSS GND AC26
U31 PCIE_VSS GND AD15
U34 PCIE_VSS GND AD17
V34 PCIE_VSS GND AD20
V39 PCIE_VSS GND AD22
W31 PCIE_VSS GND AD24
W34 PCIE_VSS GND AD27
Y34 PCIE_VSS GND AD9
Y39 PCIE_VSS GND AE2
GND AE6
GND AF10
GND AF16
GND AF18
GND GND AF21
GND AG17
F15 GND GND AG2
F17 GND GND AG20
F19 GND NC_EVDDQ2 GND AG22 Opal AG22 NC
F21 GND GND AG6
F23 GND GND AG9
F25 GND GND AH21
F27 GND GND AJ10
F29 GND GND AJ11
F31 GND GND AJ2
F33 GND GND AJ28
F7 GND GND AJ6
F9 GND GND AK11
G2 GND GND AK31
G6 GND GND AK7
H9 GND GND AL11
J2 GND GND AL14
J27 GND GND AL17
J6 GND GND AL2
J8 GND GND AL20
K14 GND
K7 GND GND AL23
L11 GND GND AL26
L17 GND GND AL32
L2 GND GND AL6
L22 GND GND AL8
L24 GND GND AM11
L6 GND GND AM31
M17 GND GND AM9
M22 GND GND AN11
M24 GND GND AN2
N16 GND GND AN30
N18 GND GND AN6
N2 GND GND AN8
N21 GND GND AP11
N23 GND GND AP7
N26 GND GND AP9
N6 GND GND AR5
R15 GND GND B11
R17 GND GND B13
R2 GND GND B15
R20 GND GND B17
R22 GND GND B19
R24 GND GND B21
R27 GND GND B23
R6 GND GND B25
T11 GND GND B27
T13 GND GND B29
T16 GND GND B31
T18 GND GND B33
T21 GND GND B7
T23 GND GND B9
T26 GND GND C1
U15 GND GND C39
U17 GND GND E35
U2 GND GND E5
U20 GND GND F11
U22 GND GND F13
U24 GND
U27 GND
U6 GND
V11 GND
V16 GND
V18 GND
V21 GND
V23 GND
V26 GND
W2 GND
W6 GND
Y15 GND
Y17 GND
Y20 GND
Y22 GND VSS_MECH A39
Y24 GND VSS_MECH AW1
Y27 GND VSS_MECH AW39
100-CG2491(216-0855000)

PROJECT : AM6
A
Opal_XT/GND
<VGA>
f ix
v ina U14C
U14D
PART 4 0F 9
PART 3 0F 9 VMB_DQ[63..0]
VMA_DQ[63..0] [30] VMB_DQ[63..0] GDDR5/DDR3
GDDR5/DDR3 VMB_DQ0 C5 DQB0_0 MAB0_0/MAB_0 P8 VMB_MA0
[29] VMA_DQ[63..0] VMB_RDQS[7..0]
VMA_DQ0 C37 DQA0_0 MAA0_0/MAA_0 G24 VMA_MA0 VMB_DQ1 C3 DQB0_1 MAB0_1/MAB_1 T9 VMB_MA1
VMA_RDQS[7..0] C35 J23 [30] VMB_RDQS[7..0] E3 P9
VMA_DQ1 DQA0_1 MAA0_1/MAA_1 VMA_MA1 VMB_DQ2 DQB0_2 MAB0_2/MAB_2 VMB_MA2
[29] VMA_RDQS[7..0] VMB_WDQS[7..0]
VMA_DQ2 A35 DQA0_2 MAA0_2/MAA_2 H24 VMA_MA2 VMB_DQ3 E1 DQB0_3 MAB0_3/MAB_3 N7 VMB_MA3
VMA_WDQS[7..0] E34 J24 [30] VMB_WDQS[7..0] F1 N8
[29] VMA_WDQS[7..0] VMB_MA[15..0]
VMA_DQ4 G32 DQA0_4 MAA0_4/MAA_4 H26 VMA_MA4 VMB_DQ5 F3 DQB0_5 MAB0_5/MAB_5 N9 VMB_MA5
VMA_MA[15..0] [30] VMB_MA[15..0]
VMA_DQ5 D33 DQA0_5 MAA0_5/MAA_5 J26 VMA_MA5 VMB_DQ6 F5 DQB0_6 MAB0_6/MAB_6 U9 VMB_MA6
[29] VMA_MA[15..0] F32 H21 VMB_DM[7..0] G4 U8
VMA_DM[7..0] [30] VMB_DM[7..0]
VMA_DQ7 E32 DQA0_7 MAA0_7/MAA_7 G21 VMA_MA7 VMB_DQ8 H5 DQB0_8 MAB1_0/MAB_8 Y9 VMB_MA8
[29] VMA_DM[7..0] D31 H19 H6 W9
VMA_DQ8 VMA_MA8 VMB_DQ9 VMB_MA9
MEMORY INTERFACE A
DQA0_8 MAA1_0/MAA_8 DQB0_9 MAB1_1/MAB_9
VMA_DQ9 F30 DQA0_9 MAA1_1/MAA_9 H20 VMA_MA9 VMB_DQ10 J4 DQB0_10 MAB1_2/MAB_10 AC8 VMB_MA10
VMA_DQ10 C30 DQA0_10 MAA1_2/MAA_10 L13 VMA_MA10 VMB_DQ11 K6 DQB0_11 MAB1_3/MAB_11 AC9 VMB_MA11
VMA_DQ11 A30 DQA0_11 MAA1_3/MAA_11 G16 VMA_MA11 VMB_DQ12 K5 DQB0_12 MAB1_4/MAB_12 AA7 VMB_MA12
VMA_DQ12 F28 DQA0_12 MAA1_4/MAA_12 J16 VMA_MA12 VMB_DQ13 L4 DQB0_13 MAB1_5/BA2 AA8 VMB_BA2
C28 H16 M6 Y8 VMB_BA2 [30]
VMA_DQ13 DQA0_13 MAA1_5/MAA_BA2 VMA_BA2 VMB_DQ14 DQB0_14 MAB1_6/BA0 VMB_BA0
VMA_BA2 [29] VMB_BA0 [30]
VMA_DQ14 A28 DQA0_14 MAA1_6/MAA_BA0 J17 VMA_BA0 VMB_DQ15 M1 DQB0_15 MAB1_7/BA1 AA9 VMB_BA1
VMA_BA0 [29] VMB_BA1 [30]
VMA_DQ15 E28 DQA0_15 MAA1_7/MAA_BA1 H17 VMA_BA1 VMB_DQ16 M3 DQB0_16
VMA_BA1 [29]
MEMORY INTERFACE B
VMA_DQ16 D27 DQA0_16 VMB_DQ17 M5 DQB0_17 WCKB0_0/DQMB_0 H3 VMB_DM0
VMA_DQ17 F26 DQA0_17 WCKA0_0/DQMA_0 A32 VMA_DM0 VMB_DQ18 N4 DQB0_18 WCKB0B_0/DQMB_1 H1 VMB_DM1
VMA_DQ18 C26 DQA0_18 WCKA0B_0/DQMA_1 C32 VMA_DM1 VMB_DQ19 P6 DQB0_19 WCKB0_1/DQMB_2 T3 VMB_DM2
VMA_DQ19 A26 DQA0_19 WCKA0_1/DQMA_2 D23 VMA_DM2 VMB_DQ20 P5 DQB0_20 WCKB0B_1/DQMB_3 T5 VMB_DM3
VMA_DQ20 F24 DQA0_20 WCKA0B_1/DQMA_3 E22 VMA_DM3 VMB_DQ21 R4 DQB0_21 WCKB1_0/DQMB_4 AE4 VMB_DM4
VMA_DQ21 C24 DQA0_21 WCKA1_0/DQMA_4 C14 VMA_DM4 VMB_DQ22 T6 DQB0_22 WCKB1B_0/DQMB_5 AF5 VMB_DM5
VMA_DQ22 A24 DQA0_22 WCKA1B_0/DQMA_5 A14 VMA_DM5 VMB_DQ23 T1 DQB0_23 WCKB1_1/DQMB_6 AK6 VMB_DM6
VMA_DQ23 E24 DQA0_23 WCKA1_1/DQMA_6 E10 VMA_DM6 VMB_DQ24 U4 DQB0_24 WCKB1B_1/DQMB_7 AK5 VMB_DM7
VMA_DQ24 C22 DQA0_24 WCKA1B_1/DQMA_7 D9 VMA_DM7 VMB_DQ25 V6 DQB0_25
VMA_DQ25 A22 DQA0_25 VMB_DQ26 V1 DQB0_26 EDCB0_0/QSB_0 F6 VMB_RDQS0
VMA_DQ26 F22 DQA0_26 EDCA0_0/QSA_0 C34 VMA_RDQS0 VMB_DQ27 V3 DQB0_27 EDCB0_1/QSB_1 K3 VMB_RDQS1
VMA_DQ27 D21 DQA0_27 EDCA0_1/QSA_1 D29 VMA_RDQS1 VMB_DQ28 Y6 DQB0_28 EDCB0_2/QSB_2 P3 VMB_RDQS2
VMA_DQ28 A20 DQA0_28 EDCA0_2/QSA_2 D25 VMA_RDQS2 VMB_DQ29 Y1 DQB0_29 EDCB0_3/QSB_3 V5 VMB_RDQS3
VMA_DQ29 F20 DQA0_29 EDCA0_3/QSA_3 E20 VMA_RDQS3 VMB_DQ30 Y3 DQB0_30 EDCB1_0/QSB_4 AB5 VMB_RDQS4
VMA_DQ30 D19 DQA0_30 EDCA1_0/QSA_4 E16 VMA_RDQS4 VMB_DQ31 Y5 DQB0_31 EDCB1_1/QSB_5 AH1 VMB_RDQS5
VMA_DQ31 E18 DQA0_31 EDCA1_1/QSA_5 E12 VMA_RDQS5 VMB_DQ32 AA4 DQB1_0 EDCB1_2/QSB_6 AJ9 VMB_RDQS6
VMA_DQ32 C18 DQA1_0 EDCA1_2/QSA_6 J10 VMA_RDQS6 VMB_DQ33 AB6 DQB1_1 EDCB1_3/QSB_7 AM5 VMB_RDQS7
VMA_DQ33 A18 DQA1_1 EDCA1_3/QSA_7 D7 VMA_RDQS7 VMB_DQ34 AB1 DQB1_2
VMA_DQ34 F18 DQA1_2 VMB_DQ35 AB3 DQB1_3 DDBIB0_0/QSB_0B G7 VMB_WDQS0
VMA_DQ35 D17 DQA1_3 DDBIA0_0/QSA_0B A34 VMA_WDQS0 VMB_DQ36 AD6 DQB1_4 DDBIB0_1/QSB_1B K1 VMB_WDQS1
VMA_DQ36 A16 DQA1_4 DDBIA0_1/QSA_1B E30 VMA_WDQS1 VMB_DQ37 AD1 DQB1_5 DDBIB0_2/QSB_2B P1 VMB_WDQS2
VMA_DQ37 F16 DQA1_5 DDBIA0_2/QSA_2B E26 VMA_WDQS2 VMB_DQ38 AD3 DQB1_6 DDBIB0_3/QSB_3B W4 VMB_WDQS3
VMA_DQ38 D15 DQA1_6 DDBIA0_3/QSA_3B C20 VMA_WDQS3 VMB_DQ39 AD5 DQB1_7 DDBIB1_0/QSB_4B AC4 VMB_WDQS4
VMA_DQ39 E14 DQA1_7 DDBIA1_0/QSA_4B C16 VMA_WDQS4 VMB_DQ40 AF1 DQB1_8 DDBIB1_1/QSB_5B AH3 VMB_WDQS5
VMA_DQ40 F14 DQA1_8 DDBIA1_1/QSA_5B C12 VMA_WDQS5 VMB_DQ41 AF3 DQB1_9 DDBIB1_2/QSB_6B AJ8 VMB_WDQS6
VMA_DQ41 D13 DQA1_9 DDBIA1_2/QSA_6B J11 VMA_WDQS6 VMB_DQ42 AF6 DQB1_10 DDBIB1_3/QSB_7B AM3 VMB_WDQS7
VMA_DQ42 F12 DQA1_10 DDBIA1_3/QSA_7B F8 VMA_WDQS7 VMB_DQ43 AG4 DQB1_11
VMA_DQ43 A12 DQA1_11 VMB_DQ44 AH5 DQB1_12 ADBIB0/ODTB0 T7 VMB_ODT0
VMB_ODT0 [30]
VMA_DQ44 D11 DQA1_12 ADBIA0/ODTA0 J21 VMB_DQ45 AH6 DQB1_13 ADBIB1/ODTB1 W7 VMB_ODT1
VMA_ODT0 [29] VMB_ODT1 [30]
VMA_DQ45 F10 DQA1_13 ADBIA1/ODTA1 G19 VMB_DQ46 AJ4 DQB1_14
A10 VMA_ODT1 [29] AK3 L9
VMA_DQ46 DQA1_14 VMB_DQ47 DQB1_15 CLKB0 VMB_CLK0
VMB_CLK0 [30]
VMA_DQ47 C10 DQA1_15 CLKA0 H27 VMA_CLK0 VMB_DQ48 AF8 DQB1_16 CLKB0B L8 VMB_CLK0#
G13 G27 VMA_CLK0# VMA_CLK0 [29] AF9 VMB_CLK0# [30]
VMA_DQ48 DQA1_16 CLKA0B VMB_DQ49 DQB1_17
VMA_CLK0# [29]
VMA_DQ49 H13 DQA1_17 VMB_DQ50 AG8 DQB1_18 CLKB1 AD8 VMB_CLK1
VMB_CLK1 [30]
VMA_DQ50 J13 DQA1_18 CLKA1 J14 VMA_CLK1 VMB_DQ51 AG7 DQB1_19 CLKB1B AD7 VMB_CLK1#
H11 H14 VMA_CLK1# VMA_CLK1 [29] AK9 VMB_CLK1# [30]
VMA_DQ51 DQA1_19 CLKA1B VMB_DQ52 DQB1_20
VMA_CLK1# [29]
VMA_DQ52 G10 DQA1_20 VMB_DQ53 AL7 DQB1_21 RASB0B T10 VMB_RAS0#
G8 K23 VMA_RAS0# AM8 Y10 VMB_RAS1# VMB_RAS0# [30]
Place MVREF dividers and Caps close to ASIC VMA_DQ53 DQA1_21 RASA0B VMB_DQ54 DQB1_22 RASB1B
VMA_RAS0# [29] VMB_RAS1# [30]
VMA_DQ54 K9 DQA1_22 RASA1B K19 VMA_RAS1# VMB_DQ55 AM7 DQB1_23
VMA_RAS1# [29]
VMA_DQ55 K10 DQA1_23 VMB_DQ56 AK1 DQB1_24 CASB0B W10 VMB_CAS0#
G9 K20 VMA_CAS0# AL4 AA10 VMB_CAS1# VMB_CAS0# [30]
VMA_DQ56 DQA1_24 CASA0B VMB_DQ57 DQB1_25 CASB1B
VMA_CAS0# [29] VMB_CAS1# [30]
+1.35V_GFX VMA_DQ57 A8 DQA1_25 CASA1B K17 VMA_CAS1# +1.35V_GFX VMB_DQ58 AM6 DQB1_26
C8 VMA_CAS1# [29] AM1 P10 VMB_CS0#
VMA_DQ58 DQA1_26 VMB_DQ59 DQB1_27 CSB0B_0
VMB_CS0# [30]
(0.7*VDDR1) VMA_DQ59 E8 DQA1_27 CSA0B_0 K24 VMA_CS0# (0.7*VDDR1) VMB_DQ60 AN4 DQB1_28 CSB0B_1 L10
VMA_CS0# [29]
VMA_DQ60 A6 DQA1_28 CSA0B_1 K27 VMB_DQ61 AP3 DQB1_29
VMA_DQ61 C6 DQA1_29 VMB_DQ62 AP1 DQB1_30 CSB1B_0 AD10 VMB_CS1#
VMB_CS1# [30]
R229 VMA_DQ62 E6 DQA1_30 CSA1B_0 M13 VMA_CS1# R45 VMB_DQ63 AP5 DQB1_31 CSB1B_1 AC10
A5 K16 VMA_CS1# [29]
40.2/F_4 VMA_DQ63 DQA1_31 CSA1B_1 40.2/F_4
CKEB0 U10 VMB_CKE0
VMB_CKE0 [30]
MVREFDA L18 MVREFDA CKEA0 K21 VMA_CKE0 MVREFDB Y12 MVREFDB CKEB1 AA11 VMB_CKE1
L20 J20 VMA_CKE1 VMA_CKE0 [29] AA12 VMB_CKE1 [30]
MVREFSA MVREFSA CKEA1 MVREFSB MVREFSB
VMA_CKE1 [29]
WEB0B N10 VMB_WE0#
L27 K26 VMA_WE0# AB11 VMB_WE1# VMB_WE0# [30]
NC_MEM_CALRN0 WEA0B WEB1B
VMA_WE0# [29] VMB_WE1# [30]
R230 C445 N12 NC_MEM_CALRN1 WEA1B L15 VMA_WE1# R54 C114
VMA_WE1# [29]
100/F_4 1u/6.3V_4 AG12 NC_MEM_CALRN2 100/F_4 1u/6.3V_4
MAB0_8/MAB_13 T8 VMB_MA13
M12 NC_MEM_CALRP1 MAA0_8/MAA_13 H23 VMA_MA13 MAB1_8/MAB_14 W8 VMB_MA14
R18 EV_SP@120/F_4 M27 MEM_CALRP0 MAA1_8/MAA_14 J19 VMA_MA14 MAB0_9/MAB_15 U12 VMB_MA15
AH12 MEM_CALRP2 MAA0_9/MAA_15 M21 VMA_MA15 MAB1_9/RSVD V12
MAA1_9/RSVD M20
+1.35V_GFX +1.35V_GFX DRAM_RST AH11 GPU_DRAM_RST
(0.7*VDDR1) (0.7*VDDR1)
100-CG2491(216-0855000)
R224 R47
40.2/F_4 100-CG2491(216-0855000) 40.2/F_4
R225 C444 R60 C133

100/F_4 1u/6.3V_4 100/F_4 1u/6.3V_4
25mm (max) 5mm (max) 25mm (max)
Place MVREF dividers and Caps close to ASIC

GPU_DRAM_RST R128 10/F_4 R131 51/F_4
MEM_RST# [29,30]
C260
R120
4.99K/F_4 120p/50V_4
Place all these componets very close to GPU (within 25mm)

and keep all components close to each other
** This basic topology should be used for DRAM_RAT for DDR3/GDDR5
These Capacitors and Resistor values arre an example only

The series R and || cap values will depend on the DRAM loads
and will have to be calculated for differrent Memory, DRAM loads and board
to pass Reset Signal Spec

PROJECT : AM6
A
Opal_XT/MEM Interface
5 4 3 2 1
[28]
f ix
VMA_DQ[63..0]
VMA_DQ[63..0]
CHANNEL A: 2GB DDR3L (256Mb*16*4pcs)
ina
VMA_RDQS[7..0]
[28] VMA_RDQS[7..0]
VMA_WDQS[7..0]
v
[28] VMA_WDQS[7..0]
VMA_MA[15..0]
[28] VMA_MA[15..0]
U12 U1
VMA_DM[7..0] U0 U11
[28] VMA_DM[7..0]
VREFC_VMA3 M8 E3 VMA_DQ49 VREFC_VMA4 M8 E3 VMA_DQ60
VREFC_VMA1 M8 E3 VMA_DQ14 VREFC_VMA2 M8 E3 VMA_DQ25 VREFD_VMA3 H1 VREFCA DQL0 F7 VMA_DQ53 VREFD_VMA4 H1 VREFCA DQL0 F7 VMA_DQ59
VREFD_VMA1 H1 VREFCA DQL0 F7 VMA_DQ8 VREFD_VMA2 H1 VREFCA DQL0 F7 VMA_DQ30 VREFDQ DQL1 F2 VMA_DQ51 VREFDQ DQL1 F2 VMA_DQ63
VREFDQ DQL1 F2 VMA_DQ15 VREFDQ DQL1 F2 VMA_DQ24 VMA_MA0 N3 DQL2 F8 VMA_DQ55 VMA_MA0 N3 DQL2 F8 VMA_DQ58
VMA_MA0 N3 DQL2 F8 VMA_DQ10 VMA_MA0 N3 DQL2 F8 VMA_DQ29 VMA_MA1 P7 A0 DQL3 H3 VMA_DQ48 VMA_MA1 P7 A0 DQL3 H3 VMA_DQ62
VMA_MA1 P7 A0 DQL3 H3 VMA_DQ13 VMA_MA1 P7 A0 DQL3 H3 VMA_DQ26 VMA_MA2 P3 A1 DQL4 H8 VMA_DQ54 VMA_MA2 P3 A1 DQL4 H8 VMA_DQ56
VMA_MA2 P3 A1 DQL4 H8 VMA_DQ9 VMA_MA2 P3 A1 DQL4 H8 VMA_DQ31 VMA_MA3 N2 A2 DQL5 G2 VMA_DQ50 VMA_MA3 N2 A2 DQL5 G2 VMA_DQ61
VMA_MA3 N2 A2 DQL5 G2 VMA_DQ12 VMA_MA3 N2 A2 DQL5 G2 VMA_DQ27 VMA_MA4 P8 A3 DQL6 H7 VMA_DQ52 VMA_MA4 P8 A3 DQL6 H7 VMA_DQ57
D
VMA_MA4 P8 A3 DQL6 H7 VMA_DQ11 VMA_MA4 P8 A3 DQL6 H7 VMA_DQ28 VMA_MA5 P2 A4 DQL7 VMA_MA5 P2 A4 DQL7 D
VMA_MA5 P2 A4 DQL7 VMA_MA5 P2 A4 DQL7 VMA_MA6 R8 A5 VMA_MA6 R8 A5
VMA_MA6 R8 A5 VMA_MA6 R8 A5 VMA_MA7 R2 A6 D7 VMA_DQ37 VMA_MA7 R2 A6 D7 VMA_DQ40
VMA_MA7 R2 A6 D7 VMA_DQ1 VMA_MA7 R2 A6 D7 VMA_DQ20 VMA_MA8 T8 A7 DQU0 C3 VMA_DQ32 VMA_MA8 T8 A7 DQU0 C3 VMA_DQ46
VMA_MA8 T8 A7 DQU0 C3 VMA_DQ7 VMA_MA8 T8 A7 DQU0 C3 VMA_DQ19 VMA_MA9 R3 A8 DQU1 C8 VMA_DQ39 VMA_MA9 R3 A8 DQU1 C8 VMA_DQ42
VMA_MA9 R3 A8 DQU1 C8 VMA_DQ0 VMA_MA9 R3 A8 DQU1 C8 VMA_DQ23 VMA_MA10 L7 A9 DQU2 C2 VMA_DQ34 VMA_MA10 L7 A9 DQU2 C2 VMA_DQ44
VMA_MA10 L7 A9 DQU2 C2 VMA_DQ4 VMA_MA10 L7 A9 DQU2 C2 VMA_DQ17 VMA_MA11 R7 A10/AP DQU3 A7 VMA_DQ36 VMA_MA11 R7 A10/AP DQU3 A7 VMA_DQ43
VMA_MA11 R7 A10/AP DQU3 A7 VMA_DQ3 VMA_MA11 R7 A10/AP DQU3 A7 VMA_DQ22 VMA_MA12 N7 A11 DQU4 A2 VMA_DQ33 VMA_MA12 N7 A11 DQU4 A2 VMA_DQ45
VMA_MA12 N7 A11 DQU4 A2 VMA_DQ6 VMA_MA12 N7 A11 DQU4 A2 VMA_DQ16 VMA_MA13 T3 A12/BC DQU5 B8 VMA_DQ38 VMA_MA13 T3 A12/BC DQU5 B8 VMA_DQ41
VMA_MA13 T3 A12/BC DQU5 B8 VMA_DQ2 VMA_MA13 T3 A12/BC DQU5 B8 VMA_DQ21 VMA_MA14 T7 A13 DQU6 A3 VMA_DQ35 VMA_MA14 T7 A13 DQU6 A3 VMA_DQ47
VMA_MA14 T7 A13 DQU6 A3 VMA_DQ5 VMA_MA14 T7 A13 DQU6 A3 VMA_DQ18 VMA_MA15 M7 A14 DQU7 VMA_MA15 M7 A14 DQU7
VMA_MA15 M7 A14 DQU7 VMA_MA15 M7 A14 DQU7 A15 +1.35V_GFX A15 +1.35V_GFX
A15 +1.35V_GFX A15 +1.35V_GFX
VMA_BA0 M2 B2 VMA_BA0 M2 B2
VMA_BA0 M2 B2 VMA_BA0 M2 B2 VMA_BA1 N8 BA0 VDD#B2 D9 VMA_BA1 N8 BA0 VDD#B2 D9
[28] VMA_BA0 BA0 VDD#B2 BA0 VDD#B2 BA1 VDD#D9 BA1 VDD#D9
VMA_BA1 N8 D9 VMA_BA1 N8 D9 VMA_BA2 M3 G7 VMA_BA2 M3 G7
[28] VMA_BA1 BA1 VDD#D9 BA1 VDD#D9 BA2 VDD#G7 BA2 VDD#G7
VMA_BA2 M3 G7 VMA_BA2 M3 G7 K2 K2
[28] VMA_BA2 BA2 VDD#G7 BA2 VDD#G7 VDD#K2 VDD#K2
K2 K2 K8 K8
VDD#K2 K8 VDD#K2 K8 VDD#K8 N1 VDD#K8 N1
VDD#K8 N1 VDD#K8 N1 VMA_CLK1 J7 VDD#N1 N9 VMA_CLK1 J7 VDD#N1 N9
VDD#N1 VDD#N1 [28] VMA_CLK1 CK VDD#N9 CK VDD#N9
VMA_CLK0 J7 N9 VMA_CLK0 J7 N9 VMA_CLK1# K7 R1 VMA_CLK1# K7 R1
[28] VMA_CLK0 CK VDD#N9 CK VDD#N9 [28] VMA_CLK1# CK VDD#R1 CK VDD#R1
VMA_CLK0# K7 R1 VMA_CLK0# K7 R1 VMA_CKE1 K9 R9 VMA_CKE1 K9 R9
[28] VMA_CLK0# CK VDD#R1 CK VDD#R1 [28] VMA_CKE1 CKE VDD#R9 CKE VDD#R9
VMA_CKE0 K9 R9 VMA_CKE0 K9 R9 +1.35V_GFX +1.35V_GFX
[28] VMA_CKE0 CKE VDD#R9 CKE VDD#R9
+1.35V_GFX +1.35V_GFX
VMA_ODT1 K1 A1 VMA_ODT1 K1 A1
[28] VMA_ODT1 ODT VDDQ#A1 ODT VDDQ#A1
VMA_ODT0 K1 A1 VMA_ODT0 K1 A1 VMA_CS1# L2 A8 VMA_CS1# L2 A8
[28] VMA_ODT0 ODT VDDQ#A1 ODT VDDQ#A1 [28] VMA_CS1# CS VDDQ#A8 CS VDDQ#A8
VMA_CS0# L2 A8 VMA_CS0# L2 A8 VMA_RAS1# J3 C1 VMA_RAS1# J3 C1
[28] VMA_CS0# CS VDDQ#A8 CS VDDQ#A8 [28] VMA_RAS1# RAS VDDQ#C1 RAS VDDQ#C1
VMA_RAS0# J3 C1 VMA_RAS0# J3 C1 VMA_CAS1# K3 C9 VMA_CAS1# K3 C9
[28] VMA_RAS0# RAS VDDQ#C1 RAS VDDQ#C1 [28] VMA_CAS1# CAS VDDQ#C9 CAS VDDQ#C9
VMA_CAS0# K3 C9 VMA_CAS0# K3 C9 VMA_WE1# L3 D2 VMA_WE1# L3 D2
[28] VMA_CAS0# CAS VDDQ#C9 CAS VDDQ#C9 [28] VMA_WE1# WE VDDQ#D2 WE VDDQ#D2
VMA_WE0# L3 D2 VMA_WE0# L3 D2 E9 E9
[28] VMA_WE0# WE VDDQ#D2 WE VDDQ#D2 VDDQ#E9 VDDQ#E9
E9 E9 F1 F1
VDDQ#E9 F1 VDDQ#E9 F1 VMA_RDQS6 F3 VDDQ#F1 H2 VMA_RDQS7 F3 VDDQ#F1 H2
VMA_RDQS1 F3 VDDQ#F1 H2 VMA_RDQS3 F3 VDDQ#F1 H2 VMA_RDQS4 C7 DQSL VDDQ#H2 H9 VMA_RDQS5 C7 DQSL VDDQ#H2 H9
VMA_RDQS0 C7 DQSL VDDQ#H2 H9 VMA_RDQS2 C7 DQSL VDDQ#H2 H9 DQSU VDDQ#H9 DQSU VDDQ#H9
DQSU VDDQ#H9 DQSU VDDQ#H9
VMA_DM6 E7 A9 VMA_DM7 E7 A9
VMA_DM1 E7 A9 VMA_DM3 E7 A9 VMA_DM4 D3 DML VSS#A9 B3 VMA_DM5 D3 DML VSS#A9 B3
C VMA_DM0 D3 DML VSS#A9 B3 VMA_DM2 D3 DML VSS#A9 B3 DMU VSS#B3 E1 DMU VSS#B3 E1 C
DMU VSS#B3 E1 DMU VSS#B3 E1 VSS#E1 G8 VSS#E1 G8
VSS#E1 G8 VSS#E1 G8 VMA_WDQS6 G3 VSS#G8 J2 VMA_WDQS7 G3 VSS#G8 J2
VMA_WDQS1 G3 VSS#G8 J2 VMA_WDQS3 G3 VSS#G8 J2 VMA_WDQS4 B7 DQSL VSS#J2 J8 VMA_WDQS5 B7 DQSL VSS#J2 J8
VMA_WDQS0 B7 DQSL VSS#J2 J8 VMA_WDQS2 B7 DQSL VSS#J2 J8 DQSU VSS#J8 M1 DQSU VSS#J8 M1
DQSU VSS#J8 M1 DQSU VSS#J8 M1 VSS#M1 M9 VSS#M1 M9
VSS#M1 M9 VSS#M1 M9 VSS#M9 P1 VSS#M9 P1
VSS#M9 P1 VSS#M9 P1 MEM_RST# T2 VSS#P1 P9 MEM_RST# T2 VSS#P1 P9
MEM_RST# T2 VSS#P1 P9 MEM_RST# T2 VSS#P1 P9 RESET VSS#P9 T1 RESET VSS#P9 T1
[28,30] MEM_RST# RESET VSS#P9 RESET VSS#P9 VSS#T1 VSS#T1
T1 T1 VMA_ZQ3 L8 T9 VMA_ZQ4 L8 T9
VMA_ZQ1 L8 VSS#T1 T9 VMA_ZQ2 L8 VSS#T1 T9 ZQ VSS#T9 ZQ VSS#T9
ZQ VSS#T9 ZQ VSS#T9
B1 B1
B1 B1 VSSQ#B1 B9 VSSQ#B1 B9
VSSQ#B1 B9 VSSQ#B1 B9 R209 VSSQ#B9 D1 R215 VSSQ#B9 D1
R0 VSSQ#B9 D1 R220 VSSQ#B9 D1 243/F_4 VSSQ#D1 D8 243/F_4 VSSQ#D1 D8
243/F_4 VSSQ#D1 D8 243/F_4 VSSQ#D1 D8 VSSQ#D8 E2 VSSQ#D8 E2
VSSQ#D8 E2 VSSQ#D8 E2 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8
Default J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 Default L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1
H AKD5PGWTW11 J9 NC#L1
NC#J9
VSSQ#F9
VSSQ#G1
G1 J9 NC#L1
NC#J9
VSSQ#F9
VSSQ#G1
G1 H AKD5PGWTW11 L9 NC#J9
NC#L9
VSSQ#G1
VSSQ#G9
G9 L9 NC#J9
NC#L9
VSSQ#G1
VSSQ#G9
G9
L9 G9 L9 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 100-BALL 100-BALL
M AKD5PZSTL02 100-BALL 100-BALL M AKD5PZSTL02 SDRAM DDR3 SDRAM DDR3
SDRAM DDR3 Default SDRAM DDR3 H5TC4G63AFR-11C H5TC4G63AFR-11C
H5TC4G63AFR-11C H5TC4G63AFR-11C
S AKD5PGWT500 S AKD5PGWT500
Group-A0 VREF Group-A1 VREF

+1.35V_GFX +1.35V_GFX +1.35V_GFX +1.35V_GFX
B B
R2 R218 R212 R203
4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 R207 R217 R213 R3
4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4
VREFC_VMA1 VREFD_VMA1 VREFC_VMA2 VREFD_VMA2

VREFC_VMA3 VREFD_VMA3 VREFC_VMA4 VREFD_VMA4
R1 C5 R219 C438 R221 C439 R204 C409

R208 C416 R216 C435 R214 C434 R4 C11
4.99K/F_4 0.1u/16V_4 4.99K/F_4 0.1u/16V_4 4.99K/F_4 0.1u/16V_4 4.99K/F_4 0.1u/16V_4
Group-A0 decoupling CAP Group-A1 decoupling CAP

MEM_A0 CLK
MEM_A1 CLK
+1.35V_GFX +1.35V_GFX
VMA_CLK0 VMA_CLK1
VMA_CLK0# VMA_CLK1#
C412 C21 C414 C24 C423 C421 C410 C407 C9 C436 C440 C14 C4 C22 C415 C424
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
R206 R205
40.2/F_4 40.2/F_4 R210 R211
40.2/F_4 40.2/F_4
+1.35V_GFX +1.35V_GFX
C411
0.01U/16V_4 C413 C38 C44 C23 C408 C3 C433 C429 C422 C430 C42 C7 C437 C441 C13 C12 C417
A 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 0.01U/16V_4 A
+1.35V_GFX +1.35V_GFX
C16 C418 C20 C406 C419 C1 C404 C420 C2 C405

4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 Quanta Computer Inc.
PROJECT : AM6
A
Opal_XT/VRAM_A
5 4 3 2 1
5 4 3 2 1
f ix VMB_DQ[63..0]
CHANNEL B: 2GB DDR3L (256Mb*16*4pcs)
ina
[28] VMB_DQ[63..0]
VMB_RDQS[7..0]
[28] VMB_RDQS[7..0]
v
VMB_WDQS[7..0]
[28] VMB_WDQS[7..0]
VMB_MA[15..0]
[28] VMB_MA[15..0]
VMB_DM[7..0] U13 U3 U6 U16
[28] VMB_DM[7..0]
VREFC_VMB1 M8 E3 VMB_DQ18 VREFC_VMB2 M8 E3 VMB_DQ11 VREFC_VMB3 M8 E3 VMB_DQ53 VREFC_VMB4 M8 E3 VMB_DQ58
VREFD_VMB1 H1 VREFCA DQL0 F7 VMB_DQ21 VREFD_VMB2 H1 VREFCA DQL0 F7 VMB_DQ12 VREFD_VMB3 H1 VREFCA DQL0 F7 VMB_DQ50 VREFD_VMB4 H1 VREFCA DQL0 F7 VMB_DQ61
VREFDQ DQL1 F2 VMB_DQ16 VREFDQ DQL1 F2 VMB_DQ15 VREFDQ DQL1 F2 VMB_DQ54 VREFDQ DQL1 F2 VMB_DQ59
VMB_MA0 N3 DQL2 F8 VMB_DQ20 VMB_MA0 N3 DQL2 F8 VMB_DQ8 VMB_MA0 N3 DQL2 F8 VMB_DQ49 VMB_MA0 N3 DQL2 F8 VMB_DQ60
VMB_MA1 P7 A0 DQL3 H3 VMB_DQ19 VMB_MA1 P7 A0 DQL3 H3 VMB_DQ14 VMB_MA1 P7 A0 DQL3 H3 VMB_DQ55 VMB_MA1 P7 A0 DQL3 H3 VMB_DQ57
VMB_MA2 P3 A1 DQL4 H8 VMB_DQ22 VMB_MA2 P3 A1 DQL4 H8 VMB_DQ9 VMB_MA2 P3 A1 DQL4 H8 VMB_DQ48 VMB_MA2 P3 A1 DQL4 H8 VMB_DQ63
VMB_MA3 N2 A2 DQL5 G2 VMB_DQ17 VMB_MA3 N2 A2 DQL5 G2 VMB_DQ13 VMB_MA3 N2 A2 DQL5 G2 VMB_DQ52 VMB_MA3 N2 A2 DQL5 G2 VMB_DQ56
D
VMB_MA4 P8 A3 DQL6 H7 VMB_DQ23 VMB_MA4 P8 A3 DQL6 H7 VMB_DQ10 VMB_MA4 P8 A3 DQL6 H7 VMB_DQ51 VMB_MA4 P8 A3 DQL6 H7 VMB_DQ62 D
VMB_MA5 P2 A4 DQL7 VMB_MA5 P2 A4 DQL7 VMB_MA5 P2 A4 DQL7 VMB_MA5 P2 A4 DQL7
VMB_MA6 R8 A5 VMB_MA6 R8 A5 VMB_MA6 R8 A5 VMB_MA6 R8 A5
VMB_MA7 R2 A6 D7 VMB_DQ30 VMB_MA7 R2 A6 D7 VMB_DQ2 VMB_MA7 R2 A6 D7 VMB_DQ41 VMB_MA7 R2 A6 D7 VMB_DQ38
VMB_MA8 T8 A7 DQU0 C3 VMB_DQ26 VMB_MA8 T8 A7 DQU0 C3 VMB_DQ5 VMB_MA8 T8 A7 DQU0 C3 VMB_DQ46 VMB_MA8 T8 A7 DQU0 C3 VMB_DQ32
VMB_MA9 R3 A8 DQU1 C8 VMB_DQ29 VMB_MA9 R3 A8 DQU1 C8 VMB_DQ0 VMB_MA9 R3 A8 DQU1 C8 VMB_DQ42 VMB_MA9 R3 A8 DQU1 C8 VMB_DQ36
VMB_MA10 L7 A9 DQU2 C2 VMB_DQ25 VMB_MA10 L7 A9 DQU2 C2 VMB_DQ7 VMB_MA10 L7 A9 DQU2 C2 VMB_DQ44 VMB_MA10 L7 A9 DQU2 C2 VMB_DQ33
VMB_MA11 R7 A10/AP DQU3 A7 VMB_DQ28 VMB_MA11 R7 A10/AP DQU3 A7 VMB_DQ3 VMB_MA11 R7 A10/AP DQU3 A7 VMB_DQ40 VMB_MA11 R7 A10/AP DQU3 A7 VMB_DQ37
VMB_MA12 N7 A11 DQU4 A2 VMB_DQ24 VMB_MA12 N7 A11 DQU4 A2 VMB_DQ6 VMB_MA12 N7 A11 DQU4 A2 VMB_DQ45 VMB_MA12 N7 A11 DQU4 A2 VMB_DQ35
VMB_MA13 T3 A12/BC DQU5 B8 VMB_DQ31 VMB_MA13 T3 A12/BC DQU5 B8 VMB_DQ1 VMB_MA13 T3 A12/BC DQU5 B8 VMB_DQ43 VMB_MA13 T3 A12/BC DQU5 B8 VMB_DQ39
VMB_MA14 T7 A13 DQU6 A3 VMB_DQ27 VMB_MA14 T7 A13 DQU6 A3 VMB_DQ4 VMB_MA14 T7 A13 DQU6 A3 VMB_DQ47 VMB_MA14 T7 A13 DQU6 A3 VMB_DQ34
VMB_MA15 M7 A14 DQU7 VMB_MA15 M7 A14 DQU7 VMB_MA15 M7 A14 DQU7 VMB_MA15 M7 A14 DQU7
A15 +1.35V_GFX A15 +1.35V_GFX A15 +1.35V_GFX A15 +1.35V_GFX
VMB_BA0 M2 B2 VMB_BA0 M2 B2 VMB_BA0 M2 B2 VMB_BA0 M2 B2

[28] VMB_BA0 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2
VMB_BA1 N8 D9 VMB_BA1 N8 D9 VMB_BA1 N8 D9 VMB_BA1 N8 D9
[28] VMB_BA1 M3 BA1 VDD#D9 G7 M3 BA1 VDD#D9 G7 M3 BA1 VDD#D9 G7 M3 BA1 VDD#D9 G7
VMB_BA2 VMB_BA2 VMB_BA2 VMB_BA2
[28] VMB_BA2 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
K2 K2 K2 K2
VDD#K2 K8 VDD#K2 K8 VDD#K2 K8 VDD#K2 K8
VDD#K8 N1 VDD#K8 N1 VDD#K8 N1 VDD#K8 N1
VMB_CLK0 J7 VDD#N1 N9 VMB_CLK0 J7 VDD#N1 N9 VMB_CLK1 J7 VDD#N1 N9 VMB_CLK1 J7 VDD#N1 N9
[28] VMB_CLK0 K7 CK VDD#N9 R1 K7 CK VDD#N9 R1 [28] VMB_CLK1 K7 CK VDD#N9 R1 K7 CK VDD#N9 R1
VMB_CLK0# VMB_CLK0# VMB_CLK1# VMB_CLK1#
[28] VMB_CLK0# CK VDD#R1 CK VDD#R1 [28] VMB_CLK1# CK VDD#R1 CK VDD#R1
VMB_CKE0 K9 R9 VMB_CKE0 K9 R9 VMB_CKE1 K9 R9 VMB_CKE1 K9 R9
[28] VMB_CKE0 CKE VDD#R9 CKE VDD#R9 [28] VMB_CKE1 CKE VDD#R9 CKE VDD#R9
VMB_ODT0 K1 A1 VMB_ODT0 K1 A1 VMB_ODT1 K1 A1 VMB_ODT1 K1 A1

[28] VMB_ODT0 L2 ODT VDDQ#A1 A8 L2 ODT VDDQ#A1 A8 [28] VMB_ODT1 L2 ODT VDDQ#A1 A8 L2 ODT VDDQ#A1 A8
VMB_CS0# VMB_CS0# VMB_CS1# VMB_CS1#
[28] VMB_CS0# CS VDDQ#A8 CS VDDQ#A8 [28] VMB_CS1# CS VDDQ#A8 CS VDDQ#A8
VMB_RAS0# J3 C1 VMB_RAS0# J3 C1 VMB_RAS1# J3 C1 VMB_RAS1# J3 C1
[28] VMB_RAS0# K3 RAS VDDQ#C1 C9 K3 RAS VDDQ#C1 C9 [28] VMB_RAS1# K3 RAS VDDQ#C1 C9 K3 RAS VDDQ#C1 C9
VMB_CAS0# VMB_CAS0# VMB_CAS1# VMB_CAS1#
[28] VMB_CAS0# CAS VDDQ#C9 CAS VDDQ#C9 [28] VMB_CAS1# CAS VDDQ#C9 CAS VDDQ#C9
VMB_WE0# L3 D2 VMB_WE0# L3 D2 VMB_WE1# L3 D2 VMB_WE1# L3 D2
[28] VMB_WE0# WE VDDQ#D2 WE VDDQ#D2 [28] VMB_WE1# WE VDDQ#D2 WE VDDQ#D2
E9 E9 E9 E9
VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1
VMB_RDQS2 F3 VDDQ#F1 H2 VMB_RDQS1 F3 VDDQ#F1 H2 VMB_RDQS6 F3 VDDQ#F1 H2 VMB_RDQS7 F3 VDDQ#F1 H2
VMB_RDQS3 C7 DQSL VDDQ#H2 H9 VMB_RDQS0 C7 DQSL VDDQ#H2 H9 VMB_RDQS5 C7 DQSL VDDQ#H2 H9 VMB_RDQS4 C7 DQSL VDDQ#H2 H9
DQSU VDDQ#H9 DQSU VDDQ#H9 DQSU VDDQ#H9 DQSU VDDQ#H9
VMB_DM2 E7 A9 VMB_DM1 E7 A9 VMB_DM6 E7 A9 VMB_DM7 E7 A9

VMB_DM3 D3 DML VSS#A9 B3 VMB_DM0 D3 DML VSS#A9 B3 VMB_DM5 D3 DML VSS#A9 B3 VMB_DM4 D3 DML VSS#A9 B3
C C
DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1
VSS#E1 G8 VSS#E1 G8 VSS#E1 G8 VSS#E1 G8
VMB_WDQS2 G3 VSS#G8 J2 VMB_WDQS1 G3 VSS#G8 J2 VMB_WDQS6 G3 VSS#G8 J2 VMB_WDQS7 G3 VSS#G8 J2
VMB_WDQS3 B7 DQSL VSS#J2 J8 VMB_WDQS0 B7 DQSL VSS#J2 J8 VMB_WDQS5 B7 DQSL VSS#J2 J8 VMB_WDQS4 B7 DQSL VSS#J2 J8
DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1
VSS#M1 M9 VSS#M1 M9 VSS#M1 M9 VSS#M1 M9
VSS#M9 P1 VSS#M9 P1 VSS#M9 P1 VSS#M9 P1
MEM_RST# T2 VSS#P1 P9 MEM_RST# T2 VSS#P1 P9 MEM_RST# T2 VSS#P1 P9 MEM_RST# T2 VSS#P1 P9
[28,29] MEM_RST# RESET VSS#P9 T1 RESET VSS#P9 T1 RESET VSS#P9 T1 RESET VSS#P9 T1
VMB_ZQ1 L8 VSS#T1 T9 VMB_ZQ2 L8 VSS#T1 T9 VMB_ZQ3 L8 VSS#T1 T9 VMB_ZQ4 L8 VSS#T1 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9
B1 B1 B1 B1
VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9
R244 VSSQ#B9 D1 R10 VSSQ#B9 D1 R63 VSSQ#B9 D1 R272 VSSQ#B9 D1
243/F_4 VSSQ#D1 D8 243/F_4 VSSQ#D1 D8 243/F_4 VSSQ#D1 D8 243/F_4 VSSQ#D1 D8
VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2
J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8
L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1
Default L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
H AKD5PGWTW11 100-BALL 100-BALL Default 100-BALL 100-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
H5TC4G63AFR-11C H5TC4G63AFR-11C H AKD5PGWTW11 H5TC4G63AFR-11C H5TC4G63AFR-11C
M AKD5PZSTL02
S AKD5PGWT500 BOT Down TOP Down
M AKD5PZSTL02
TOP Up BOT Up
S AKD5PGWT500
Group-B1 VREF
Group-B0 VREF
B B
R251 R98 R253 R65

R25 R223 R24 R16 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4
4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4
VREFC_VMB3 VREFD_VMB3 VREFC_VMB4 VREFD_VMB4

VREFC_VMB1 VREFD_VMB1 VREFC_VMB2 VREFD_VMB2
R252 C475 R91 C206 R261 C478 R66 C150

R26 C75 R222 C443 R17 C60 R12 C58
Group-B0 decoupling CAP Group-B1 decoupling CAP

MEM_B0 CLK MEM_B1 CLK
+1.35V_GFX +1.35V_GFX
VMB_CLK1
VMB_CLK0 C33 C442 C48 C450 C50 C468 C431 C252 C496 C116 C228 C514 C474 C469 C190 VMB_CLK1#
VMB_CLK0# 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
R278 R282
40.2/F_4 40.2/F_4
R228 R226
40.2/F_4 40.2/F_4 +1.35V_GFX +1.35V_GFX
A C46 C427 C465 C35 C428 C55 C45 C432 C513 C503 C505 C493 C501 C466 C497 A
C491
C447 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 0.01U/16V_4
0.01U/16V_4
+1.35V_GFX +1.35V_GFX
C31 C28 C29 C426 C30 C109 C463 C254 C518 C247 Quanta Computer Inc.
4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6
PROJECT : AM6
A
Opal_XT/VRAM_B
5 4 3 2 1
5 4 3 2 1
f ix
vina GS12401-1011P-7H CN7
R422 *0_4_SHORT_NC
41
USBP4+_CN
1 USBP4-_CN USBP4+ [10]
2 USBP4- [10] CAMERA
3 DIGITAL_D2_R R187 0_4 R421 *0_4_SHORT_NC
4 DIGITAL_D1 [34]
DIGITAL_CLK2_R R191 0_4
5 DIGITAL_CLK [34] DMIC
6 +3.3V_RUN
7 +5V_RUN EDP_AUXP_C C571 1 2 0.1U/16V_4 EDP_AUXP
D D
8 DIGITAL_D2_R C342 2 1 10P/50V_4 EDP_AUXN_C C570 1 2 0.1U/16V_4 EDP_AUXN EDP_AUXP [7]
9 DIGITAL_CLK2_R C348 2 1 10P/50V_4 EDP_AUXN [7]
42 10 +LCDVCC
11
12 LCD_TST R413 1 2 0_4
13 LCD_TST [40]
EDP_HPD EDP_HPD [7] EL16
14 EDP_AUXP_C EDP_TXP0_C 1 2 EDP_TXP0_R C562 1 2 0.1U/16V_4 EDP_TXP0
15 EDP_TXP0 [7]
EDP_AUXN_C EDP_TXN0_C 4 3 EDP_TXN0_R C561 1 2 0.1U/16V_4 EDP_TXN0
16 EDP_TXN0 [7]
*DLW 21HN900HQ2L_NC
17 EDP_TXP0_C R412 1 2 0_4
18 EDP_TXN0_C
19 R411 1 2 0_4
20 EDP_TXP1_C EL15
21 EDP_TXN1_C EDP_TXP1_C 1 2 EDP_TXP1_R C560 1 2 0.1U/16V_4 EDP_TXP1
22 EDP_TXP1 [7]
EDP_TXN1_C 4 3 EDP_TXN1_R C559 1 2 0.1U/16V_4 EDP_TXN1
23 EDP_TXN1 [7]
EDP_TXP2_C *DLW 21HN900HQ2L_NC
43 24 EDP_TXN2_C R410 1 2 0_4
25
26 EDP_TXP3_C R409 1 2 0_4
27 EDP_TXN3_C EL14
28 EDP_TXP2_C 1 2 EDP_TXP2_R C558 1 2 0.1U/16V_4 EDP_TXP2
29 EDP_TXP2 [7]
LCD_PW M_IN EDP_TXN2_C 4 3 EDP_TXN2_R C557 1 2 0.1U/16V_4 EDP_TXN2
30 EDP_TXN2 [7]
LCD_BAK_IN *DLW 21HN900HQ2L_NC
31 TPSCR_EN R424 *0_4_SHORT_NC R408 1 2 0_4
32 TPSCR_EN [40]
DCR_EN
33 DCR_EN [9]
USBP5+_TOUCH R407 1 2 0_4
34 USBP5-_TOUCH USBP5+ [10] EL13
35 USBP5- [10] TOUCH SCREEN EDP_TXP3_C 1 2 EDP_TXP3_R C556 1 2 0.1U/16V_4 EDP_TXP3
EDP_TXP3 [7]
C 36 R423 *0_4_SHORT_NC EDP_TXN3_C 4 3 EDP_TXN3_R C555 1 2 0.1U/16V_4 EDP_TXN3 C
37 EDP_TXN3 [7]
*DLW 21HN900HQ2L_NC
38 R406 1 2 0_4
39 +LED_BL
40
44
+3.3V_RUN
+LED_BL +LCDVCC
C583 C575
1
C581 C579
C574 *4.7U/6.3V_6_NC 0.01U/16V_4
0.1U/25V_6 4.7U/6.3V_6 0.1U/16V_4
2
Brightness Control
D7
1
[7] LCD_PW M
3 LCD_PW M_IN +PW R_SRC +LED_BL
LCD_VCC Imax(ratting)=2.8A
1
2
B [40] LCD_PW M_EC B
R193 +3.3V_RUN R420 *0_8_NC
BAT54CW 100K_4 +LCDVCC
U23
4 1
40mil
2
5 IN OUT
IN 40mil
1
2 1 3
3 GND C576
EN 0.1U/16V_4 Q25
2
1
1
C580 G5243A R416 AO3413
2
1
C577
1
0.1U/16V_4 C584
2
100K_4 0.1U/25V_6
BAK_EN
2
D13 0.1U/25V_6
2
1 DP_ENVDD
DP_ENVDD [7]
D5
eDP_BL_EN 1 EN_LCDVCC 3
[7,40] eDP_BL_EN
3 LCD_BAK_IN 2 LCD_TST 2 1
1
2 R403 BAT54CW R414 100K_4

[40] LCD_BAK
2
10K_4
*BAT54CW _NC R199
3
100K_4 R417 10K_4
2
+3.3V_RUN 1 2 2 Q22
R459 0_4 2N7002W
1
1
A A

PROJECT : AM6
A
eDP CONN
5 4 3 2 1
5 4 3 2 1
f ix
ina
+3.3V_RUN +1.5V_RUN
v
+5V_HDMIF1
2
D0 D1
+1.5V_RUN +3.3V_RUN
[7] HDMI_SCL
[7] HDMI_SDA SDM10K45-7-F SDM10K45-7-F
HDMI CN
D D
1
HDMI_DAT_SINK
HDMI_CLK_SINK
+5V_HDMIF1_D
+5V_HDMIF1_D35 CN1
1
ISET
C96 C105 C111 TYPE A
0.1U/16V_4 0.01U/16V_4 0.01U/16V_4 INT_HDMI_TXP2_L 1
2
2
D2+
2 GND
INT_HDMI_TXN2_L 3 D2-
INT_HDMI_TXP1_L 4 D1+
5 22
50
40
39
38
37
36
35
34
33
32
31
1
3
GND
INT_HDMI_TXN1_L 6 D1-
49 INT_HDMI_TXP0_L 7
VDD33
PD#
GND
SDA_SRC
SCL_SRC
GND
VDDRX
SDA_SNK
SCL_SNK
VDDTX
ISET
D0+
GND 48 RP12 8 GND
GND 47 2.2KX2 INT_HDMI_TXN0_L 9
GND INT_HDMI_TXCP_L 10
D0-
CK+
C157 1 2 0.1U/16V_4 INT_HDMI_TXP2_C 1 30 INT_HDMI_TXP2_R 11
[7] INT_HDMI_TXP2
2
4
C147 1 2 0.1U/16V_4 INT_HDMI_TXN2_C 2 IN_D2p OUT_D2p 29 INT_HDMI_TXN2_R INT_HDMI_TXCN_L 12
GND
[7] INT_HDMI_TXN2 IN_D2n OUT_D2n CK-

3 28 HDMI_SINK 13
[7] INT_HDMI_HP
C141 1 2 0.1U/16V_4 INT_HDMI_TXP1_C 4 HPD_SRC +3V HPD_SNK 27 INT_HDMI_TXP1_R 14
CEC
[7] INT_HDMI_TXP1 IN_D1p OUT_D1p RSVD

C136 1 2 0.1U/16V_4 INT_HDMI_TXN1_C 5 26 INT_HDMI_TXN1_R HDMI_CLK_SINK 15 23
[7] INT_HDMI_TXN1 IN_D1n OUT_D1n SCL
C127 1 2 0.1U/16V_4 INT_HDMI_TXP0_C 6 25 INT_HDMI_TXP0_R HDMI_DAT_SINK 16
[7] INT_HDMI_TXP0 IN_D0p OUT_D0p SDA
C117 1 2 0.1U/16V_4 INT_HDMI_TXN0_C 7 24 INT_HDMI_TXN0_R 17
[7] INT_HDMI_TXN0 IN_D0n OUT_D0n GND
8 23 CFG +5V_RUN HDMIF0 1206L110THYR+5V_HDMIF1 18 +5V
C115 1 2 0.1U/16V_4 INT_HDMI_TXCP_C 9 I2C_CTL_EN CFG 22 INT_HDMI_TXCP_R HDMI_SINK 19
[7] INT_HDMI_TXCP IN_CKp OUT_CKp HPD
C112 1 2 0.1U/16V_4 INT_HDMI_TXCN_C 10 21 INT_HDMI_TXCN_R
[7] INT_HDMI_TXCN IN_CKn OUT_CKn
DCIN_EN
DDCBUF
C 41 C
VDDRX
VDDTA
VDDTX
GND GND
REXT
VDD3
42 PS8401A
GND
GND
GND
GND
PRE
43 GND 20
EQ
HMRBL-AK120C
GND 21 DFHS19FR142
hdmi-96-0014-01-19p
11
12
13
14
15
16
17
18
19
20
44
45
46
U5 INT_HDMI_TXP2_R EL3 1 2 EXC24CG900U INT_HDMI_TXP2_L
INT_HDMI_TXN2_R 4 3 INT_HDMI_TXN2_L
+3.3V_RUN +1.5V_RUN +1.5V_RUN
DCIN_EN
DDCBUF
2 4.99K/F_4
PRE
INT_HDMI_TXP1_R EL1 1 2 EXC24CG900U INT_HDMI_TXP1_L
EQ
1
C154 C161
0.1U/16V_4 0.01U/16V_4 C99 C98 C160
2
0.1U/16V_4 0.1U/16V_4 0.1U/16V_4

2
INT_HDMI_TXP0_R EL9 4 3 EXC24CG900U INT_HDMI_TXP0_L
+1.5V_RUN
1
R240
+3.3V_RUN
+1.5V_RUN
INT_HDMI_TXCP_R EL0 1 2 EXC24CG900U INT_HDMI_TXCP_L
INT_HDMI_TXCN_R 4 3 INT_HDMI_TXCN_L
B B
3 Level Input: configuration pin

Int pull-down 150k , 3.3V IO
L:LOW,internal pull down
1 2 CFG L:HDMI ID disable
H:HIGH, external pull up +3.3V_RUN
R51 *4.7K_4_NC
H:HDMI ID enable
M:(VDD3)/2, both external pill-up and pull-down
DC coupling enable
Output pre-emphasis setting Int pull-down 150k , 3.3V IO
+3.3V_RUN 1 2 DCIN_EN L:default,AC coupling input
R33 *4.7K_4_NC L:no pre-emphasis
H:DC coupling input 1 2 PRE
+3.3V_RUN
R31 *4.7K_4_NC
H:1.6dB pre-emphasis
1 2 M:2.5dB pre-emphasis
R37 *4.7K_4_NC
enable active DDC buffer

TMDS output swing adjustment Int pull-down 150k , 3.3V IO
L:default,passive DDC pass-through without internal pull up
1 2 DDCBUF L:default
+3.3V_RUN
R32 *4.7K_4_NC
H:active DDC buffer with internal pull up 1 2 ISET
1 2 M:active DDC buffer without internal pull up +3.3V_RUN
R75 *4.7K_4_NC
H:increase +13%
A A
R38 *4.7K_4_NC 1 2 M:increase -13%
R71 *4.7K_4_NC
Receiver equalization setting

1 2 EQ
+3.3V_RUN L:programmable EQ for channel loss up to 12.4dB
R30 *4.7K_4_NC
1 2 H:programmable EQ for channel loss up to 4.3dB PROJECT : AM6
R36 *4.7K_4_NC M:programmable EQ for channel loss up to 8.6dB Size Document Number Rev
A
HDMI
5 4 3 2 1
5 4 3 2 1
fix H8 H6 H20
ina
*H-C158D158N_NC *H-C158D158N_NC *h-o114x98d114x98n_NC
v Bracket
3
HOLE0
D D
H1 H0 H7 H4
*H-TC236BC197D98P2_NC *H-TC236BC197D98P2_NC *H-TC236BC197D98P2_NC *H-TC236BC197D98P2_NC
1
*intel-CPU-bracket_NC
4
H9
*O-AM6-2_NC
H17
H-TC217BC141D141PT
1
NGFF NUT
1
C C
H10 H11 H3 H14

*h-c236i158d118p2_NC *h-c236i158d118p2_NC *h-c236i158d118p2_NC
*h-c236i158d118p2_NC
NUT
1
H15 H16 H18 H19

H-TC217BC141D141PT H-TC217BC141D141PT H-TC217BC141D141PT H-TC217BC141D141PT
1
H2
*H-TC236BC197D98P2_NC
B B
1
H13
*O-AM6-1_NC
1
A A
H12 H5
*H-C118X98D118X98N_NC *H-C118X98D118X98N_NC Quanta Computer Inc.
PROJECT : AM6
A
Hole
1

5 4 3 2 1
A B C D E
f ix Digital Plane Analog Plane
ina
+5V_RUN L11 FCM1005KF-121T05_500mA +5V_AVDD
v +5V_AVDD
10U/6.3V_6
EMI
4.7U/6.3V_6
C290 C292
1 1U/6.3V_4
1 1U/6.3V_4
2.2U/10V_4
4.7U/6.3V_6 0.1U/16V_4
RING2_C EARP_R1 HPOUT-JD_R EARP_L1 SLEEVE_C
1
R172
LINE1_VREFO_R
+3.3V_RUN
LINE1_VREFO_L
4 4
C554
LDO1_CAP C293
100K_4
1
MIC2-VREFO
CBN C3012
CPVEE C3002
VREF C296
C287 C266 C267 C285 C265
2
HPOUT-R
HPOUT-L
NB_MUTE# MLVG0402220NV05BP MLVG0402220NV05BP MLVG0402220NV05BP MLVG0402220NV05BP MLVG0402220NV05BP
[40] NB_MUTE#
2
L29
2
R175 FCM1005KF-221T03_300MA
*1M_4_NC C304
*1U/6.3V_4_NC
ALC3223 P/N is AL003223001
1
36
35
34
33
32
31
30
29
28
27
26
25
U9 ALC3234 ALC3223
R396 0_4 *0_4_NC
MIC2-VREFO
HP-OUT-L
LINE1-VREFO-L
AVDD1
AVSS1
VREF
CPVEE
LDO1-CAP
CPVDD
CBN
HP-OUT-R
LINE1-VREFO-R
R394 *20K/F_4_NC 20K/F_4
R170 200K_4 39.2K/F
R390 100K_4 *100K_4_NC Universal Audio Jack
CBP 37
CBP LINE2-L
24 R384 *100K_4_NC 100K_4 (ALC3223 supported iPhone/Nokia headset
Q17 *2N7002KDW_NC 2N7002KDW
38 23 , Headphone, Line-In and Microphone)
AVSS2 LINE2-R
C572 10U/6.3V_6 LDO2_CAP 39 22 LINE1_L
C305 10U/6.3V_6 LDO2-CAP LINE1-L MIC2-VREFO R401 2.2K_4
L27 AVDD2 40 21 LINE1_R
+1.5V_RUN AVDD2 LINE1-R
FCM1005KF-221T03_300MA
+5V_RUN R467 1 2 *0_4_SHORT_NC PVDD_3223 41 20 CODEC_PIN20 R396 0_4 +3.3V_ALW R400 2.2K_4 CON0
PVDD1 NC 3
C310
C309 C308 C306
AUD_SPK_L+
AUD_SPK_L-
42
43
SPK-L+ ALC3234 MIC-CAP
19
18
MIC_CAP
SLEEVE
C289 2
Close to codec
1 10U/6.3V_6 HPOUT-L
SLEEVE
R386 22.1/F_6 R462
R463
BLM15HD601SN1D_300MA
BLM15HD601SN1D_300MA
EARP_L1
SLEEVE_C
1
*0.1U/16V_4_NC 0.1U/16V_4 SPK-L- MIC2-R/SLEEVE HPOUT-JD R464 BLM15HD601SN1D_300MA HPOUT-JD_R 5

*10U/6.3V_6_NC 4.7U/6.3V_6
AUD_SPK_R- 44
SPK-R-
MQFN48(6X6) MIC2-L/RING2
17 RING2 Trace width for SLEEVE, RING2: 40mil RING2 R465 BLM15HD601SN1D_300MA RING2_C
3 6 7 3
AUD_SPK_R+ 45 16 HPOUT-R R338 22.1/F_6 R466 BLM15HD601SN1D_300MA EARP_R1 2
SPK-R+ MONO-OUT 4
2
46 15 FRONT-JD R394 *20K/F_4_NC LINE1_VREFO_L R165 4.7K_4
PVDD2 SPDIFO/FRONT JD EC13 EC9 2SJ3080-060111F
GPIO0/DMIC-DATA
GPIO1/DMIC-CLK
NB_MUTE# 47 14 LINE1_VREFO_R R374 4.7K_4 680P/50V_4 680P/50V_4
R170@3223 use 39.2K (CS33922FB15)
1
C307 C303 PDB MIC2/LINE2 JD
48 13 1 2 200K_4
SDATA-OUT
HPOUT-JD_C R170 HPOUT-JD 50 50
2
SPDIFO/GOIO2 HP/LINE1 JD
LDO3-CAP
0.1U/16V_4 R385 R375
SDATA-IN
4.7U/6.3V_6
DVDD-IO
PCBEEP
RESETB
BIT-CLK
49 R390 1 2 100K_4 EC12 EC10
DVDD1
GND +3.3V_RUN 1K_4 1K_4
SYNC
DVSS
680P/50V_4 680P/50V_4
1
50 50
LINE1_L C544 4.7U/6.3V_6
Analog Plane
1
10
11
12
ALC3234-CG
LINE1_R C543 4.7U/6.3V_6
DIGITAL_CLK_C
LDO3_CAP
+3.3V_RUN L25
FCM1005KF-221T03_300MA
AUD_PC_BEEP Digital Plane 0802 Chang R171,R225 P/N to CS24702JB38(4.7k)
C299
C302 0.1U/16V_4
4.7U/6.3V_6 50281-00401-001
[31] DIGITAL_D1
AUD_SPK_R+ R192 2 1 0_6 AUD_SPK_R+_L 4
R174 2 1 22_4 AUD_SPK_R- R188 2 1 0_6 AUD_SPK_R-_L 3 4
[31] DIGITAL_CLK 3
AUD_SPK_L- R189 2 1 0_6 AUD_SPK_L-_L 2
HDA_RST# AUD_SPK_L+ R190 2 1 0_6 AUD_SPK_L+_L 1 2
HDA_RST# [11] 1
L26 +DVDD_IO J1
+3.3V_RUN HDA_SYNC [11]
2
FCM1005KF-221T03_300MA
EC21 EC22
2 C294 AZ_CODEC_SDIN0 R173 1 2 33_4 *100P/50V_4_NC *100P/50V_4_NC 2
1
HDA_SDIN0 [11]
C295 0.1U/16V_4
2
*4.7U/6.3V_6_NC 50 50
HDA_SDOUT [11]
EC23 EC24
AZ_CODEC_BITCLK SR1 1 2 *SR_0402_NC *100P/50V_4_NC *100P/50V_4_NC
HDA_BITCLK [11]
1
1 2
50 50
1
+3.3V_RTC_LDO
C298 C297
*10P/50V_4_NC 4.7U/6.3V_6 +3.3V_ALW
2
1
R384 R383
*100K_4_NC
*100K_4_NC
Q17
2
5
SLEEVE 3 4 SR3 1 2 *SR_0402_NC

R381 1 2 *0_8_NC
R392
R155 1 2 *0_4_NC
HDA_RST# 2 R176 1 2 *0_4_NC
AUD_PC_BEEP C288 BEEP1 R167 1K_4 R415 1 2 *0_4_NC
BEEP [40]
0.1U/16V/X7R_4 6 1
*10K_4_NC
C291 R171 1K_4 ACZ_SPKR [9]
0.1U/16V/X7R_4 C546 *2N7002KDW_NC
1 1
*1U/6.3V_4_NC
1
R168
*10K_4_NC
2

To solve the background noise while combojack PROJECT : AM6
connecting to an active speaker and system entry Size Document Number Rev
A
into S3/S4/S5 without analog power Audio Codec ALC3234
A B C D E
5 4 3 2 1
fix
vina
D D
T0
+V3.3DX_CR +3.3V_RUN
SD_CMD
SD_D2
SD_D3
SD_D5
R137 2 1*SJ_0805_NC
2 1
24
23
22
21
20
19
U7
1
C235
12MHz_In
SP10
SP9
SP8
SP7
SP6
1U/6.3V_4
2
AV18 1 18 SD_CLK_R ER0 22_4 SD_CLK EC6 1 2 22P/50V_4
EL5 DLP11SN900HL2L R112 6.2k/F_4 RREF 2 AV18 SP5 17
1 2 USBP3-_L 3 RREF SP4 16 SDREG C257 1 2 1U/6.3V_4
[10] USBP3- 4 3 USBP3+_L 4 DM RTS5176E-GRT SDREG 15
[10] USBP3+ 5 DP MS_INS# 14 SD_D7 T1
+V3.3DX_CR
6 3V3_IN QFN24 SP3 13 SD_D0
CARD_3V3
C 3V3_IN SP2 C
SD_DAT1
1
SD_CD#
C259 C261
3V3_IN
GPIO
SP1
4.7U/6.3V_6 0.1U/16V_4 25
2
2
E-PAD
7
8
9
10
11
12
+CARD_3V3
SD_CD#
SD_WP
SD_D1
SD / MMC
T2
CARD READER
JCARD0
SD_D2 1
SD_D3 2 DAT2
SD_CMD 3 DAT3
4 CMD
+V3.3DX_CR 5 VSS1
+CARD_3V3 VDD
SD_CLK 6
Place close to 7 CLK
VSS2
8
Connector +CARD_3V3 SD_D0
SD_D1 9 DAT0
DAT1
1
3
SD_W P# 10
B RP6 SD_CD 11 W/P B
12 C/D
10KX2 GND
13
14 GND
C276 15 GND
2
4
C277 GND
Q1
4.7U/6.3V_4 0.1U/16V_4 156-1000302610
5 SD_CD
C/D and W/P are Normal Close
4 3 SD_CD#
2 SD_W P#
1 6 SD_W P
2N7002KDW
A A

PROJECT : AM6
A
Card Reader RTS5176E
5 4 3 2 1
5 4 3 2 1
ix Power Share
af
USB3.0 +USB_SIDE2_PW R
in
vUSB Power share
USB3.0/2.0 COMBO X 1
CN4
USB 3.0
DLW 21HN900HQ2L
USB3.0_RX1- 4 3 +USB_SIDE2_PW R 1 10
[10] USB3.0_RX1- VBUS DET# USB_CHG_DET# [43]
USBP0_BUS_SW_CB0 Mode USB3.0_RX1+ 1 2
[10] USB3.0_RX1+
USBP0-_C 2
EL11 USBP0+_C 3 D- USB2.0
D+
Low DCP, Auto-detect
4
GND
D D
High CDP, BC Spec 1.2 USB3.0_RX1-_C 5
USB3.0_RX1+_C 6 SSRX-
DLW 21HN900HQ2L SSRX+
R337 mA C515 0.1U/16V_4 USB3.0_TX1-_R 4 3 USB3.0_TX1-_C 8 USB 3.0
[10] USB3.0_TX1- SSTX-
C516 0.1U/16V_4 USB3.0_TX1+_R 1 2 USB3.0_TX1+_C 9 11
[10] USB3.0_TX1+ SSTX+ GND 12
EL10 7 GND 13
OC 100k ohm 504 GND GND 14
limitation GND
22.1k ohm 2274 Applied Now YUSB0002-P002A
DFHS10FR157
Current limit = 50250/(R337)

+USB_SIDE2_PW R
close to conn EU1 AZ1045-04F
+5V_ALW USB3.0_RX1-_C 1 10 USB3.0_RX1-_C
100 mil 1- NC
R337 R334 USB3.0_RX1+_C 2 9 USB3.0_RX1+_C
1+ NC
1
22.1K/F_4 78.7K/F_4 C191
C538 1 2 10U/6.3V_8 USB_OC0# C212 0.1U/16V_4 C192 3 8
USB_OC0# [10] GND GND
10U/6.3V_8 150P/50V_4
2
USB3.0_TX1-_C 4 7 USB3.0_TX1-_C
C269 2 1 0.1U/16V_4 17 2- NC
16
15
14
13
U8 +USB_SIDE2_PW R USB3.0_TX1+_C 5 6 USB3.0_TX1+_C
2+ NC
THRMPd
ILIM_L
ILIM_H
GND
C 1 FAULT 12 C
[10] USBP0-
USBP0-
USBP0+
2
3
IN
DM_OUT
OUT
DM_IN
11
10
USBP0-_R
USBP0+_R
ESD Function
Place ESD diodes as close as USB connector.
[10] USBP0+ R141 1 2 *0_4_NC 4 DP_OUT DP_IN 9
ILIM_SEL STATUS USBP0+_C USBP0-_C
R143 1 2 0_4
CTL1
CTL2
CTL3
+5V_ALW +5V_ALW
EN
EL6
1
TPS2546RTER USBP0-_R 1 2 USBP0-_C
1
5
6
7
8
USBP0+_R 4 3 USBP0+_C C249 C248

R335 MLVG04021R0UV18BP MLVG04021R0UV18BP
2
100K_4 DLP11SN900HL2L
[40] USB_BACK_EN
[40] USBP0_BUS_SW _CB0
2
M15 Design Requirement:

USB3.0/2.0 COMBO +5V_ALW
I continuous 1.5A ; OC 2.0A
U15
+USB_SIDE1_PW R
USB 3.0
UP7549QRA8-20
2 8 +USB_SIDE1_PW R EU0 AZ1045-04F
3 IN1 OUT3 7 CN2 USB3.0_RX2-_C 1 10 USB3.0_RX2-_C
IN2 OUT2 1- NC
1
C480 6 PUBAUK-09FLBS1NN4H0
C481 4 OUT1 +USB_SIDE1_PW R 1 USB3.0_RX2+_C 2 9 USB3.0_RX2+_C
EN# 1 VBUS 1+ NC
*10U/6.3V_8_NC 0.1U/16V_4 1 USBP1-_C 2
D-
2
B GND 5 USB_OC1# USBP1+_C 3 2 3 8 B

OC# USB_OC1# [10,37] 3 D+ GND GND
4
USB3.0_RX2-_C 5 4 GND USB3.0_TX2-_C 4 7 USB3.0_TX2-_C
USB_2.0_EN# USB3.0_RX2+_C 6 5 SSRX- 2- NC
[37,40] USB_2.0_EN# 6 SSRX+
Active Low 7 USB3.0_TX2+_C 5 6 USB3.0_TX2+_C
7 2+ NC
1
USB3.0_TX2-_C 8 GND
C592 USB3.0_TX2+_C 9 8 SSTX-
*0.1U/16V_4_NC 9 SSTX+
13
12
11
10
2
EL2
13
12
11
10
USB3.0_RX2- 1 2
[10] USB3.0_RX2-
USB3.0_RX2+ 4 3
[10] USB3.0_RX2+
DLW 21HN900HQ2L
+5V_ALW
C124 0.1U/16V_4 USB3.0_TX2-_R 1

EL4
2
ESD Function
Place ESD diodes as close as USB connector.
[10] USB3.0_TX2-
C131 0.1U/16V_4 USB3.0_TX2+_R 4 3
[10] USB3.0_TX2+
ESD1
DLW 21HN900HQ2L USBP1+_C 1 6 USBP2+_C
2 1 6 5 USBP2+_C [37]
USBP1-_C 3 2 5 4 USBP2-_C
3 4 USBP2-_C [37]
TVL ST23 04 AD0
+USB_SIDE1_PW R
A close to conn EL8
A
USBP1- 1 2 USBP1-_C
[10] USBP1- USBP1+ 4 3 USBP1+_C
[10] USBP1+
1
C476 DLP11SN900HL2L
C487 0.1U/16V_4 C479
10U/6.3V_8 150P/50V_4 Quanta Computer Inc.
2
PROJECT : AM6
A
USB3/USB Charger
5 4 3 2 1
5 4 3 2 1
fix
vina
D D
USB2.0 X1
+USB_SIDE_PW R
usb-uarbq-4k1986-4p-r
C CN0 C
M15 Design Requirement: UARBQ-4K1986
I continuous 1.5A ; OC 2.0A 1
+5V_ALW 1 VBUS
USBP2-_C 2
2 D-
U2 close to conn USBP2+_C 3
3 D+
1
UP7549QRA8-20 4
2 8 C54 C53 4 GND
IN1 OUT3 +USB_SIDE_PW R
GND4
GND3
GND2
GND1
3 7 10U/6.3V_8 0.1U/16V_4
2
IN2 OUT2
1
6
C41 C40 4 OUT1
0.1U/16V_4 1 EN#
*10U/6.3V_6_NC
2
8
7
6
5
GND 5 USB_OC1#
OC# USB_OC1# [10,36]
USB_2.0_EN#
[36,40] USB_2.0_EN#
Active Low
B B
DLP11SN900HL2L
4 3 USBP2-_C
[10] USBP2- 1 2 USBP2+_C USBP2-_C [36]
[10] USBP2+ USBP2+_C [36]
EL7
A A

PROJECT : AM6
A
USB2*1
5 4 3 2 1
A B C D E
fix
ina
SATA HDD Connector
v CN6
23
25
0.01U/16V_4 1 2 C565 SATA_TXP1_C 1
[11] SATA_TXP1
2
1
0.01U/16V_4 1 2 C566 SATA_TXN1_C 3
[11] SATA_TXN1
4
0.01U/16V_4 1 2 C567 SATA_RXN1_C 5
[11] SATA_RXN1
6
0.01U/16V_4 1 2 C568 SATA_RXP1_C 7
[11] SATA_RXP1
4 8 4
9
R404 0_4 DEVSLP1_R 10
[9] DEVSLP1
11
12
13
+5V_RUN 14
15
16
17
FFS_INT2_R 18
19
20
22
21
+5V_RUN 22
C166F4-12204-L
24
26
C563 *10U/6.3V_6_NC
C564 4.7U/6.3V_6
C569 4.7U/6.3V_6
C573 0.1U/16V_4
If you have two HDD,need add two OD circuit for Fall sensor interrupt circuit
3 3
+5V_RUN
1
R201 FFS_INT2_R
10K_4
2
3
FFS_INT2_N 5
Q3A
4 2N7002KDW
6
FFS_INT2 2 Q3B
2N7002KDW
1
OD circuit
2 2
+3.3V_RUN
Free-fall sensor
U10
C399 2 1 4.7U/6.3V_6 1
C402 2 1 0.1U/16V_4 14 VDDIO 11 FFS_INT1
VDD INT1 FFS_INT1 [7]
9 FFS_INT2
INT2 FFS_INT2 [9]
[12,19,20] SMB_PCH_CLK SMB_PCH_CLK 4

SMB_PCH_DAT 6 SCL 2
[12,19,20] SMB_PCH_DAT SDA NC 3
7 NC
8 SA0
CS 10
RES
2
13
R202 5 RES 15
0_4 12 GND RES 16
GND RES
LNG3DMTR
1
1 1
SA0 is low: I2C device address is 01010000 (50h)

SA0 is high: I2C device address is 01010010 (52h)
PROJECT : AM6
A
SATA HDD/Accelerometer
A B C D E
A B C D E
f ix NGFF Wifi/BT connector

v ina CN5
+3.3V_AUX
1
NGFF 2
USBP6+ 3 GND 3.3Vaux 4
[10] USBP6+ USBP6- 5 USB_D+ 3.3Vaux 6
[10] USBP6- 7 USB_D- LED#1(O) 8
9 GND PCM_CLK(IO) 10
11 SDIO CLK(O) PCM_SYNC(IO) 12
4 4
13 SDIO CMD(IO) PCM_IN(O) 14
15 SDIO DAT0(IO) PCM_OUT(I) 16
17 SDIO DAT1(IO) LED#2(O) 18
19 SDIO DAT2(IO) GND 20
21 SDIO DAT3(IO) UART Wake(O) 22
23 SDIO Wake(I) UART Rx(O) 24
25 SDIO Reset(O) Notch 26
27 Notch Notch 28
29 Notch Notch 30
31 Notch Notch 32
33 Notch UART Tx(I) 34 +3.3V_ALW
35 GND UART RTS(O) 36
[10] PCIE_TXP4 PETp0 UART CTS(I)
37 38
[10] PCIE_TXN4 PETn0 CLink RESET(I)
39 40
GND CLink DATA
1
41 42
[10] PCIE_RXP4 PERp0 CLink CLK
43 44 RT0
[10] PCIE_RXN4 PERn0 COEX3
45 46 10K/NTC/TSM0B103J4252RE_4
47 GND COEX2 48
[12] CLK_PCIE_W LANP REFCLKP0 COEX1
49 50
[12] CLK_PCIE_W LANN
2
51 REFCLKN0 SUSCLK(32kHz)(O) 52 NGFF_W LAN_PCIE_RST#
PCIE_CLK_REQ3#_R 53 GND PERST0#(O) 54 BT_RADIO_DIS# T_W LAN
CLKREQ0# W_DISABLE#2(I) BT_RADIO_DIS# [40] [40] T_W LAN
NGFF_PCIE_W LAN_W AKE_R# 55 56 W LAN_OFF# W LAN_OFF# [40]
57 PEWake0# W_DISABLE#1(I) 58 LPC_LAD0_R R364 0_4
GND NFC I2C SM DATA(IO) LPC_LAD0 [12,40]
1
59 60 LPC_LAD1_R R339 0_4
61 PETp1 NFC I2C SM CLK(I) 62 LPC_LAD2_R R340 0_4 LPC_LAD1 [12,40] R274
63 PETn1 NFC I2C IRQ(O) 64 LPC_LAD3_R R365 0_4 LPC_LAD2 [12,40]
GND NFC Reset#(I) LPC_LAD3 [12,40] 1.5K/F_4
65 66 LPC_LFRAME#_R R341 0_4 LPC_LFRAME# [12,40]
67 PERp1 RESERVED 68 PLTRST#_R R382 0_4 BUF_PLT_RST# [13,21,39,40]
2
3 69 PERn1 RESERVED 70 LPC_CLK_DEBUG 3
GND RESERVED LPC_CLK_DEBUG [12]
71 72
73 RESERVED 3.3Vaux 74
75 RESERVED 3.3Vaux
GND
GND
GND
R389 1 2 *SJ0402_NC
[40] W LAN_EC_W AKE# 1 2 APCI0019-P002A
76
77
1
C591
0.1U/16V_4
2
+3.3V_RUN +3.3V_AUX
Please close to EC terminal end. +3.3V_AUX
R395 1 2 *0_12_NC
+3.3V_ALW
R399 Q20
10K_4 AO6402A
PCIE_CLK_REQ3# [12]
NGFF_W LAN_PCIE_RST# R380 1 2 0_4BUF_PLT_RST# BUF_PLT_RST# [13,21,39,40] 6
5 4
PCIE_CLK_REQ3#_R_L 2
1
1
PCIE_CLK_REQ3#_R 5 Q19A 2 Q19B C552
3
2N7002KDW 2N7002KDW 0.1U/16V_4
2
4
1
2 R397 2 1 *0_4_NC R402 100K_4 2
+15V_ALW 2 1 W LAN_EC_PW R_EN#_L
1
W LAN_EC_PW R_EN# 2 Q21
[40] W LAN_EC_PW R_EN#
2N7002W C553
0.1U/25V_6
2
+3.3V_AUX
PCIE_CLK_REQ3#_R R398 1 2 10K_4

NGFF_PCIE_W LAN_W AKE_R# R388 1 2 100K_4
Support AOAC on WLAN
+3.3V_AUX Place caps close to connector.

1 1
1
C499 C500 C548 C545 C547

0.1U/16V_4 0.047U/10V_4 0.1U/16V_4 0.047U/10V_4 4.7U/6.3V_6
2
PROJECT : AM6
A
Wifi/BT NGFF
A B C D E
5 4 3 2 1
ix
Place these caps close to ITE8528.
f
ina
+3.3V_ALW +3.3V_EC +3.3V_EC
R67
*0_6_SHORT_NC
v
2 1
+RTC_CELL C178 1 2 *0.1U/16V_4_NC
C151 1 2 C236 1U/6.3V_4
*0.1U/16V_4_NC +3.3V_ALW_AVCC
NB_MUTE# [34]
C264 1 2 0.1U/16V_4
ALW_ON [43,48]
C241 1 2 0.1U/16V_4
EC_PWROK [13,44]
C262 1 2 0.1U/16V_4 C263 1 2 0.1U/16V_4
SIO_SLP_S4# [13,51]
+3.3V_EC DGPU_AC_DC# [22]
EC_SPI_SI [41]
EC_SPI_SO
+3.3V_RUN EC_SPI_SO [41] +3.3V_ALW
D EC_SPI_CLK [41] D
EC_SPI_CS0# [41]
U19
CLKRUN# [13]
IT8528E/FX
SMBDAT0 3 4
114
121
127
EC30 2 1 *22P/50V_4_NC R363 *0_4_NC SMBCLK0 1 2
11
26
50
92
74
84
83
82
19
20
99
98
97
96
93
3
10 110 SMBCLK0 RP4 4.7KX2
VCC
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
VBAT
AVCC
VSTBY
EGCLK/GPE3
EGCS#/GPE2
EGAD/GPE1
L80HLAT/BAO/GPE0
L80LLAT/GPE7
HMOSI/GPH6/ID6
HMISO/GPH5/ID5
HSCK/GPH4/ID4
HSCE#/GPH3/ID3
CLKRUN#/GPH0/ID0
[12,39] LPC_LAD0 LAD0/GPM0(3) SMCLK0/GPB3 SMBCLK0 [49,50]
9 111 SMBDAT0 SMBDAT1 3 4
[12,39] LPC_LAD1
8 LAD1/GPM1(3) SMDAT0/GPB4 115 SMBCLK1
SMBDAT0 [49,50] Charge ,BAT SMBCLK1 1 2
[12,39] LPC_LAD2 LAD2/GPM2(3) SM BUS SMCLK1/GPC1 SMBCLK1 [12]
7 116 SMBDAT1
[12,39] LPC_LAD3
22 LAD3/GPM3(3) SMDAT1/GPC2 117 PECI_EC R115 43_4SMBDAT1 [12] PCH RP5 *2.2KX2_NC
[13,21,39] BUF_PLT_RST# LPCRST#/GPD2 PECI/SMCLK2/GPF6(3) PECI_EC_R [18]
13 118 SIO_SLP_S5#
[12] LPC_CLK_EC LPCCLK/GPM4(3) SMDAT2/GPF7(3) SIO_SLP_S5# [13,51]
6 LID_SW# R74 1 2 10K_4
[12,39] LPC_LFRAME# LFRAME#/GPM5(3) 85
PS2CLK0/TMB0/CEC/GPF0 PCH_MELOCK [11] +3.3V_RUN
17 86 H_PROCHOT_EC
[39] BT_RADIO_DIS# LPCPD#/GPE6 PS2DAT0/TMB1/GPF1 89 RP18 4.7KX2
PS2CLK2/GPF4 TPCLK [42]
[31] LCD_TST R134 *0_4_SHORT_NC LCD_TST_R 126 90 SMBDAT3 1 2
GA20/GPB5(3) PS2DAT2/GPF5 TPDATA [42]
PS/2
IRQ_SERIRQ 5 SMBCLK3 3 4
[9] IRQ_SERIRQ SERIRQ/GPM6(3)
D9 2 1 SDM10K45-7-F SMC_EXTSMI_N_C 15
[11] SMC_EXTSMI_N ECSMI#/GPD4(3)
D12 2 1 SDM10K45-7-F SIO_EXT_SCI#_C 23 LPC SMBCLK1 R461 0_4
[9] SIO_EXT_SCI# ECSCI#/GPD3 EC_RTC_RST [11]
WRST# 14 GPIO SMBDAT1 R443 0_4
W RST# TP_INTR# [42]
D11 2 1 SDM10K45-7-F SIO_RCIN#_C 4
[9] SIO_RCIN# KBRST#/GPB6(3)
16
[39] WLAN_OFF# PW UREQ#/BBO/SMCLK2ALT/GPC7(3) SUS_ON R99 2 1 *100K_4_NC
24
PW M0/GPA0 BREATH_LED [42]
25
C
[53,55] RUN_ON
[49] PS_ID
119
123 CRX0/GPC0
CTX0/TMA0/GPB2(3) CIR
IT8528 PW M1/GPA1
PW M2/GPA2
PW M3/GPA3
PW M4/GPA4
28
29
30
FAN1_PWM
FAN2_PWM
LCD_PWM_EC
[44]
[45]
KB_BACKLITE_EN
[31]
[42]
+3.3V_ALW
2
31
PW M5/GPA5 USB_BACK_EN [36]
PWM R142
80 100K_4
[13] RSMRST# DAC4/DCD0#/GPJ4(3)
104 47
[41] EC_SPI_FDIO3 FAN2_TACH [45]
1
USB_2.0_EN# 33 FDIO3/DSR0#/GPG6 TACH0A/GPD6(3) 48 D10
[36,37] USB_2.0_EN# GINT/CTS0#/GPD5 TACH1A/TMA1/GPD7(3) FAN1_TACH [44]
LID_SW# 88 THERM_STP#1 2 WRST#
PS2DAT1/RTS0#/GPF3 [44,47] THERM_STP#
D3 2 1
SDM10K45-7-F SIO_PWRBTN#_C 81 120
[13] SIO_PWRBTN# DAC5/RIG0#/GPJ5(3) TMRI0/GPC4(3) eDP_BL_EN [7,31]
WLAN_EC_WAKE# 87 124 *SDM10K45-7-F_NC
[39] WLAN_EC_WAKE# PS2CLK1/DTR0#/GPF2 TMRI1/GPC6(3) SIO_SLP_S3# [13,51]
109
[13,14,47] HWPG TXD/SOUT0/GPB1
108 C268
[31] TPSCR_EN RXD/SIN0/GPB0 1U/6.3V_4
BID1 71 125
ADC5/DCD1#/GPI5(3) PW RSW /GPE4(3) SYS_PWR_SW# [43]
72 UART port 18 GPJ1 R140 *0_4_SHORT_NC
[50] IINP ADC6/DSR1#/GPI6(3) RI1#/GPD0(3) PBAT_PRES# [49]
73 21 2 1
[39] T_WLAN ADC7/CTS1#/GPI7(3) RI2#/GPD1 ACAV_IN [43,49,50]
35 WAKE UP SDM10K45-7-F D8
[31] LCD_BAK RTS1#/GPE5
34
[34] BEEP PW M7/RIG1#/GPA7
107 112
[41] EC_SPI_FDIO2 FDIO2/DTR1#/SBUSY/GPG1/ID7(Dn) RING#/PW RFAIL#/CK32KOUT/LPCRST#/GPB7 AC_PRESENT [13]
SMBDAT3 95
[44,45] SMBDAT3 CTX1/SOUT1/GPH2/SMDAT3/ID2
SMBCLK3 94
Thermal, ALS [44,45] SMBCLK3 CRX1/SIN1/SMCLK3/GPH1/ID1
105
[41] EC_SPI_SLK FSCK
101 Board ID Straps
[41] EC_SPI_CS# FSCE# +3.3V_ALW +3.3V_ALW
102 EXTERNAL SERIAL FLASH
[41] EC_SPI_DIN FMOSI
103 66 BID0
[41] EC_SPI_DO FMISO ADC0/GPI0(3) 67
ADC1/GPI1(3) USB_CHG_DET_EC# [43]
2
MY16 56 68
KSO16/SMOSI/GPC3(3) ADC2/GPI2(3) ME_SUS_PWR_ACK [13]
57 69
B [13] SYS_PWROK KSO17/SMISO/GPC5(3) ADC3/GPI3(3) AC_OFF [19,50] B
32 70 R72 R73
[46] BAT_LED_AMBER PW M6/SSCK/GPA6 ADC4/GPI4(3) CAP_LED [42]
45.3K/F_4 12K/F_4
SUS_ON 100 A/D D/A
[52,55] SUS_ON
1
106 SSCE0#/GPG2 BID0
[36] USBP0_BUS_SW_CB0 SSCE1#/GPG0(Up) SPI ENABLE
76 BID1
TACH2/HDIO2/GPJ0(3) EC_SPI_IO2 [41]
MY0 36 77
KSO0/PD0 HDIO3/GPJ1(3) EC_SPI_IO3 [41]
1
MY1 37 78 100K/F_4: CS41002FB28
KSO1/PD1 DAC2/TACH0B/GPJ2(3) WLAN_EC_PWR_EN# [39]
MY2 38 79 45.3K/F_4: CS34532FB18
KSO2/PD2 DAC3/TACH1B/GPJ3(3) TP_DIS# [42]
MY3 39 R80 R81 24.3K/F_4: CS32432FB19
MY4 40 KSO3/PD3 20K/F_4 20K/F_4
KSO4/PD4 KBMX 12K/F_4 : CS31202FB15
MY5 41 6.49K/F_4: CS26492FB23
2
MY6 42 KSO5/PD5
KSO6/PD6 1.65K/F_4: CS21652FB29
MY7 43
[42] MY[0..16] KSO7/PD7
MY8 44
MY9 45 KSO8/ACK#
[42] MX[0..7] KSO9/BUSY
MY10 46 GPJ7 can be configured as GPO only if “Crystal-Free” feature is activated. BD0
MY11 51 KSO10/PE 2 BAT_LED_W 000 0.5V PU 100K HSW UMA
KSO11/ERR# CK32KE/GPJ7(3) BAT_LED_W [46]
KSI3/SLIN#
KSI1/AFD#
52 128
KSI0/STB#
MY12 TP_PWR_EN# 001 1.0V PU 45.3K HSW DIS

KSI2/INIT#
KSO12/SLCT CLOCK CK32K/GPJ6(3) TP_PWR_EN# [42]

MY13 53 010 1.5V PU 24.3K BDW UMA
VCORE
54 KSO13 R138 1 2 100K_4

AVSS
MY14 100 2.0V PU 12K BDW DIS

KSI4
KSI5
KSI6
KSI7
VSS
VSS
VSS
VSS
VSS
VSS
MY15 55 KSO14 101 2.5V PU 6.49K

+3.3V_ALW KSO15 It is necessary to connect this pin to the ground 110 3.0V PU 1.65K
if “Crystal-Free” feature is activated and GPJ6 is 111 0V NO PU
58
59
60
61
62
63
64
65
27
49
91
113
122
75
12
LID_SW# not configured as GPI/GPO.

BD1
000 0.5V PU 100K EVT (X00)
001 1.0V PU 45.3K DVT1 (X01)
IMVP7_PROCHOT# [18,48,50,54]
1
010 1.5V PU 24.3K DVT2 (X02)

2
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7
HE0 C0 100 2.0V PU 12K Pilot Build (A00)

VDD
OUT
A A
2
C17 0.1U/16V_4 C537 101 2.5V PU 6.49K

1U/6.3V_4 0.1U/16V_4 110 3.0V PU 1.65K
1
VSS
111 0V NO PU
1
+3.3V_EC L6 C146
APX9132H AI-TRG FCM1005KF-121T05_500mA H_PROCHOT_EC 2 2N7002W
47P/50V_4
3
2 1 +3.3V_ALW_AVCC Q10
1
2
C187
L7 0.1U/16V_4 R273
FCM1005KF-121T05_500mA *100K_4_NC PROJECT : AM6
1
2 1 AVSS_EC Size Document Number Rev

A
SIO (ITE8528H)
5 4 3 2 1
5 4 3 2 1
fix
vina
For EC 64Mbit (8M Byte) +3.3V_ALW
RTC BATTERY
+RTC_CELL +3.3V_RTC_LDO +5V_ALW 2
D D
2
R111 R281
1K_4 1K_4 RTCR0
10K/F_4
1
3
[40] EC_SPI_FDIO3
Q18 2
MMST3904-7-F
2
U18
1 8 RTCD0 RTCR1
[40] EC_SPI_CS# CE# VDD
6 2 24.3K/F_4
[40] EC_SPI_SLK SCK
5
[40] EC_SPI_DIN SI
1
2 7 3 RTCBT0
[40] EC_SPI_DO
1
SO HOLD# C486 RTCR2 1K_4 RTCR3 249/F_4
3 4 0.1U/16V_4 1 +RTC_2 1 2 +RTC_1 1 2 2 1
[40] EC_SPI_FDIO2
2
WP# VSS
W 25Q64FVSSIQ BAT54CW RTC_SOCKET/2032
From EC External Serial Flash Interface
1
C551
1U/6.3V_4
2
RTC2
C C
RTC-BATTERY
5*[24.3/(24.3+10)]-0.8=2.74V
RTC Battery Charger when lower than 2.74V
+3.3V_SUS +3.3V_RUN
R447 R448
*0_4_NC *0_4_NC
For PCH 64Mbit (8M Byte) +VCC_PCH_SPI
B R346 R349 B
*1K_4_NC *1K_4_NC
R348 *15_4_NC PCH_SPI_IO3_C

[12] PCH_SPI_IO3
U20
R343 *15_4_NC SPI_CS# 1 8
[12] PCH_SPI_CS0# CE# VDD
R350 *15_4_NC SPI_CLK 6
[12] PCH_SPI_CLK SCK
R347 *15_4_NC SPI_SI 5
[12] PCH_SPI_SI SI
1
R344 *15_4_NC SPI_SO 2 7
[12] PCH_SPI_SO SO HOLD# C533
R345 *15_4_NC PCH_SPI_IO2_C 3 4 *0.1U/16V_4_NC
[12] PCH_SPI_IO2
2
WP# VSS
*W 25Q64FVSSIQ_NC
R352 15_4
[40] EC_SPI_CS0#
R353 15_4
[40] EC_SPI_SO
R357 15_4
[40] EC_SPI_CLK
To EC Slave Interface R355 15_4
A [40] EC_SPI_SI A
R354 15_4
[40] EC_SPI_IO2
R356 15_4
[40] EC_SPI_IO3

PROJECT : AM6
A
FLASH / RTC
5 4 3 2 1
5 4 3 2 1
f ix
ina
MY[0..16]
[40] MY[0..16]
Keyboard Connector
v [40] MX[0..7]
MX[0..7]
BREATH_LED
LED0
BREATH_PW RLED# PW R_LED#_R R5 1 2 620_4
+5V_ALW
LED_W hite
3
CN8 2
BREATH_LED Q8
[40] BREATH_LED
196504-30041-3 2N7002W
D 196528-30041-3-30p-l D
1
31
KB_DET#
[7] KB_DET# 1
MX7
MX6 2
MX4 3 MY1 C356 1 2 100P/50V_4
Vi(on_max)= -1.7V MX2 4
5
MY2 C374 1 2 100P/50V_4
MX5 MY4 C377 1 2 100P/50V_4
Vi(off_min)=-0.5 MX1 6
7
MY0 C355 1 2 100P/50V_4
MX3
MX0 8 MX4 C362 1 2 100P/50V_4
+5V_RUN MY5 9 MX6 C381 1 2 100P/50V_4
MY4 10 MX3 C360 1 2 100P/50V_4
MY7 11 MX2 C380 1 2 100P/50V_4
MY6 12
13
1
MY8 MY5 C359 1 2 100P/50V_4
Q24 MY3 14 MY6 C376 1 2 100P/50V_4
LTA014YUBFS8TL MY1 15 MY3 C375 1 2 100P/50V_4
47K 16
MY2 MY7 C358 1 2 100P/50V_4
2 MY0 17
MY12 18 MY8 C357 1 2 100P/50V_4
10K 19
3
MY16 MY9 C352 1 2 100P/50V_4

CAP_LED 2 MY15 20 MY10 C351 1 2 100P/50V_4
[40] CAP_LED 21
MY13 MY11 C370 1 2 100P/50V_4
3
Q23 MY14 22
High Active
1
2N7002W MY9 23 MX7 C363 1 2 100P/50V_4

MY11 24 MX0 C378 1 2 100P/50V_4
MY10 25 MX5 C361 1 2 100P/50V_4
1 2 CAP_LED_L 26 MX1 C379 1 2 100P/50V_4
C 330_4 R405 27 C
4.85mA 28 MY12 C373 1 2 100P/50V_4
29 MY13 C353 1 2 100P/50V_4
30 MY14 C371 1 2 100P/50V_4
32
MY15 C372 1 2 100P/50V_4
MY16 C354 1 2 100P/50V_4
+3.3V_TP
25 mils
+3.3V_TP R425 Key board illumination +5V_RUN
1
1206L050YR
2
+KB_LED
*0_4_SHORT_NC 51601-0040m-v01-4p-l
R432 4.7K_4 TPDATA FS0 1206 +KB_LED
R428 4.7K_4 TPCLK C585 0.1U/16V_4
+KB_LED power trace width >10 mil DFFC04FR122
51601-0040M-V01
+3.3V_TP_PW R CN9 R419 100K_4 4
KB_LED_DET 1 2 KB_LED_DET_R 3 4
1 [9] KB_LED_DET 3
I2C1_PCH_DAT 2
[9] I2C1_PCH_DAT 2 2
1
[9] I2C1_PCH_CLK I2C1_PCH_CLK LED_PW M 1
3 1
TP_INTR# 4 Q26 R418 J0
TP_DIS# 5 2N7002K 200K_4
[40] TP_DIS# 6
1
R433 0_4 TPDATA-1 C582
[40] TPDATA
2
B R429 0_4 TPCLK-1 7 LED_PW M 3 1 B
[40] TPCLK 8 0.1U/16V_4
2
C586 10P/50V_4 50503-00841-001
2
88513-0801-8p-l
C587 10P/50V_4 KB_BACKLITE_EN
DFFC08FR029 [40] KB_BACKLITE_EN
KB BL CONN will be changed to 51601-0040M-V01 at PT stage
+3.3V_TP
Touch Pad Connector
+3.3V_TP
+15V_ALW +3.3V_SUS +3.3V_TP
R457 0_6
1
2 1
R449
*100K_4_NC R456
1
*33_6_NC
3 1
2
2
R452
6
*100K_4_NC Q39 *2N7002K_NC

3 1 TP_INTR# 2 Q37B
[9] PCH_TP_INTR#
2
1
*2N7002KDW _NC C589
1
1
*2N7002W _NC *0.1U/16V_4_NC
2
A
R458 Q38 TP_PW R_EN A
0_4
3
1
5 Q37A C590
[40] TP_PW R_EN#
2
*2N7002KDW _NC
*0.1U/16V_4_NC
[40] TP_INTR#
4
2 Quanta Computer Inc.

PROJECT : AM6
A
KB/CLK Gen/FAN/TP
5 4 3 2 1
A B C D E
fix
vina 3VALW ON POWER LOGIC
+3.3V_ALW +3.3V_RTC_LDO
4 4
2
POWER BUTTON R328
10K_4
SW 0
2
1 3 POW ER_SW _IN0#
2 4 R342 R366
100K_4 100K_4
SKQGCAE010
SYS_PW R_SW # [40]
C37
1
*100P/50V_4_NC
1
BAT54CW
2 C525
0.1U/16V_4
2
3
3.3V_ALW _ON [47]
1
D4
3
LATCH 5 Q15A
2N7002KDW
4
1
C534
*0.1U/16V_4_NC
2
3 3
6
2 Q15B
[40,48] ALW _ON
2N7002KDW
1
+3.3V_ALW
2
3
R377
100K_4 2 2N7002W
[40,49,50] ACAV_IN Q14
1
1
BAT54CW
2
USB_CHG_DET_EC# [40]
3
[36] USB_CHG_DET#
1 LATCH
D6
2 2
Stitching Capacitors
+PW R_SRC +PW R_SRC +PW R_SRC +PW R_SRC +PW R_SRC +PW R_SRC +3.3V_ALW
1
C56 C401 C403 C317 C312 C578 C532

0.1U/25V_4 0.1U/25V_4 0.1U/25V_4 0.1U/25V_4 0.1U/25V_4 0.1U/25V_4 0.1U/16V_4
2
1 1

PROJECT : AM6
A
3VALW ON POWER LOGIC
A B C D E
1 2 3 4 5 6 7 8
fix
vina
A A
+5V_FAN2
FAN CONN C461 4.7U/6.3V_6 +5V_FAN

Max Current : mA
C460 0.1U/16V_4
+5V_FAN2 +5V_RUN
50278-00401-001
[40] FAN1_PW M 1 R238 2 1 *0_6_SHORT_NC
[40] FAN1_TACH 2
3
4
+3.3V_RUN R241 10K_4 FAN0
B B
SYS_SHD#
THERMAL IC OTP 85 degree C 2K 7.5K 10.5K 14K 18.7K
ALERT#
+V3.3_THERMAL R22 1 2 18.7K/F_4 THERM_ALERT#
+V3.3_THERMAL R23 2K/F_4 SYS_SHDN# 2K 77'C 87'C 97'C 107'C 117'C
Need closed to CPU OTP 85 degree : R22= 18.7K, R23 = 2K

7.5K 79'C 89'C 99'C 109'C 119'C
Place under CPU 10/20mils

C
10.5K 81'C 91'C 101'C 111'C 121'C C
REM_DIODE1_P
C59 C227 U4
3
1 8 SMBCLK3 14K 83'C 93'C 103'C 113'C 123'C

VDD SCL SMBCLK3 [40,45]
Q0 2 *2200P/50V_4_NC 2200P/50V_4
MMST3904-7-F 2 7 SMBDAT3
2
DP SDA SMBDAT3 [40,45]

1
50 REM_DIODE1_N 50 3 6 THERM_ALERT# 18.7K 85'C 95'C 105'C 115'C 125'C

DN ALERT#
4 5
SYS_SHDN# GND
NCT7718W
NCT7718
1
C68
SMBus address is 1001100xb (98h) (x is R/W bit).
0.1U/16V_4 SYS_SHDN#
2
+V3.3_THERMAL +3.3V_RUN
Q12
2N7002W R28 1 2 *0_4_SHORT_NC
1 3
+V3.3_THERMAL
THERM_STP# [40,47] Max Current :mA
2
D D
[13,40] EC_PW ROK R323 2 1 *0_4_SHORT_NC

2
R321 Quanta Computer Inc.

47K_4 External resistor is required for output de-glitch.
PROJECT : AM6
1

A
FAN & THERMAL
1 2 3 4 5 6 7 8
5 4 3 2 1
f ix
ina
vFor GPU use
G781-1P8 FAN CONN +5V_FAN
SMBus address is 1001101xb (9Ah) (x is R/W bit).
C550 4.7U/6.3V_6
D D
+V3.3_THERMAL2 C549 0.1U/16V_4
C540 0.1U/16V_4 50278-00401-001

1 2
[40] FAN2_PW M 1
C1 close to IC [40] FAN2_TACH 2
U21
VGA_THERMDP 1 8 SMB3_CLK2_Q R393 10K_4 3
[22] VGA_THERMDP VDD SCLK +3.3V_RUN 4
2 7 SMB3_DATA2_Q FAN1
D+ SDATA
1
C535
C1 2200P/50V_4 3 6
D- ALERT#
2
VGA_THERMDN 4 5
[22] VGA_THERMDN THERM# GND
G781-1P8
+5V_FAN
Max Current : mA
+5V_FAN +5V_RUN
R391 2 1 *0_6_SHORT_NC
+V3.3_THERMAL2
C C
2
4
RP24 +V3.3_THERMAL2 +3V_GFX

4.7KX2
R361 1 2 *0_4_SHORT_NC
1
3
Q9A
SMB3_CLK2_Q 4 3
+V3.3_THERMAL
SMBCLK3 [40,44] Max Current :mA
2N7002KDW
2
Q9B
SMB3_DATA2_Q 1 6
SMBDAT3 [40,44]
2N7002KDW
B B
A A

PROJECT : AM6
A
Thermal GPU
5 4 3 2 1
5 4 3 2 1
fix
vina LED Board
+5V_RUN +5V_ALW
J2
LED Status 1
2 1
3 2
4 3
SATA_LED# 5 4
D D
6 5
6
BAT_LED_AMBER#
50501-00601-001
BAT_LED_W#
DFFC06FR065
88501-0601-6p-l-smt
Battrey charger LED
3
Q2B Q2A
BAT_LED_W 2 5 BAT_LED_AMBER BAT_LED_AMBER [40]
[40] BAT_LED_W
2N7002KDW 2N7002KDW
4
Vsd(typ)=0.82 V Vsd(typ)=0.82 V
IF (rating) =115mA IF (rating) =115mA
C C
HDD activity LED.

+3.3V_RUN
SATA_LED#
1
R444 R445
10K_4 100K_4
3
5 2N7002KDW
Q30A
4
6
B Q30B B
PCH_SATA_LED# 2
[11] PCH_SATA_LED#
2N7002KDW
A A

PROJECT : AM6
A
LED
5 4 3 2 1
1 2 3 4 5 6 7 8
fix
vina
+3.3V_RUN
A A
R105
10K_4
R101 0_4
2 1
[53] 1.5V_RUN_PW RGD HW PG [13,14,40]
1
R96 *0_4_NC
2 1 C232
[51] DDR_PW RGD
100P/50V_4
2
R148 *0_4_SHORT_NC
2 1
B
THERM_STP# [40,44] B
R367 *0_4_SHORT_NC
2 1
[48] +3.3V_EN2 3.3V_ALW _ON [43]
C C
D D

PROJECT : AM6
A
System Reset Circuit
1 2 3 4 5 6 7 8
5 4 3 2 1
f ix
vina
1
BDW DVT1 3/28 PC72 PC75 PC76
D +PWR_SRC D
4.7U/6.3V_4 10U/6.3V_6 0.1U/25V_4
2
PR87
*SHORT_6_NC
+PWR_SRC 8230_VIN 2 1 +PWR_SRC +PWR_SRC
+3.3V_RTC_LDO BDW DVT1 3/27

*10U/25V_8_H=1.8_NC
*10U/25V_8_H=1.8_NC
1
1
+5V_ALW2 8230_UGATE2 TP36
PC186
PC187
+ PC188 EC17 EC19 TP37 8230_UGATE1 EC18 EC20 PC189
10U/25V_8_H=1.8 0.1U/25V_6 2200P/50V_4 8230_LGAT2 TP39 2200P/50V_4 0.1U/25V_6 10U/25V_8_H=1.8
2
2
PC213 8230_LGATE1
15
14
13
12
11
TP38
*15U/25V/E100/3528_NC
BDW EVT 1/13 BDW EVT 1/13
LDO3
LDO5
ENC
VIN
SECFB
Place CAP
close to PC188
BDW DVT1 3/28 PC63 PR77 PR90 PC77 BDW DVT1 3/28
0.1U/25V_6 0_6 0_6 0.1U/25V_6
Acoustic issue Acoustic issue
8
7
6
5
5
6
7
8
2 1 2 1 8230_BOOT1 19 7 8230_BOOT2 1 2 1 2
BOOT1 BOOT2
BDW DVT1 3/28 PQ36 4 8230_UGATE1 18 8 8230_UGATE2 4 PQ34 BDW DVT1 3/28
RQ3E070BNFU7TB UGATE1 UGATE2 RQ3E070BNFU7TB
PL7 8230_PHASE1 17 PU3 9 8230_PHASE2 PL6
3.3UH20%6A(MMD-06CZ-3R3M-V1W) PHASE1 RT8230CGQW PHASE2 3.3UH20%6A(MMD-06CZ-3R3M-V1W)
3
2
1
1
2
3
+5V_ALW +5V_ALW 8230_LGATE1 16 10 8230_LGAT2 +3.3V_ALW +3.3V_ALW
LGATE1 LGATE2
8230_BYP1 20 6
BYP1 PGOOD
8
7
6
5
5
6
7
8
1
1
21
GPAD
1
PC185 4 4 PQ33 PC184
ENTRIP1
ENTRIP2
1
PC65 RQ3E120ASFU7TB
+5V_ALW *2200P/50V_4_NC *2200P/50V_4_NC
+3.3V_ALW
2
2
1
1
*SJ0402_NC
SJ4
*SJ0402_NC
SJ3
150U/6.3V/E35_3528
PC181
+ PQ35 1U/6.3V_4
1
TON
2
FB1
FB2
5 Volt +/-5% PC69 RQ3E120ASFU7TB PC50 + PC179 SJ2 3.3 Volt +/-5%
1
3
2
1
1
2
3
1
1
2
0.1U/16V_4 0.1U/16V_4 150U/6.3V/E35_3528 *SJ0402_NC

Fsw : 300KHz Fsw : 355KHz
2
2
PR217 PR216
2
5
TDC : 5.191A *2.2_8_NC *2.2_8_NC TDC : 5.121A
2
C Peak : 7.416A Peak : 7.316A C
2
2
8230_FB1 8230_FB2
OCP : 10A OCP: 9A
1
PR83 PR85 PR86
169K/F_4 100K/F_4 169K/F_4
8230_FB2_P
8230_FB1_P
2
+5V_ALW
1
1
PR89
PR81 64.9K/F_4
6
154K/F_4 PC67 PD4 2 PC59
2N7002KDW
PQ7A
PQ7B
2N7002KDW
5 2 0.1U/25V_4 0.1U/25V_4
2
1 2 3 1 2
1
1
1
BAT54SW-7-F
1 PR88 PC58
PR80 100K/F_4 0.1U/25V_4
100K/F_4 PC66 PD3 2 1 2
0.1U/25V_4
2
1 2 3
2
1 +15V_ALW
BAT54SW-7-F
1
PR100
[40,43] ALW_ON +3.3V_EN2 [47]
1
1.5M_4 PC60 PR74
1 2 PC198 0.1U/25V_4 *100K_4_NC
2
0.1U/25V_4
2
+5V_ALW +5V_ALW
B HSW DVT1 2/14 B
1
+3.3V_ALW
PC81 PC80 PR91
1
0.01U/16V_4 100P/50V_4 100K_4

2
PR101
100K/F_4
2
IMVP7_PROCHOT# [18,40,50,54]
2
PQ9
3
1 2N7002W
+ 4 2
3
- PU4
1
AZV331KTR-G1
2
1
PR102 PC82 PC85 PC87 PC86

137K/F_4 100P/50V_4 0.01U/16V_4 100P/50V_4 0.01U/16V_4
2
2
2
A A

PROJECT : AM6
A
3V/5V (RT8230CGQW)
5 4 3 2 1
A B C D E
fix BDW EVT 1/16 EC38 +VCHGR
ina
4700P/50V_4
EMI request 1 2
v PC191
0.1U/25V_4
1 2
PC194 +DCIN_JACK
1000P/50V_4
1 2
PC193
1 2200P/50V_4 1
1 2
+3.3V_ALW
1
JBAT0 EC28 EC27 EC26
0.01U/25V_4 4700P/50V_4 68P/50V_4
2
2 B9
1
1 A9 PR96
B8
A8 10K_4
SMBCLK0_B PR105 1 2 100_4 SMBCLK0
B7 SMBCLK0 [40,50]
2
A7 SMBDAT0_B PR97 1 2 100_4 SMBDAT0
B6 SMBDAT0 [40,50]
A6 PR98 1 2 100_4
B5 PBAT_PRES# [40]
A5
B4
Reserve for EMI Solution
A4
B3
A3
B2
A2
B1
A1
51202-00901-V01
DFHD09MR104
gs73091-10272-7h-9p-luv_ab
2 2
+DC_IN
FL0
MHC2012S800UBP(80,5A) ESD0
1 2 PBAT_PRES# 1 6 SMBCLK0
2 1 6 5
2 5 +3.3V_ALW
3 4 SMBDAT0
+5V_ALW 2 3 4
For Hiccup mode
*TVL ST23 04 AD0_NC
BDW DVT1 3/5
1
1
PC168 PC167 PC166 PC170 PR52 PR51
2200P/50V_4 1000P/50V_4 0.1U/25V_4 0.1U/25V_4 6.8K_4 6.8K_4
2
1
PR53
2
100K_4 +DC_IN_SS +DC_IN
PQ0 BDW EVT 1/16
2
2N7002W
EMI request
1
PQ1 2 PR50
2N7002W *0_4_NC
1
1
3
EC33 EC7 EC8 EC29
2
2 4700P/50V_4 0.1U/25V_4 1000P/50V_4 *10P/50V_4_NC
[40,43,50] ACAV_IN
2
1
3 3
Reserve for EMI Solution

+5V_ALW 2
1 +3.3V_ALW
1
PR57
CN3 2.2K_4
5 +DCIN_JACK
Adapter2+
PQ21 PD0 2
3
4 FL1 FDV301N_G PR54 DA204UGT106

Adapter1+ BLM15AG102SN1D(1000,200MA) 33_4
3 DOCK_PSID 1 2 3 1 1 2 PS_ID [40]
PSID
1
2 EOD part PR199

Adapter2- PR197 10K_4
HSW DVT1 2/14
2
1 100K_4 2 1 +5V_ALW 2
Adapter1-
3
2
1
50291-0050N-002 2 PQ23
4
PC169 MMST3904-7-F 4
1
100P/50V_4
2
PR198
15K_4
2

PROJECT : AM6
A
DCin & Bat
A B C D E
A B C D E
f ix
ina
+DC_IN PQ22 +DC_IN_SS PQ24 Place CAPs
RQ3E070BNFU7TB RQ3E070BNFU7TB
BDW DVT1 4/1 close to PR206
1
v
8 3 3 8 EC39 EC40 EC41 EC42
7 2 2 7 PR206 1 2 0.01_0612 +VCHGR_IN 2200P/50V_4 4700P/50V_4 1000P/50V_4 100P/50V_4
2
6 1 1 6 1P 1 2 2P
5 5 1P 2P
BDW DVT1 3/25
1
EMC request
4
PC38
1
0.1U/25V_4
2
PC171
1U/25V_6
2
1 1
PC48
1
0.1U/25V_4
PR67 1 2
1
4.02K/F_4
1
EC14 EC15 PC62 PC71 EC34
VCHGR_ACP
VCHGR_ACN
REGN_LDO PC46 PC49 2200P/50V_4 0.1U/25V_6 10U/25V_8 10U/25V_8 4700P/50V_4
2
0.1U/25V_4 0.1U/25V_4
2
BDW EVT 1/16
EMC request
1
+DC_IN_SS REGN_LDO
PR65
10K/F_4 PC53
1
1U/10V_6
1
PC37
2
PR68 0.1U/25V_4 REGN_LDO 1 2
1
[40,43,49] ACAV_IN 4.7K_4
ACP
ACN
PD2 BDW DVT1 3/25
2
SDM10K45-7-F
EMC request
1
+DC_IN VCHGR_CMSRC 3 16 2 1
PR64 CMSRC REGN PC52
PR73
12.4K/F_4 PD5 PR209 2.2_6 0.047U/25V_4 +PWR_SRC
1SS355 10_12 VCHGR_ACDRV 4 17 VCHGR_BST 1 2 1 2
5
6
7
8
5
6
7
8
2 1 1 2 ACDRV BTST
2
+VCHGR
5 18 VCHGR_DH 4 PQ32 4 PQ27
1
PC51 ACOK HIDRV FDMC8884 FDMC8884 PQ37

PR207 1U/25V_6 PR219 FDMC6679AZ
220K/F_4 1 2 VCHGR_VCC 20 19 VCHGR_LX PL8 0.01_0612
1
2
3
1
2
3
VCC PHASE 2.2UH+-20%12A(MMD-10DZ-2R2M-X2Q) 1 8
HSW PVT 5/2 1 2 1 2 2 7
2
VCHGR_ACDET 6 15 VCHGR_DL 1P 1 2 2P 3 6
PR62 ACDET LODRV 1P 2P 5
BDW DVT1 3/25 BDW EVT 1/16
EC37 100P/50V_4
EC36 1000P/50V_4
PC79 10U/25V_8
*SHORT_4_NC PC73
1 2 SMBDAT0_P 8 14 D 2200P/50V_4
EMC request EMC request
4
1
1
PQ26 [40,49] SMBDAT0 PR61 SDA GND
2 G 2
1 2
3
*2N7002W_NC PR63 *SHORT_4_NC 4 PC78 EC16 EC35 HSW PVT 5/2

2 PC42 35.7K/F_4 1 2 SMBCLK0_P 9 13 VCHGR_SRP S 10U/25V_8 0.1U/25V_6 4700P/50V_4
[19,40] AC_OFF For meet BATT test
1
0.01U/25V_4 [40,49] SMBCLK0 SCL SRP PQ30 PR82 PC44
2
1
2
3
1
PR60 FDMS0310AS 2.2_8 BDW EVT 1/13 0.1U/25V_4 PC190

1
PR224 1 2 10 12 VCHGR_SRN 1 2
CELL : 2S2P & 3S1P REGN_LDO 1U/25V_6
2
*100K_4_NC CELL SRN
1
100K_4 BDW EVT 1/16
7 11 1 2 PC45 PC43
EMC request
2
[40] IINP IOUT BATDRV#

0.1U/25V_4 0.1U/25V_4
2
4.02K/F_4
1
PR66
GND
GND
GND
GND
GND
BDW EVT 12/25 PC41
100P/50V_4
2
BQ24715RGRR
21
22
23
24
25
PU1
SJ1
*SJ0402_NC
1 2
1 2 VCHGR_DH
TP35
TP34 VCHGR_DL
+5V_ALW
+5V_ALW
1
PR75 PR79
1
1.5M_4 75K/F_4
PC70 PC64
3 0.01U/16V_4 100P/50V_4 3
2
2
+5V_ALW
BDW DVT1 3/27
PQ6
1
5
PR78
3
PR76 PC56 1 *SHORT_4_NC 2N7002W
47.5K/F_4 + 4 1 2 2
0.01U/16V_4
2
3
- PU2
1
1
2 AZV331KTR-G1
1
Set 85W for discrete & UMA PROCHOT PC54 PC55
1
0.01U/16V_4 100P/50V_4 PC61

Since only 65W adapter support
2
PR72 0.01U/16V_4
2
R1 25.5K/F_4
For Dis For UMA
2
R1: 25.5K R1: 25.5K PC57

100P/50V_4 +DC_IN_SS
P/N: CS32552FB11 P/N: CS32552FB11
2
+3.3V_ALW
1
PR59
100K_4
2
BDW DVT1 3/14 PR70
10K_4 +15V_ALW
Fine-tuned
2
Circuit2 timing PC47 PD1
2
[18,40,48,54] IMVP7_PROCHOT#
2.2U/6.3V_6 1SS355
3
1 2 1
PQ5A
2N7002KDW
5 2 1
BC856B
3
6
4 PQ4 4
PQ5B
2N7002KDW
2
1
PR71
1
200K/F_4
PR69
680K_4
2
PROJECT : AM6
A
Charger (BQ24715)
A B C D E
5 4 3 2 1
fix
vina
D D
R1
[47] DDR_PWRGD
BDW DVT1 3/27
PR92 *SHORT_4_NC PR104 BDW DVT1 3/27
1 2 86.6K/F_4
[13,40] SIO_SLP_S4#
PR93 *0_4_NC PR95 1 2 620K/F_4 +PWR_SRC

+PWR_SRC
1 2 1P35V_S5
[13,40] SIO_SLP_S5#
PR220
C1
1P35V_TON
*10K_4_NC
1P35V_CS
1 2 1P35V_S3 Place CAP
[13,40] SIO_SLP_S3#
1
1P35V_UGATE +
PR221
TP40
EC31 EC32 PC195 PC196 close to MLCC +V_VDDQ
*SHORT_4_NC 1P35V_LGATE
TP41 2200P/50V_4 0.1U/25V_6 10U/25V_8 10U/25V_8 PC212 1.35 Volt +/- 5%
2
1 2 PC192 *15U/25V/E100/3528_NC
[20] DDR_PG_CTRL TDC : 4.912A
10
13
*0.047U/10V_4_NC
9
BDW DVT1 3/27 BDW DVT1 3/27 Peak : 7.02A
S3
S5
CS
PGOOD
TON
Acoustic reserve
5
6
7
8
OCP : 9A
C 4 PQ38 C
PR106 PC92 FDMC7696 +V_VDDQ
0_6 0.1U/25V_6
1 18 1P35V_BOOT 1 2 1 2
Q1
1
2
3
VTTGND BOOT1
2 17 1P35V_UGATE PL9
VTTSNS UGATE 2.2UH 20% 8A MMD-06CZ-2R2M-V1W
20 RT8231AGQW 16 1P35V_PHASE +V_VDDQ
+DDR_VTT VTT PHASE
PU5
4 15 1P35V_LGATE
+DDR_VTTREF VTTREF LGATE
1
1P35V_VLDOIN 19 12 PC94
VLDOIN VDD +5V_ALW
1
5
6
7
8
1
2200P/50V_4 SJ6 SJ7 SJ5 BDW DVT1 3/27
1
2
1
PC90 PC88 *0_2/S_NC *0_2/S_NC *0_6/S_NC +
2
22U/6.3V_6 33N/10V_4 4 PQ39 PC93 PC197
2
PC89 FDMC0310AS 0.1U/16V_4 330U/2V_7343
2
1
1
VDDQ
PGND
1U/6.3V_4
GND
PAD
2
PC91 VID PR107
Q2
FB
1
2
3
*10U/6.3V_6_NC 2.2_8
2
11
14
21
2
RF request
1P35V_VID
1P35V_FB
HSW DVT1 2/14
1P35V_VDDQ
B PR103 B
*SHORT_4_NC 1P35V_FB1
1 2
+5V_ALW
1
BDW DVT1 3/27 PC84 1 PR94

*0.22U/6.3V_4_NC 100K/F_4
2
1
PC83
2
*0.22U/6.3V_4_NC
2
1
0.675V
PR99
100K/F_4
2
A A

PROJECT : AM6
A
1.35_DDR/0.675(RT8231)
5 4 3 2 1
5 4 3 2 1
fix
vina
D D
BDW DVT1 3/27

BDW DVT1 3/27
+5V_ALW 1 2 1P05_VCC 1P05_TON 1 2 +PW R_SRC +PW R_SRC

PR109 *SHORT_6_NC PR134 360K/F_4
+3.3V_SUS
1
2 1
Q1 EC25 EC4 PC8 PC108
PC96 4.7U/6.3V_6 2200P/50V_4 0.1U/25V_6 10U/25V_8 10U/25V_8 +1.05V_SUS
2
1
Fsw : 300K
11
5
5
6
7
8
PR58
*10K/F_4_NC
R1 C1 TDC : 4.866A
VCC
TON
1 2 1P05_CS 10 3 1P05_DH 4 PQ14
PR135 43.2K/F_4 CS UGATE PC103 FDMC7696
Peak : 6.952A
2
9 4
0.1U/25V_6 OCP : 9A
1P05_BST 1 2 1 2
1
2
3
PGOOD BOOST PR112 1_6 PL3
PU6 2.2UH 20% 8A MMD-06CZ-2R2M-V1W
C 1 2 1P05_EN 8 RT8228AZQW 2 1P05_LX +1.05V_SUS +1.05V_SUS
C
[40,55] SUS_ON EN PHASE
PR137 *0_4_NC
PR127 *SHORT_4_NC
1
0.1U/16V_4
PC113
1 1P05_DL PC19
1
+3.3V_SUS LGATE
5
6
7
8
13 2200P/50V_4
2
MODE
PAD
1
2
GND BDW DVT1 3/27
1
BDW DVT1 3/27 4 PQ15 +
FB
FDMC0310AS PC26 PC135
PR19 RF request 0.1U/16V_4 330U/2V_7343
12
2
1P05_DH 2.2_8
TP3 Q2 HSW DVT1 2/14
1
2
3
2
1P05_DL TP2
2
+3.3V_SUS 2 1 PR111
PR124 *0_4_NC PC97 11K/F_4
*1500P/50V_4_NC
1
+5V_ALW 2 1 0.5V
PR117 *SHORT_4_NC
1
BDW DVT1 3/27 PR110
10K/F_4
2
B B
A A

PROJECT : AM6
A
1.05V_SUS (RT8228AZ)
5 4 3 2 1
5 4 3 2 1
fix
vina
D
BDW EVT 1/16 +1.5V_RUN D
Changed EN from 3.3V_RUN to RUN_ON TDC : 0.401A

Removed PR189 by EE request PU8 BDW DVT1 3/27
G9661-25ADJF12U
1 8
[47] 1.5V_RUN_PW RGD POK GND 7
2 1 2
[40,55] RUN_ON VEN ADJ 6
PR190 100K_4 3 +1.5V_RUN +1.5V_RUN
+3.3V_ALW VIN VO 5
+5V_ALW 4
VPP NC
9
10U/4V_8
PC141
PC144 PC153
9
PR191
R1
0.1U/16V_4
0.47U/6.3V_4
1U/6.3V_4
PC139
52.3K/F_4
10U/4V_8
PC143
0.8V
HSW DVT1 2/14 PR193
59K/F_4
EE request R2
C C
B B
A A

PROJECT : AM6
A
+1.5V_RUN (G9661-25ADJF12U)
5 4 3 2 1
5 4 3 2 1
ix
PP
f
RR
ina
22
BDW DVT1 3/27 Place Cap close
99ss
v
For BDW 15W change item
PR26 680k --> CS46802FB00 to input MLCC
PR29 412k --> CS44122FB00 51622_VREF +PWR_SRC +PWR_SRC
ee
PR150 56k --> CS35602FB11
1
PR24 PR25 PR26 PR27 PC0
tt44
PR35 41.2k --> CS34122FB19
1
100K/NTC/B4250_4 *562K/F_4_NC 680K/F_4 36.5K/F_4 + + *15U/25V/E100/3528_NC
PR184 3.57k --> CS23572FB11 PC126 EC1 EC0 PC9 PC110 PC109 PC6
4700P/25V_4 2200P/50V_4 0.1U/25V_6 10U/25V_8 10U/25V_8 10U/25V_8 *15U/25V/E100/3528_NC
2
PR149 10K/F_4 1 2
16
D 2 1 D
1
24
PC125 1000P/50V_4 PR29 PR150 PR151 PR152 PR153 BDW EVT 1/13
For BDW 28W change item 2 1 412K/F_4 56K/F_4 150K/F_4 100K/F_4 20K/F_4 PQ12
KKff
PR26 523k --> CS45232FB00 1 2 1 2 CSD97374Q4M
PL1
2
PR29 464k --> CS44642FB00 0.15U +-20%,29A(ETQP4LR15AFM)
PR150 75k --> CS37502FB12 PR23 *10K/F_4_NC PR120 5 4 1 2 +VCCIN
VIN VSW
oo
2 1 0_6
PR35 22.6k --> CS32262FB15 2 1 6 3 3 4
rrII
BOOT_R PGND
1
PR148 39K/F_4 51622_B-RAMP
1
PR184 3.65k --> CS23652FB08 2 1 2 1 7 2 PC120
BOOT VDD +5V_RUN
1000P/50V_4
2
0.1U/25V_6
51622_THERM
PR22 10K/F_4 51622_F-IMAX 8 1 PR158
51622_OCP-I
PWM SKIP#
PWPD
51622_IMON
1 2 PC101 1.69K/F_4 PR35
MM
+PWR_SRC
1
51622_O-USR 41.2K/F_4
2
OO
PC13 1 2
2.2U/10V_6 PR144
NNff
2
2.2_8 PR166 PR172
51622_PWM1 2.87K/F_4 10K/NTC/TSM0B103J4252RE_4
2
1 2 2 1
39
38
37
16
15
14
13
12
11
10
9
oo
PC22
51622_SKIP# 1 2 0.1U/16V_4
VBAT
THERM
SLEWA
B-RAMP
F-IMAX
GND
GND
GND
IMON
OCP-I
O_USR
rrBB
36 1 2
GND 35 PR143 *SHORT_4_NC
GND BDW DVT1 3/27
34 PR39 BDW DVT1 3/27
GND *SHORT_4_NC PC23
51622_CSP1 17 8 51622_VR_ON 1 2 0.047U/25V_4
DD
CSP1 VR_ON H_VR_ENABLE_MCP [14]
51622_CSP1 1 2
WW12
51622_CSN1 18 7 51622_SKIP#
PR176 0_4 CSN1 SKIP#
C 1 2 51622_CSN2 19 6 51622_PWM1 For 2 phase 51622_CSN1 C
CSN2 PWM1
1 2 51622_CSP2 20 5 51622_PWM2
CSP2 PWM2
58
PU0
PR44 0_4 21 TPS51624RSMR 4 1 2 PR177 For 2 phase
WW
+3.3V_RUN PU3 N/C *0_4_NC

22 3
N/C PGOOD IMVP_PWRGD [14]
*SHORT_4_NC +PWR_SRC
PR47 1 2 51622_GFB 23 2 51622_VDO 1 2 +3.3V_RUN
[15] VSSSENSE GFB VDD
*2200P/50V_4_NC
EC2
*0.1U/25V_6_NC
EC3
*10U/25V_8_NC
PC10
*10U/25V_8_NC
PC111
*10U/25V_8_NC
PC112
[14] VCCSENSE PR48 1 2 51622_VFB 24 1 VR_SVID_DATA PR45
VFB VDIO
1
10_6
*SHORT_4_NC PC29
VR_HOT
ALERT#
40
DROOP
1U/6.3V_4
2
GND
COMP
PWPD
VREF
41
VCLK
BDW DVT1 3/27

GND
GND
V5A
42
GND PQ13
*CSD97374Q4M_NC BDW EVT 1/13
25
26
27
28
29
30
31
32
33
PL2
VR_SVID_DATA [14] *0.15U +-20%,29A(ETQP4LR15AFM)_NC
PR121 5 4 1 2
51622_COMP
VIN VSW +VCCIN

51622_VREF
*0_6_NC
51622_V5A
51622_DROOP VR_SVID_ALERT# 2 1 6 3 3 4
VR_SVID_ALERT# [14] BOOT_R PGND
1
PC148 VR_SVID_CLK 2 1 7 2 PC121
VR_SVID_CLK [14] BOOT VDD +5V_RUN
*100P/50V_4_NC PR185 *1000P/50V_4_NC PR154
2
2 1 51622_VR_HOT 1 2 *0.1U/25V_6_NC 8 1 *1.74K/F_4_NC
IMVP7_PROCHOT# [18,40,48,50] PWM SKIP#
PWPD
PC102 PR43
1
PC34 PR49 PR184 PR186 *SHORT_4_NC *16K/F_4_NC
2
1500P/50V_4 4.75K/F_4 3.57K/F_4 10_6 BDW DVT1 3/27 PC14 1 2
2 1 2 1 2 1 1 2 +5V_RUN *2.2U/10V_6_NC PR147
2
*2.2_8_NC PR164 PR169
1
B PR183 51622_PWM2 *2.87K/F_4_NC *10K/NTC/TSM0B103J4252RE_4_NC B
2
10K/F_4 PC35 PC33 1 2 2 1
2 1 0.33U/6.3V_4 1U/6.3V_4
2
PC27
PP
51622_SKIP# 1 2 *0.1U/16V_4_NC
RR
1 2
PR140 *0_4_NC
11
88
PC28
*0.068U/16V_4_NC
Close to PIN29
44ss
51622_CSP2 1 2
PR42 *0_4_NC
For HSW For BDW SJ0 51622_CSN2 1 2
*SJ0402_NC
ee
IC1: TPS51622ARSMR IC1: TPS51624RSMR 1 2

1 2
tt33
PN: AL051622001 PN: AL051624000

+VCCIN
..56
75
1
*22U/6.3V_8_NC
*22U/6.3V_8_NC
*22U/6.3V_8_NC
*22U/6.3V_8_NC
*22U/6.3V_8_NC
*22U/6.3V_8_NC
*22U/6.3V_8_NC
*22U/6.3V_8_NC
*22U/6.3V_8_NC
KKff
PC142 PC149 PC152 PC155 PC156
PC134
PC140
PC145
PC157
PC150
PC154
PC160
PC159
PC158
22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8
2
oorrCC
A A
BDW DVT1 3/13

BDW CPU NC 6*22uF output cap by EA result
OOMM

PPff
PROJECT : AM6
oo
A
CPU Core (TPS51624RSMR)
rrBB

5 4 3 2 1
DDWW12
58W
1 2 3 4 5
fix
vina +5V_ALW2 +15V_ALW +5V_ALW +5V_RUN
PQ29 +5V_RUN
6
AO6402A Current : 2.04A +5V_ALW2 +15V_ALW +3.3V_ALW +3.3V_SUS
+3.3V_SUS
1
A 5 4 PQ25 A
PR214 PR215
2
1 6
AO6402A Current : 209mA
1
100K_4 100K_4 5 4
PC182 2
3
RUN_ON_ENABLE 1 2 0.1U/16V_4 PR211 PR213 1
1
50uA 100K_4 100K_4
1
PR212 PC173
3
RUN_ON# 5 PQ31A 100K_4 PC180 SUS_ON_ENABLE 1 2 0.1U/16V_4
2
2N7002KDW 4700P/25V_4 50uA
2
6
1
PR205
4
2 PQ31B SUS_ON# 5 PQ28A 100K_4 PC177
[40,53] RUN_ON
2N7002KDW 2N7002KDW 0.047U/25V_4
2
6
1
4
1
2 PQ28B
[40,52] SUS_ON
PC183 2N7002KDW
*100P/50V_4_NC
2
1
+3.3V_ALW +3.3V_RUN
PQ8 +3.3V_RUN
8
RQ3E150BNFU7TB
3
Current : 2.565A
7 2
6 1
5
1
B B
PC68
4
1 2 0.1U/16V_4
2
1
PR84
100K_4 PC74
0.047U/25V_4
2
+1.05V_SUS +1.05V_RUN
PQ18 +1.05V_RUN
8
RQ3E150BNFU7TB
3
Current : 2.09A
7 2
6 1
5
1
PC163
4
C 1 2 0.1U/16V_4 C
2
1
PR194
100K_4 PC162
4700P/25V_4
2
D D

PROJECT : AM6
A
SUS_RUN Power Switch
1 2 3 4 5
5 4 3 2 1
f ix BDW DVT1 3/27
ina
+PWR_SRC
+5V_ALW 8899VCC +5V_ALW
+PWR_SRC +PWR_SRC
v
PR118 PR145
8899PVCC
2.2_6 2.2_6
PC98 PC106 PC7 PC107
2200P/50V_4
PR123 PC100 PC119
10U/25V_8
0.1U/25V_6
0.1U/25V_6
4.7_4 2.2U/6.3V_6 2.2U/6.3V_6 PR165
4.7_4
28
50
BDW EVT 1/13 PC129
BDW EVT 1/13 PC105 0.1U/25V_4
VCC
PVCC
PR125 PR163
8899TONA 40 4 8899TON
+1.35V_GFX Volt +/- 5% 107K/F_4
TONSETA TONSET
107K/F_4 8899ISEN2P_S
8899ISEN2P_S [57]
TDC: 2.585A 0.1U/25V_4
UGATE1
47 8899UGATE1
8
7
6
5
PC116 8899UGATE1 [57] 8899ISEN2N_S
D PR15 D
Peak: 4A *SHORT_6_NC BOOT1
46 8899BOOT1 8899ISEN2N_S [57]
PQ11 48899UGATEA_S 1 28899UGATEA143
OCP: 6A PL0 RQ3E070BNFU7TB UGATEA1 0.1U/25V_4 PR170
+1.35V_GFX 1UH 20%11A(PCMC063T-1R0MN) 48 8899PHASE1 523/F_4
HSW PVT 5/2 PHASE1 8899PHASE1 [57]
DCR=9mohm
3
2
1
8899PHASEA1 8899PHASEA1 44 49 8899LGATE1 PC130
PHASEA1 LGATE1 8899LGATE1 [57]
PC114 1 8899UGATE2 8899ISEN1P_S
UGATE2
1
SPR2 SPR1 PR7 8899BOOTA1 42 PC127 8899UGATE2 [57] 1U/25V_4 8899ISEN1P_S [57]
BOOTA1
8
7
6
5
+ *0_2/S_NC *0_2/S_NC 2.2_6 PU7 2 8899BOOT2 8899ISEN1N_S
BOOT2 PR156 8899ISEN1N_S [57]
PC12 PC123 SPR0 0.1U/25V_4
*0_2/S_NC 4 8899LGATEA1 45 RT8899AGQW 0.1U/25V_4
330U/2V_7343
0.1U/16V_4
*1K/F_4_NC
2
LGATEA1 52 8899PHASE2 PR162 PR40

PQ10 PHASE2 8899PHASE2 [57] 619/F_4 523/F_4
PR116 PC1 RQ3E120ASFU7TB 51 8899LGATE2
3
2
1
620/F_4 2200P/50V_4 LGATE2 8899LGATE2 [57] PC132 PC24
5 8899ISEN2P
0.1U/16V_4
RF request ISEN2P
PC99 33
HSW DVT1 2/14 ISENA2P 6 8899ISEN2N 1U/25V_4
PR113 34 ISEN2N
8899VCC ISENA2N PR33
1U/25V_4 10K/F_4 8 8899ISEN1P
ISEN1P
PR115 *1K/F_4_NC
8899ISENA1P 36 7 8899ISEN1N PR34
ISENA1P ISEN1N 619/F_4
150/F_4
PR114 8899ISENA1N 35 9
845/F_4 ISENA1N ISEN3P PC25
BDW DVT1 3/28 PR161
10
0.1U/16V_4
ISEN3N 8899VCC
PC95 10K/F_4
0.1U/16V_4 PR5 8899VSENA 32 11 8899VSEN PR171 +VGPU_CORE
VSENA VSEN
0_4
*SHORT_4_NC
PR0 PC4 PC131
PR2 PR1 PR167 PR175
8899COMPA30 13 8899COMP PR178
COMPA COMP 10/F_4
0_4 24.9K/F_4 191K/F_4 3.83K/F_4
*SHORT_4_NC *82P/50V_4_NC 100P/50V_4
PC128
PR174 PR180
C BDW DVT1 3/28 PC3 C
PR4 PR3
10K/F_4 0_4
5.1K/F_4 10P/50V_4 BDW DVT1 3/27
*SHORT_4_NC *100P/50V_4_NC
BDW EVT 12/31 PR179
PC136 PC133 *SHORT_4_NC VGPU_CORE_SENSE [25]
31 12 PR173
8899FBA 8899FB *0.1U/25V_4_NC PR182
FBA FB *SHORT_4_NC VSS_GPU_SENSE [25]
*10K/F_4_NC
BDW EVT 1/13 14 8899RGND *0.1U/25V_4_NC
RGND
PR14 PR12 26 25 PR129 PR122
8899VCC 8899SET2 8899SET1 8899VCC
SET2 SET1 PR181
17.8K/F_4 1.21K/F_4 124K/F_4 1K/F_4
10/F_4
PR9 PR10 PR133 PR128
332/F_4 150/F_4 2.8K/F_4 0_4
PR13 PR132
8899VCC 8899OFSA 24 23 8899OFS 8899VCC
OFSA OFS
19.6K/F_4 *20K/F_4_NC
Boot VID voltage is 0.9V
Set OFSA to 1.65V PR16 PC11 PC115 PR136
+1.35V_GFX = (1.65 - 1.2) + 0.9 = 1.35V BDW EVT 1/13
9.53K/F_4 0.1U/16V_4 0.1U/16V_4 6.34K/F_4
BDW DVT1 3/31, confirmed with EE
53
GND Add +1.8V_GFX discharge circuit
[58] 1.8V_GFX_PGOOD PR6 *SHORT_4_NC 8899EN 37 41 +1.8V_GFX

PC2 EN PWMA2
3
PWM3
BDW DVT1 3/27
0.01U/16V_4 BDW EVT 1/13
27 15 PR160
TP0 8899IMON
PR31 OCP_L IMON PR226
10K/F_4
*0_4_NC 22_6
PR32 PR146
2
+1.8V_GFX 8899VDDIO 18 17 8899IMONA PC124
+1.8V_GFX VDDIO IMONA *100P/50V_4_NC PR187 PQ41
2.2_6 34.8K/F_4
2
100K/F_4 NTC 2N7002W
PGOODA
B B
PWROK
PC18 PGOOD PC122 PR108

+3V_GFX
3
1U/6.3V_4 *100P/50V_4_NC 100K/F_4 NTC
IBIAS
V064
SVC
SVD
1
SVT
PR38 DGPU_PWR_EN# 2
PC21 0_4 PR36
1
PR141 PR20 *0.1U/16V_4_NC PR155 15.4K/F_4
19
20
21
22
38
39
29
16
1
1
*10K/F_4_NC *10K/F_4_NC HSW PVT 5/2 23.2K/F_4
PR168 PC214
+0.64VREF PR159 11.3K/F_4 0.047U/25V_4
2
8899SVC [21] PERST_BUF# PR142 8899PWROK 3.3K/F_4
8899SVD *SHORT_4_NC PR119
8899SVC
100K/F_4
[22] PWRCNTRL1 PR138

*SHORT_4_NC PR37
[22] PWRCNTRL0 PR17 8899SVD 8899VCC PUT COLSE PUT COLSE
PR139 PR18 *SHORT_4_NC *10K/F_4_NC
*10K/F_4_NC *10K/F_4_NC PC20
TO MVDDQ TO VDDC
TP1 HOT SPOT HOT SPOT
0.47U/6.3V_4 BDW EVT 1/13, confirmed with EE
DGPU_PWROK PR8 8899PGOODA PR21
[9] DGPU_PWROK
*10K/F_4_NC
Add +3V_GFX discharge circuit
*SHORT_4_NC
PR11 8899PGOOD
*SHORT_4_NC +3V_GFX
+3V_GFX
+15V_ALW
Current : 22mA
+5V_ALW2 +3.3V_ALW +3V_GFX PR225
PQ3 22_6
AO6402A
6 PQ40
5 4 2N7002W
+1.05V_GFX
1
+15V_ALW PR56 2
3
+5V_ALW2 +1.05V_SUS
PQ19
+PCIE_VDDC_GFX Current : 1.33A PR55
100K_4 1
DGPU_PWR_EN# 2
1
RQ3E150BNFU7TB 100K_4
3
8 3 3.3V_GFX_ENABLE PC40
2
1
7 2 0.1U/16V_4
2
1
A PR195 6 1 50uA A
3
100K_4 5
1
PR196 DGPU_PWR_EN# 5 PQ2A
1
100K_4 2N7002KDW PC39

4
0.95_GFX_ENABLE PC165 4700P/25V_4

2
2
0.1U/16V_4 2 PQ2B
2
+3V_GFX 50uA [7] DGPU_PWR_EN

2N7002KDW
3
1
1
5 PQ20A
2N7002KDW PC164
6
4700P/25V_4
4
2 PQ20B
2N7002KDW Title
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1

Custom<Doc> A

5 4 3 2 1
5 4 3 2 1
fix
vina
D D
BDW DVT1 3/27

+PWR_SRC
+PWR_SRC
PR30 PC118 PC117 PC15 PC16
2200P/50V_4
+ +
10U/25V_8
10U/25V_8
0.1U/25V_6
*SHORT_6_NC
1 28899UGATE1_G
[56] 8899UGATE1
PC5 PC104
PQ16 *15U/25V/E100/3528_NC 15U/25V/E100/3528
HSW PVT 5/2
2
FDMS3660S
BDW DVT1 3/25
G1
D1
D1
D1
BDW EVT 1/13 Pop PC104 for Acoustic
PL4 +VGPU_CORE
0.36U,20%,30A PCME104T-R36MS0R76
S1/D2
9
[56] 8899PHASE1
PR28
G2
S2
S2
S2
C 2.2_6 C
8
[56] 8899LGATE1 SPR3 SPR4

*0_2/S_NC *0_2/S_NC
PC17
2200P/50V_4 8899ISEN1N_S
8899ISEN1N_S [56]
RF request
8899ISEN1P_S
HSW DVT1 2/14 8899ISEN1P_S [56]
+PWR_SRC
PR41 PC137 PC138 PC31 PC30
2200P/50V_4
10U/25V_8
10U/25V_8
0.1U/25V_6
[56] 8899UGATE2
1
*SHORT_6_NC
28899UGATE2_G +VGPU_CORE
PQ17 TDC: 27A
HSW PVT 5/2
Peak: 40.5A
1
FDMS3660S
G1
D1
D1
D1
BDW EVT 1/13 OCP: 50A

PL5 +VGPU_CORE
S1/D2
0.36U,20%,30A PCME104T-R36MS0R76
9
[56] 8899PHASE2
G2
S2
S2
S2
PR46
1
2.2_6 PC147
8
330U/2V_7343
PC146
330U/2V_7343
330U_2V_7343_H=1.4
PC36
*330U/2V_7343_NC
PC151
PC161
+
0.1U/16V_4
+ + +
[56] 8899LGATE2
SPR5 SPR6
2
*0_2/S_NC *0_2/S_NC
B PC32 B
2200P/50V_4 8899ISEN2N_S
8899ISEN2N_S [56]
RF request
8899ISEN2P_S
HSW DVT1 2/14 8899ISEN2P_S [56]
A A
Title
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5 4 3 2 1
5 4 3 2 1
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+3V_GFX
D D
PR202
100K/F_4
+3V_GFX
BDW DVT1 3/27 PU9 BDW DVT1 3/27 +1.8V_GFX
1
G9661-25ADJF12U
8
TDC : 0.405A
[56] 1.8V_GFX_PGOOD 2 1 2 POK GND 7
PR203 *SHORT_4_NC 3 VEN ADJ 6 +1.8V_GFX
+3.3V_ALW VIN VO 5 +1.8V_GFX
+5V_ALW
4
VPP NC
9
10U/4V_8
PC175
PC174 PC172
9
PR204
R1
0.1U/16V_4
*0.1U/16V_4_NC
1U/6.3V_4
PC178
52.3K/F_4
10U/4V_8
PC176
0.8V
PR201
41.2K/F_4
R2
C C
B B
A A
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5 4 3 2 1

Schmatics Dell 7548 7547 Quanta AM6 MB - DA0AM6MB8E0 REV E PDF

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1 2 3 4 5 6 7 8

1600 MT/S AMD

www.vinafix.com Quanta Computer Inc.

USB3.0_3 PCIE1 CLK0 USB2.0_2

6 PCIE4 CLK3 USB2.0_5

Quanta Computer Inc.

4.7K 4.7K 4.7K 4.7K

DIMM A SPD (A0h)

Quanta Computer Inc.

+3.3V_EN2 ALW_ON SIO_SLP_S5# DDR_PG_CTRL +3.3V_SUS 1.8V_GFX_PGOOD 1.8V_GFX_PGOOD H_VR_ENABLE_MCP

RTK RTK RTK RTK TI

+3.3V_ALW +5V_ALW +15V_ALW +V_VDDQ +DDR_VTT +1.05V_SUS +VGPU_CORE +1.35V_GFX +VCCIN

SUS_ON RUN_ON +3.3V_RUN +3V_GFX DGPU_PWR_EN RUN_ON MODPHY_EN RUN_ON +3V_GFX

+3.3V_SUS +3.3V_RUN +1.5V_RUN +1.8V_GFX +3V_GFX +5V_RUN +V1.05DX_MODPHY +1.05V_RUN +PCIE_VDDC_GFX

Quanta Computer Inc.

25 1.5V_RUN_PWRGD Haswell ULT

VR Quanta Computer Inc.

RUN_ON 20 DGPU PROJECT : AM6

Date: Monday, May 05, 2014 Sheet 5 of 58

+5V_ALW2 and +3.3V_RTC_LDO G3 mode: > EC reset time + output ALW_ON

G3 mode: EC don't care this event.

45.4 us (EC, ALW_ON to SUS_ON, EC)

4.94 ms (SUS_ON to +3.3_SUS)

35.1 ms (+3.3V_SUS to RSMRST#, t05=min 10ms)

22.5 ms (EC, SLP_S3# to RUN_ON)

+1.05V_RUN 163 ms (VCCSUS to VccCorePCH (+1.05V_RUN), t31=min 0ms)

HWPG(ALL_SYS_PWRGD) 5.08 ms (VCCASW (+1.05V_RUN) to APWROK (HWPG), t11=min 1ms)

-386 ns (VCCST_PWRGD to VR_EN (IMVP_VR_EN), tCPU05=max 100ns)

D EDP_COMP R70 24.9/F_4 D

INT_HDMI_TXN2 C54 C45

PCH Strap Table

Quanta Computer Inc.

U17C HSW_ULT_DDR3L U17D HSW_ULT_DDR3L

M_A_DQ0 AH63 AU37 M_A_CLKN0

Quanta Computer Inc.

DGPU_RST# R280 10K_4

EC_W AKE# R149 10K_4

PCH Strap Table

Quanta Computer Inc.

D Haswell ULT (PCIE,USB) D

11 OF 19 Deep Sleep will be turn off +3.3V_SUS

USB_OC0# R312 1 2 10K_4

Overcurrent Pin Setting

Pin Default Port Mapping AM6 setting

OC0# Port 0, Port 1 Port 0

A OC1# Port 2, Port 3 Port 1, Port 2 A

OC2# Port 4, Port 5 no use

Quanta Computer Inc.

R158 20K/F_4 SRTC_RST# RTC_X1 AW5

XDP_TCK1 R309 *51_4_NC

RSVD_PGDMON R146 *1K_4_NC

PCH Strap Table

Quanta Computer Inc.

R288 *10K_4_NC 10K_4

LPC_LAD0 AU14 +3V_S5 AN2 GPIO11

Quanta Computer Inc.

PCIE_W AKE#_R R118 10K_4

AC_PRESENT R161 *10K_4_NC

PM_BATLOW # R130 10K_4