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04 Addressing Modes PDF

The document describes 7 different addressing modes used in computer architectures: 1) Immediate, 2) Direct, 3) Indirect, 4) Register Direct, 5) Register Indirect, 6) Stack, and 7) Displacement. It provides examples and explanations of how each addressing mode specifies the location of an operand in either a register or memory for use in an instruction.

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Muhtasim Shafi Dipro
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70 views

04 Addressing Modes PDF

The document describes 7 different addressing modes used in computer architectures: 1) Immediate, 2) Direct, 3) Indirect, 4) Register Direct, 5) Register Indirect, 6) Stack, and 7) Displacement. It provides examples and explanations of how each addressing mode specifies the location of an operand in either a register or memory for use in an instruction.

Uploaded by

Muhtasim Shafi Dipro
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Addressing Modes

1. Immediate (literal)
 operand part of instruction
 limited operand magnitude
 useful for storing small constants
 no address calculation; no memory reference
 <ea> = none

e.g. ADD #3,D1 instruction


MOV AX,0FFH
MOVLW 3
Addressing Modes
2. Direct (absolute)
 address of operand part of the instruction
 limited address space, may have extension words
 no address calculation
 <ea> = A

e.g. ADD.B 3,D1 instruction


MOV AX,NUM1
MOVWF NUM1

memory
Addressing Modes
3. Indirect (memory deferred)
 address of operand is in the memory location
whose address appears in the instruction
 address retrieved from memory
 <ea> = (A)

instruction
e.g. ADD (PTR),R1

memory
Addressing Modes
3. Indirect (memory deferred)
 address space of 2**N if word length is N;
however, number of effective addresses is limited
to 2**K where K is the length of the address field
in the machine code
 some machines allow multilevel or cascaded
indirect addressing
 <ea> = (...(A)...)
 e.g. Data General NOVA ... the first bit of the
operand is an indirect bit where 0 means the
operand is data and a 1 means the operand is an
address
Addressing Modes
4. Register Direct
 operand is in a register whose number appears in
the instruction; small address field in instruction
 address space is very limited (i.e. # of registers)
 no address calculation; no memory reference
 <ea> = R

e.g. ADD D0,D1 instruction

MOV AX,0FFH
MOVWF NUM1
registers
Addressing Modes
5. Register Indirect (deferred)
 address of operand is in a register whose number
appears in the instruction
 large address space
 <ea> = (R)
instruction

e.g. ADD (A0),D1

LFSR 0,LIST
MOVF INDF0,W
memory
registers
Addressing Modes
5. Register Indirect - Autoincrement/Autodecrement
 register indirect addressing where the address in the
register is automatically incremented/decremented either
before or after effective address calculations
 for postincrement/postdecrement
<ea> = (R) instruction
(R) <-- (R) ± 1

e.g. ADD.L (A1)+,A2

memory
registers
Addressing Modes
5. Register Indirect - Autoincrement/Autodecrement

 for preincrement/predecrement
(R) <-- (R) ± 1
instruction
<ea> = (R)

e.g. ADD.W -(A1),D2

memory
registers
Addressing Modes
6. Stack
a) address of operand is in the stack pointer
- variation of register indirect addressing
<ea> = (SP)

b) addressing is implied by the instruction for


assembly languages with explicit stack instructions

c) for hardware stacks, the <ea> is an address in


the stack; the limited size of this stack has
implications for the size and operation of the
pointing mechanism
Addressing Modes
7. Displacement
 address of operand is the sum of a register and a
displacement
 variations are named with respect to the register
 the basic format is
instruction
<ea> = disp + (R)

e.g. ADD.W 10(A0),D3


ADD.W (10,A0),D3
ADD.L 8(A0,D0),D3
memory
registers
Addressing Modes
7. Displacement
(a) Indexing
 the address field references a memory address, and R is
an index register containing the displacement from that
address
<ea> = A + (R)

(b) Autoindexing
 automatically increment/decrement the index register
before/after a data access
<ea> = A + (R)
(R) <-- (R) + 1

 the increment/decrement may be 1 or a restricted set of


values
Addressing Modes
7. Displacement
(c) Postindexing/Preindexing (typically only one)
 combination of indirect addressing and indexing

 if indexing is performed after the indirection, it is termed


postindexing
<ea> = (A) + (R)
 useful for accessing one of a number of blocks of data all
with the same fixed format

 if indexing is performed before the indirection, it is


termed preindexing
<ea> = (A + (R))
 useful for constructing a jump table where the table of
addresses starts at location A and R indexes into the
table
Addressing Modes
7. Displacement
(d) Relative
 the register, R, is the program counter, PC
 the operand is located a certain distance from the
current position of the program counter
<ea> = (PC) + A

 used most often in branch instructions


 instruction execution done after the PC has been
incremented to point to the next instruction. Therefore,
relative to the next instruction.
Addressing Modes
7. Displacement
(e) Base-Register
 the referenced register contains a memory address and the
address field contains a displacement (opposite to indexing)
 in the simplest case, the base register is explicitly
referenced in the instruction and is local to the instruction
<ea> = (R) + A
 if the register is a base or segment register implied by the
instruction (i.e. not explicitly specified), the primary use is
implementing segmentation and/or memory protection. The
program is written as if starting at location 0. The addition
of the base register to all memory references is equivalent
to loading the program relative to a base address. A base
register is usually equal to the physical address length. A
segment register is usually shorter than the physical
address length.
Addressing Modes
7. Displacement
(f) Base-Indexed
 The base register is local to the instruction and is
combined with an index register and a displacement
<ea> = (B) + (I) + A

e.g ADD.L 8(A0,D0),D3


ADD.L (8,A0,D0),D3

e.g. for Pentium, possible to do


SEGMENT + BASE + (INDEX * SCALE) + DISPLACEMENT

 can be effectively used to index through complex data


structures

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