STA530

4 X 50W STEREO POWER AMPLIFIER

TARGET SPECIFICATION

■ MONOCHIP BRIDGE QUAD CONFIGURABLE

AMPLIFIER OPTIMIZED FOR BASH®
ARCHITECTURE
■ 4 X 50W OUTPUT POWER @ RL = 8 Ω,
THD = 10% or (2 x 50W @ 8 Ω + 1 x 100W @
4Ω) or (2 x 100W @ 4 Ω)
■ PRECISION RECTIFIERS TO DRIVE THE
BUCK REGULATOR FLEXIWATT27
■ ON-OFF SEQUENCE/ TIMER WITH MUTE
AND STANDBY
PROTECTION
■ PROPORTIONAL OVER POWER OUTPUT
CURRENT TO LIMIT THE BUCK REGULATOR ■ FLEXIWATT POWER PACKAGE WITH 27 PIN
■ ABSOLUTE POWER BRIDGE OUTPUT ■ BASH® LICENCE REQUIRED
TRANSISTOR POWER PROTECTION
■ ABSOLUTE OUTPUT CURRENT LIMIT DESCRIPTION
■ INTEGRATED THERMAL PROTECTION The STA530 is a BASH® power amplifier where
■ POWER SUPPLY OVER VOLTAGE BASH® means “High Efficiency”.

BLOCK DIAGRAM

GND +VS -VS PWR_INP1 STBY/MUTE PWR_INP3

CD+1&2 TURN-ON/OFF CD+3&4

OUT1+ +10 SEQUENCE +10 OUT3+

OUT1- -1 -1 OUT3-
PROTECTION
CD-1&2 OUTPUT BRIDGE OUTPUT BRIDGE CD-3&4

SOA
PROT
DETECTOR

CONFIG.

OUT2+ +10 +10 OUT4+

OUT2- -1 -1 OUT4-

OUTPUT BRIDGE OUTPUT BRIDGE

ABSOLUTE ABSOLUTE
TRK_2/PAR1&2 VALUE VALUE TRK_4/PAR3&4
BLOCK BLOCK

ABSOLUTE ABSOLUTE
TRK_1 VALUE VALUE TRK_3
BLOCK BLOCK

PWR_INP2 TRK_OUT PWR_INP4 D02AU1344

February 2003 1/17

This is preliminary information on a new product now in development. Details are subject to change without notice.
STA530

DESCRIPTION (continued)
In fact it's permits to build a BASH® architecture amplifier adding only few external components and a variable
Buck regulator tracking the audio signal. Notice that normally only one Buck regulator is used to supply a mul-
tichannel amplifiers system , therefore most of the functions implemented in the circuit have a summing output
pin.
The signal circuits are biased by fixed negative and positive voltages referred to Ground. Instead the final stag-
es of the output amplifiers are supplied by two external voltages that are following the audio signal . In this way
the headroom for the output transistors is kept at minimum level to obtain a high efficiency power amplifier.
The circuit contains all the blocks to build a configurable four channel amplifier.
The tracking signal for the external Buck regulator is generated from the Absolute Value Block (AVB) that rec-
tifies the audio signal. The outputs of these blocks are decoupled by a diode to permit an easy sum of this signal
for the multichannel application. The gain of the stage AVB is equal to 70 (+36.9 dB). A sophisticated circuit
performs the output transistor power detector that , with the buck regulator, reduces the power supply voltage .
Moreover, a maximum current output limiting and the over temperature sensor have been added to protect the
circuit itself. The external voltage applied to the STBY/MUTE pin forces the two amplifiers in the proper condi-
tion to guarantee a silent turn-on and turn-off.

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

+Vs Positive supply voltage referred to pin 14 (GND) 27 V

-Vs Negative supply voltage referred to pin 14 (GND) -27 V

VCD+ Positive supply voltage tracking rail referred to pin 14 (GND) 20 V

VCD- Negative supply voltage referred to -Vs (1) -0.3 V

VCD- Negative supply voltage tracking rail referred to pin 14 (GND) -20 V

VPWR_Imp1 Pin 11, 10, 9, 8 Negative & Positive maximum voltage referred to -25 to +25 V
VPWR_Imp2 GND (pin 14)
VTRK_1
VTRK_2

VPWR_Imp 3 Pin 17, 18, 19, 20 Negative & Positive maximum voltage referred -25 to +25 V
VPWR_Imp 4 to GND (pin 14)
VTRK_3
VTRK_4

ISTBY-max Pin 12 maximum input current (Internal voltage clamp at 5V) 500 µA

VSTBY/ Pin 12 negative maximum voltage referred to GND (pin 14) -0.5 V
MUTE

Notes: 1. VCD- must not be more negative than -Vs

THERMAL DATA
Symbol Parameter Value Unit

Tj Max Junction temperature 150 °C

Rth j_case Thermal Resistance Junction to case .............................. ..max 1 °C/W

2/17
 STA530

OPERATING RANGE
Symbol Parameter Value Unit

+Vs Positive supply voltage +15 to +25 V

-Vs Negative supply voltage -15 to -25 V

∆Vs+ Delta positive supply voltage 5V ≤ (Vs+ - VCD+) ≤ 10V V

VCD+ Positive supply voltage tracking rail +3 to +15 V

VCD- Negative supply voltage tracking rail -15 to -3 V

Tamb Ambient Temperature Range 0 to 70 °C

Isb_max Pin 12 maximum input current (Internal voltage clamp at 5V) 200 µA

PIN CONNECTION

1 27
-Vs
Out1+
Out1-
CD+1&2
CD-1&2
Out2-
Out2+
TRK_2/Par1&2
TRK_1
PWR_Inp2
PWR_Inp1
STBY/MUTE
TRK_Out
Gnd
+Vs
PROT
PWR_Inp3
PWR_Inp4
TRK_3
TRK_4/Par3&4
Out4+
Out4-
CD-3&4
CD+3&4
Out3-
Out3+
-Vs

D02AU1352

NOTE
Slug connected to PINs No. 1 & 27

3/17
STA530

PIN CONNECTION
N° Name Description

1 -Vs Negative Bias Supply

2 Out1+ Channel 1 speaker positive output

3 Out1- Channel 1 speaker negative output

4 CD+1&2 Channels 1 & 2 Time varying tracking rail positive power supply

5 CD-1&2 Channels 1 &2 Time varying tracking rail negative power supply

6 Out2- Channel 2 speaker negative output

7 Out2+ Channel 2 speaker positive output

8 TRK_2/ Absolute value block input for channel 2,and parallel command for channels 1&2
Par1&2

9 TRK_1 Absolute value block input for channel 1

10 PWR_Inp2 Input to channel 2 power stage

11 PWR_Inp1 Input to channel 1 power stage

12 STBY/MUTE Standby/mute input voltage control

13 TRK_Out Absolute value block output

14 Gnd Analog Ground

15 +Vs Positive Bias Supply

16 PROT Channel Protection signal for STABP01

17 PWR_Inp3 Input to channel 3 power stage

18 PWR_Inp4 Input to channel 4 power stage

19 TRK_3 Absolute value block input for channel 3

20 TRK_4/ Absolute value block input for channel 4,and parallel command for channels 3&4
Par3&4

21 Out4+ Channel 4 speaker positive output

22 Out4- Channel 4 speaker negative output

23 CD-3&4 Channels 3 & 4 Time varying tracking rail negative power supply

24 CD+3&4 Channels 3 & 4 Time varying tracking rail positive power supply

25 Out3- Channel 3 speaker negative output

26 Out3+ Channel 3 speaker positive output

27 -Vs Negative Bias Supply

4/17
 STA530

ELECTRICAL CHARACTERISTCS (Test Condition: Vs+ = 25V, Vs- = -25V, VCD+ = 15V, VCD- = -15V, RL =
8Ω, external components at the nominal value f = 1KHz, Tamb = 25°C unless otherwise specified)
Symbol Parameter Test Condition Min. Typ. Max. Unit

TRACKING PARAMETERS

GTRK Tracking reference voltage gain 66 70 74

VTRK_out Tracking ref. output voltage 0 15 V

ITRK_out Current capability 5 6 mA

ZTRK_in Input impedance (TRK1/2) 1 MΩ

VOFFSET Output traking DC offset 100 mV

OUTPUT BRIDGE

Gout Half Output bridge gain 19 20 21 dB

Gch Output bridge differential gain 25 26 27 dB

∆Gch Output bridges gain mismatch -1 1 dB

Pout Continuous Output Power THD = 1% 39 W

THD = 10% 50 W

THD = 10% RL = 4Ω 40 W
VCD+ = 11V, VCD- = -11V

Pout Continuous Output Power THD = 1% RL = 4Ω 78 W

2 ch par THD = 10% RL = 4Ω 100 W

THD Total harmonic distortion of the Po = 5W 0.01 0.1 %

output bridge
f = 20Hz to 20KHz; Po = 20W 0.2 %

VOff Output bridge D.C. offset -100 100 mV

EN Noise at Output bridge pins f = 20Hz to 20KHz; Rg = 50Ω 60 µV

Zbr_in Input impedance 100 140 180 KΩ

Rdson Output power Rdson IO = 1A Tj=25o C 400 500 mΩ

RdsonMAX Maximum Output power Rdson IO = 1A 800 mΩ

OLG Open Loop Voltage Gain 100 dB

GB Unity Gain Bandwidth 6 MHz

SR Slew Rate 8 V/µs

PROTECTION

VSTBY Stby voltage range 0 0.8 V

VMUTE Mute voltage range 1.6 2.5 V

VPLAY Play voltage range 4 5 V

Th1 First Over temperature threshold 130 °C

5/17
STA530

ELECTRICAL CHARACTERISTCS (continued)

Symbol Parameter Test Condition Min. Typ. Max. Unit

Th2 Second Over temperature 150 °C

threshold

Unbal. Upper Unbalancing ground Referred to (CD+ - CD-)/2 5 V

Ground threshold

Unbal. Lower Unbalancing ground Referred to (CD+ - CD-)/2 -5 V

Ground threshold

UVth Under voltage threshold |Vs+| + |Vs-| 18 22 V

Pd_reg. Power dissipation threshold for Iprot = 50µA; @ Vds = 8V 18 20 23 W

system regulation

Pd_max Switch off power dissipation @ Vds = 8V 30 W

threshold

Iprot Pd Protection current slope for Pd > Pdreg 400 µA/W

Iprot Id Protection current slope for Id > Idreg 400 µA/A

Ilct s Limiting Current threshold “soft” 4 4.5 5 A

Ilct h Limiting Current threshold “hard” 4.5 5 5.5 A

I+Vs Positive supply current Stby (Vstby/mute pin = 0V) 5 mA

Mute (Vstby/mute pin = 2.5V) TBD mA
Play (Vstby/mute pin = 5V no signal) TBD mA

I-Vs Negative supply current Stby (Vstby/mute pin = 0V) 6 mA

Mute (Vstby/mute pin = 2.5V) 29 mA
Play (Vstby/mute pin = 5V no signal) 33 mA

ICD+ Positive traking rail supply current Stby (Vstby/mute pin = 0V) 200 µA
Mute (Vstby/mute pin = 2.5V) 85 mA
Play (Vstby/mute pin = 5V no signal) 85 mA

ICD- Negative traking rail supply current Stby (Vstby/mute pin = 0V) 200 µA
Mute (Vstby/mute pin = 2.5V) 85 mA
Play (Vstby/mute pin = 5V no signal) 85 mA

6/17
 STA530

FUNCTIONAL DESCRIPTION
The circuit contains all the blocks to build a configurable four channel amplifier.
In fact, only driving properly the TRK_2 (and TRK_4) pins, it’s possible to change the chip configuration:
– 50 Watt x 4
– 50 Watt x 2 + 100 Watt x1 (TRK_2/Par1&2 or TRK_4/Par3&4 at -Vs)
– 100 Watt x 2 (TRK_2/Par1&2 and TRK_4/Par3&4 at -Vs)
Each single channel is based on the Output Bridge Power Amplifier, and its protection circuit. Moreover, a sig-
nal rectifier are added to complete the circuit.
The operation modes are driven by The Turn-on/off sequence block. In fact the IC can be set in three states by
the Stby/mute pin:
STANDBY ( Vpin < 0.8V), MUTE (1.6V < Vpin < 2.5V), and PLAY (Vpin > 4V).
In the Standby mode all the circuits involved in the signal path are uninhabited, instead
in Mute mode the circuits are biased but the Speakers Outputs are forced to ground potential.
These voltages can be get by the external RC network connected to Stby/Mute pin.
The same block is used to force quickly the I.C. In standby mode or in mute mode when the I.C. dangerous
condition has been detected. The RC network in these cases is used to delay the Normal operation restore.
The protection of the I.C. are implemented by the Over Temperature, Unbalance Ground, Output Short circuit,
Under voltage, and output transistor Power sensing as shown in the following table:

Table 1. Protection Implementation

Fault Type Condition Protection strategy Action time Release time
Chip Over Tj > 130 °C Mute Fast Slow Related to
temperature Turn_on sequence
Chip Over Tj > 150 °C Standby Fast Slow, Related to
temperature Turn_on sequence
Unbalancing |Vgnd| > ((CD+) - Standby Fast Slow, Related to
Ground (CD-))/2 + 5V Turn_on sequence
Over Current Iout > 4.5A Reducing Buck Related to the Buck Related to the Buck
regulator output regulator regulator
voltage.
Short circuit Iout > 5A Standby Fast Slow, related to
Turn_on sequence
Under Voltage |Vs+| + |Vs-|< 20V Standby Fast Slow, related to
Turn_on sequence
Extra power Pd tr. > 18W Reducing Buck Related to the Buck Related to the Buck
dissipation regulator output regulator regulator
at output transistor voltage.
Maximum power Pd tr. > 30W Standby Fast Slow, related to
dissipation Turn_on sequence
at output transistor

ABSOLUTE VALUE BLOCK

The absolute value block rectifies the signal to extract the control voltage for the external Buck regulator. The
output voltage swing is internally limited, the gain is internally fixed to 70.
The input impedance of the rectifier is very high , to allow the appropriate filtering of the audio signal before the
rectification.

7/17
STA530

OUTPUT BRIDGE
The Output bridge amplifier makes the single-ended to Differential conversion of the Audio signal using two
power amplifiers, one in non-inverting configuration with gain equal to 10 and the other in inverting configuration
with unity gain. To guarantee the high input impedance at the input pins, PWR_Inp1....4, the second amplifier
stages are driven by the output of the first stages respectively.
In 60W x2 channel configuration the "slave" inputs (INPUT 2/4) must be connected to GND.

POWER PROTECTION
To protect the output transistors of the power bridge a power detector is implemented (fig 1).
The current flowing in the power bridge and the voltage drop on the relevant power (Vds) are internally mea-
sured. These two parameters are converted in current and multiplied: the resulting current , Ipd, is proportional
to the instantaneous dissipated power on the relevant output transistor. The current Ipd is compared with the
reference current Ipda, if bigger (dissipated power > 18W) a current, Iprot(PD), is supplied to the Protection pin.
The aim of the current Iprot is to reduce the reference voltage for the Buck regulator supplying the power stage
of the chip, and than to reduce the dissipated power. The response time of the system must be less than
200 µSec to have an effective protection. As further protection, when Ipd reaches an higher threshold (when the
dissipated value is higher then 30W) the chip is shut down, forcing low the Stby/Mute pin, and the turn on se-
quence is restarted. The above description is relative for each channel in 4x30W configuration.

Figure 1. Power Protection Block Diagram

CD-1&2
OUT1p OUT1n

OPA OPA

ILIMP
I_pda IPROT(ID)

+ TO PROT
I_pd IPROT
IPROT(PD) PAD

V/I I_pdp CURRENT

I_Pd COMP.
x I_pd SEQUENCE
MULTIPLIER Pdp1 TO TURN-ON/OFF

V/I
RSENSE Ilim CURRENT
Iload
COMP.
SEQUENCE
CD+1&2 Oc1 TO TURN-ON/OFF
D02AU1346

8/17
 STA530

In fig. 2 there is the power protection strategy pic- CURRENT PROTECTION

tures. Under the curve of the 18W power, the chip is The chip is also protected by a current detection.
in normal operation, over 30W the chip is forced in
Standby. This last status would be reached if the The current ILOAD is compared with the reference
Buck regulator does not respond quikly enough re- current ILIMP, if bigger (ILOAD> 4,5 A)a current Ip-
ducing the stress to less than 30W. rot(IL), is supplied to the Protection pin.
As further protection, when ILOAD reaches an higher
threshold (5 A) the chip is shut down, forcing low the
The fig.3 gives the protection current, Iprot(PD), be- Stby/Mute pin, and the turn on sequence is restarted.
havior. The current sourced by the pin Prot follows
the formula: The above description is relative for each channel in
–4
4x30W configuration.
( P d – P d_ av _th ) ⋅ 5 ⋅ 10
I p ro t ( P D) ≡ ------------------------------------------------------------------- The fig.4 gives the protection current, Iprot(IL), be-
1.25 V havior. The current sourced by the pin Prot follows
the formula:
(for each channel)
( I L O AD – I ict, s )
I p ro t ( IL ) ≡ ---------------------------------------- (for each channel)
for Pd < Pd_av_th the Iprot(PD)= 0. 2500

Figure 2. Power protection threshold for IlLOAD < Iict,s the Iprot(IL) = 0.
For the parallel channel Iprot is double.
Ids(A)
Ilim=4.5A
The chip is also shut down in the following conditions:
5.0
4.5
When the average junction temperature of the chip
4.0
reaches 150°C.
3.5 When the ground potential differ from more than 5V
Standby
3.0 from the half of the power supply voltage, ((CD+)-
(CD-))/2
Buc

2.5 Pd_Max=30W
k

2.0 m When the sum of the supply voltage |Vs+| + |Vs-|

Li

it a Pd_reg=18W
1.5 ti o
n <20V
Normal
1.0 Operation The output bridge is muted when the average junc-
Vds(V) tion temperature reaches 130°C.
0 7.5 15.0 22.5 30.0 37.5 D02AU1366

Figure 4. Protection current behaviour Iprot (IL)

Figure 3. Protection current behaviour Iprot (PD)
Iprot(IL)(µA)
Iprot (IPd) (mA)

20

Iprot slope = 0.4 mA/W

10 800
Iprot slope=400µA/A

400 4.5A 5A
18W
Id(A)
Pd (W) D02AU1367 1 2 3 4 5 6
5 10 15 20 25 30

9/17
STA530

Figure 5. Test and Application Circuit (4x50W)

C9 C11
R5 TRK_1 TRK_2/PAR1&2 R3
INPUT 1 INPUT 2
R1 R9 R11 R7

C5 PWR_INP1 PWR_INP2 C7

C1 OUT1P C3
CD+1&2
CD+3&4 8Ω
OUT1M
C13 R13
+VS
OUT2P
C15 C17
8Ω
GND OUT2M

R14 C16 C18 STBY/MUTE

C14 5V
-VS R18 R17
-VS OUT3P C19 MUTE STBY
D1
CD-1&2
8Ω R19
CD-3&4 OUT3M

OUT4P
R15 TRK_OUT
8Ω
R16 PROT OUT4M

C12 C10
R4 TRK_3 TRK_4/PAR3&4 R6
INPUT 3 INPUT 4
R8 R12 R10 R2

C8 PWR_INP3 PWR_INP4 C6

C4 D02AU1347 C2

Figure 6. Test and Application Circuit (2x50W & 1x100W)

C9
R5 TRK_1
INPUT 1 TRK_2/PAR1&2
-VS
R1 R9
PWR_INP2
C5 PWR_INP1

C1 OUT1P
CD+1&2
CD+3&4 OUT2P
C13 R13
+VS 4Ω
OUT2M
C15 C17
OUT1M
GND

R14 C16 C18 STBY/MUTE

C14 5V
-VS R18 R17
-VS OUT3P C19 MUTE STBY
D1
CD-1&2
8Ω R19
CD-3&4 OUT3M

OUT4P
R15 TRK_OUT
8Ω
R16 PROT OUT4M

C12 C10
R4 TRK_3 TRK_4/PAR3&4 R6
INPUT 3 INPUT 4
R8 R12 R10 R2

C8 PWR_INP3 PWR_INP4 C6

C4 D02AU1351 C2

10/17
 STA530

EXTERNAL COMPONENTS
Name Function Value Formula
Resistor for tracking input voltage
R1 = R2 =R7 = R8 filter 10KΩ
Resistor for tracking input voltage
R5 = R6 =R3 = R4 filter 56KΩ
Cac AC Decoupling capacitor 100nF 1
C1 = C2 = C3 = C4 (fp = 16Hz, Cac = ---------------------------------
2π ⋅ fp ⋅ Rac
Rac =100KΩ )
R9=R10=R11=R12 Resistor for tracking input voltage filter 10KΩ
C5 = C6 = C7 = C8 Capacitor for Tracking input 1nF
voltage filter
C9=C10=C11=C12 Dc decoupling capacitor 1µF
R17 Bias Resistor for Stby/Mute function 10KΩ
R18 Stby/Mute constant time resistor 30KΩ
R19 Mute resistor 30KΩ
C19 Capacitor for Stby/Mute resistor 2.2µF
C17 = C18 Power supply filter capacitor 100nF
R13 = R14 Centering resistor 330 Ω, 1W
C13 = C14 Tracking rail power supply filter 680nF
R15 TRK_out 40KΩ
R16 Protection 1KΩ
C15 = C16 Power supply filter capacitor 470 µF , 63V
D1 Schottky diode SB360

Figure 7. BASH® module SAM261 6.1 with 2 x STA530 (see Application Note AN1643)

+50VDC Signal Power Supply

+/- 24V DC / 50 mA

Dynamic Power Supply

(CD+ & CD-)
Buck STA530
Regulator 4 x 50Watts

AudioInputs
8 Ohm Loads
STABP01 Lines of Controls
Controller
STA530
1 x 100Watts
2 x 50Watts

+/- 24V DC / 50 mA
BASH fi module SAM261 6.1 Signal Power Supply

4 Ohm Load

Power - On-Off sequences:

In order to avoid damages to the SAM261 board it is important to follow these sequences:
At Power-On apply in the first the Auxiliary Power Supply (±24V) and after the Main Power Supply
(+50V), in this condition the system is in "Mute state" and it can move in "play state" with the switch present
on the pcb.
At Power-Off is better to bring the SAM module in "Mute state" and after that to follow this order: switch-
off the Main Supply Voltage (+50V) and subsequently the Auxiliary Power Supply. (±24V).

11/17
STA530

System Description & Operating Rules

SAM261 is a BASH® 6.1 amplifier ( 6 x 50W, 1 x 100W) implementation utilizing the STA530 Integrated Circuit.
Specifically designed for multi-channel implementation in DVD - HTIB systems, Multi-Media systems, Mini and
Micro systems and Set Top boxes.
SAM261 is dimensioned to provide the maximum Output Power (THD=10 %) on two channels and instanta-
neously and 1/3 max Pout on the remaining Outputs, or 1/8 of max Pout continuous; this rule is important to
define the main Power Supply size (+50V).

Buck Regulator Description

The function of the buck regulator is to efficient convert efficiently an input voltage to a lower voltage by adjust-
ing the ratio of the switching transistor's on-time to off-time. The resulting waveform is averaged by the output
filter to recover an analog signal.
In the BASH amplifier this output is in effect split in half by centering it on the audio ground to provide CD+ and
CD- rails.
To avoid the need for a high side driver for the transistor switch in the buck regulator the buck circuit recom-
mended has the switch in the return path. Hence the gate drive circuit (part of the STPB01) is referenced to the
negative return of the main supply that provides power for the buck regulator.

Interfacing STA530 to STPB01 (Feedback circuit)

This circuit produces a control signal current that is fed back to the STPB01 digital controller. The network used
in this example compares the track signal (STA530 track out) to a fixed ratio of buck regulator's output (CD+)
using a transistor. This method is effective because the controller's reference is the negative of the main DC
supply, which is not referenced to audio ground.
The tracking signal is generated inside the STA530 (track out) by taking the absolute value of the pre-amp's
output. The outputs of each channel and of each STA530 are then tied together in a diode-oring arrangement.
This means that the highest of any given output is the output that determines the tracking signal.
The absolute value circuit inside the STA530 has gain. This makes it possible to use an RC network and a re-
sistor divider to create a phase shift in the tracking signal at higher frequencies. This is also useful in optimizing
the alignment of the buck regulator's output with the output signal of the bridge amplifier at high frequency
This circuit first converts the buck switch current to a peak voltage. The control current is then converted to a
voltage (using a resistor) and added to the peak voltage. By doing this, the buck is better able to maintain the
desired headroom over a wide load range and output level.

Centering Network for CD + & CD- Rails

The power rail of a bridge amplifier has no current flowing through the ground node, as the load is not connected
to ground. However there are several different small sources of dynamic and continuos ground currents flowing
from either CD+ or CD- to support the function of various things such as the control signal to the STABP01 con-
troller. The centering network prevents these currents from shifting the CD+/- rails away from center i.e. away
from a symmetric split of the buck's output about ground. This is critical, even a small centering error requires
an increase in headroom which results in a significant drop in output losses. In its simplest form the centering
network could be a resistor divider from CD+ to CD- with its center tied to ground. As long as the impedance is
low enough (for example 200Ω) this will swamp the smaller offset currents. It is helpful to put this kind of passive
network on the board with the STA530 devices to help when testing this board on its own.

Power Amplifier Heatsink requirements

The heatsink requirements are dependent on several design goals. However there are two common references:
Pink noise at 1/8 of full power, all channels loaded. This would approximate a system with all channels repro-
ducing music at full volume with clipping occurring only occasionally. The second would be full power at 1kHz
for 5 minutes after a one hour pre-soak at 1/8 power.
The worse of these two is the full power test. A conservative approach is to assume that the heatsink would
come to thermal equilibrium after 5 minutes. Thus the Rth of the heatsink can be determined by:

12/17
 STA530

Tjmax – Tamb
R th = ---------------------------------- – Rth –j c ase – R th cas e to heatsink
Pd

For example in the STA530 the Rth jc is 1°C/W. R case-to-heatsink with grease is about 0.5 °C/W. The maxi-
mum operating junction temperature is 130 °C, which for margin should be derated to 120 °C.

Buck Regulator Heatsink

The Buck regulator heatsink can be designed in a similar manner and does not change by varying power supply.
In general the efficiency will be in the order of 85%. The thermal impedances from the junction(s) to the heatsink
may be lower and the maximum operating temperature will be higher. Usually either the sub or the remaining
channels are tested at full power. The result is that usually the Buck heatsink is about ¼ the size of the linear
heatsink, but this can be strongly affected by the design.

Figure 8. PCBs AND COMPONENTS LAYOUT

4 Pins Harness
Power Supply Connections
4 Supply Connections

Main DC
Input

VS DC
Input

Mute

Audio
Inputs

Preamplifier PCB Amplifier PCB

9 Pins Harness
Audio Connections

SAM261 Specification
Parameter Rating Notes
Output Power Sats @ 8Ω - 55 Watts @ 10% See Graphs
Sub @ 4Ω - 100 Watts @ 10%
THD + N < 0.05% @ 40 Watts Measured @ 1KHZ
< 0.05% @ 75 Watts
SNR -102 dB (relative to full power) Channel 5 terminated
-110 dB (A-weighted)
Sensitivity 1 VRMS Amplifier
Crosstalk -87dB (relative to10W) Channel 5 @ 10W 1KHz 8Ω,
Channel 3 input terminated
Main Power Supply Inputs 50Volts @ 2 Amps Maximum Voltage is 50Vdc
Minimum Voltage is 40Vdc
Aux Power Supply Inputs + 24 Volts @ 100mA
-24 Volts @ 100mA

13/17
STA530

Figure 9. THD + N FR Channel Figure 12. THD + N LF Channel

Audio Precision Audio Precision

10 10

5 5

2 2

1 1

0.5 0.5
% %
0.2 0.2

0.1 0.1

0.05 0.05

0.02 0.02

0.01 0.01
2.5 5 7.5 10 12.5 15 17.5 20 22.5 25 27.5 30 32.5 35 37.5 40 42.5 45 47.5 50 52.5 55 57.5 60
5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100 105 110 115 120
W W

Figure 10. THD + N vs Frequency Figure 13. Frequency Response

Audio Precision
Audio Precision

10
+30
+29
5 +28
+27
+26
+25
2 +24
+23
+22
1 +21
+20
+19
0.5 +18
+17
% +16
dBr+15
0.2 +14
+13
+12
0.1 +11
Pout = 30W +10
+9
0.05 +8
+7
+6
+5
0.02 +4
Pout = 5W +3
+2
+1
0.01
+0 10 20 50 100 200 500 1k 2k 5k 10k 20k 40k
20 50 100 200 500 1k 2k 5k 10k 20k Hz
Hz

Figure 11. Residual Noise vs Freq - Relative to

full power

Audio Precision

+0
-10
-20
-30
-40
-50
-60
-70
dBr -80
-90
-100
-110
-120
-130
-140
-150
-160
20 50 100 200 500 1k 2k 5k 10k 20k
Hz

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 STA530

Figure 14. Application Block Diagram

+VS
STA530
-VS 4 CHANNELS

+VS MUTE MUTE

S1
-VS J1 OUT1+
MUTE CONTROL IN1
MUTE 50W OUT1- J1
RED
MUTE-BUCK CONNECTOR
OUT2+
IN2
50W OUT2- J2
WHITE
+VS +VS MUTE-BUCK
TRACK J2 OUT3+
-VS -VS IN3
PROT 50W OUT3- J3
DC++ RED
CONNECTOR
GATE-DRIVE BUCK CONTROLLER OUT4+
IN4
I-SENSE 50W OUT4- J4
CD- WHITE
CD- TRACK
CD+
CD+ PROT

1800pF
I-SENSE
DC++
L3 GATE-DRIVE STA530
CD+ CD+ 3 CHANNELS PROT
DC++ 200W BUCK
CD- CD- TRACK
15µH
MUTE
1800pF
-VS -VS
+VS J3 +VS OUT5+
50W OUT5- J5
IN5
RED
OUT6+
IN6
50W OUT6- J6
WHITE
J4 OUT7+
100W OUT7- J7
IN7
D02AU1444

15/17
STA530

mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.45 4.50 4.65 0.175 0.177 0.183 OUTLINE AND
B 1.80 1.90 2.00 0.070 0.074 0.079 MECHANICAL DATA
C 1.40 0.055
D 0.75 0.90 1.05 0.029 0.035 0.041
E 0.37 0.39 0.42 0.014 0.015 0.016
F (1) 0.57 0.022
G 0.80 1.00 1.20 0.031 0.040 0.047
G1 25.75 26.00 26.25 1.014 1.023 1.033
H (2) 28.90 29.23 29.30 1.139 1.150 1.153
H1 17.00 0.669
H2 12.80 0.503
H3 0.80 0.031
L (2) 22.07 22.47 22.87 0.869 0.884 0.904
L1 18.57 18.97 19.37 0.731 0.747 0.762
L2 (2) 15.50 15.70 15.90 0.610 0.618 0.626
L3 7.70 7.85 7.95 0.303 0.309 0.313
L4 5 0.197
L5 3.5 0.138
M 3.70 4.00 4.30 0.145 0.157 0.169
M1 3.60 4.00 4.40 0.142 0.157 0.173
N 2.20 0.086
O 2 0.079
R 1.70 0.067
R1 0.5 0.02
R2 0.3 0.12
R3 1.25 0.049
R4 0.50 0.019
V 5˚ (Typ.)
V1 3˚ (Typ.) Flexiwatt27
V2 20˚ (Typ.)
V3 45˚ (Typ.)
(1): dam-bar protusion not included
(2): molding protusion included

H
H1
V3
H2 A
H3
O

R3

R4
L4

V1
R2
N
L2

R
L L1
V1
L3

V2

R2 D
R1

L5 R1 R1
E
G G1 F
V M M1

C
V

FLEX27ME

16/17
 STA530

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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
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to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
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17/17
This datasheet has been download from:

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