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EE124 Lecture 12 Source Follower Cascode Amplifier and Current Source Mar 9 Spring 2020 Annotated PDF

This document contains lecture notes from an Electronic Design II class. It discusses reviewing the midterm exam, source follower amplifiers, and introducing cascode circuits. Looking ahead, the professor notes the material will become more difficult and exams less lenient. Students are encouraged to understand the material and seek help if needed.

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Sabeeq Karim
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0% found this document useful (0 votes)
153 views13 pages

EE124 Lecture 12 Source Follower Cascode Amplifier and Current Source Mar 9 Spring 2020 Annotated PDF

This document contains lecture notes from an Electronic Design II class. It discusses reviewing the midterm exam, source follower amplifiers, and introducing cascode circuits. Looking ahead, the professor notes the material will become more difficult and exams less lenient. Students are encouraged to understand the material and seek help if needed.

Uploaded by

Sabeeq Karim
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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3/9/2020

Electronic Design II 
(EE124‐01) Lecture 12
HIU‐YUNG WONG
MAR. 9, 2020
[email protected], Office: ENG363
http://www.sjsu.edu/people/hiuyung.wong/index.html

SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 1

Outline
Mid‐term 1 Discussion
Last slide one CG Amplifier
Source‐Follower Amplifier
Cascode Circuit
Current Mirror

SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 2

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3/9/2020

Article of the day

Here, we use an optically generated picosecond acoustic 
(strain) pulse31, propagating along the growth direction of a 
QCL, to modulate its band structure and electron transport on 
ultrafast timescales.

https://www.nature.com/articles/s41467‐020‐14662‐w
https://www.sciencedaily.com/releases/2020/02/20021109254
8.htm

SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 3

Announcement
• Mid‐term 1 graded. Solution posted. 
• Now it is time to reflect: Am I on track to get the grade I want?
• Did I do all the assignments? Low hanging fruit
• Did I attend labs and return all lab reports? Low hanging fruit
• Do I understand the materials? Talk to me. Don’t waste your 
tuition.
93% and above  A 
• Are you not happy with the class? Any comment? 92% to 88%  A minus
You can do it multiple times 87% to 84%  B plus
https://www.surveymonkey.com/r/LBZKGCJ 83% to 79%  B 
78% to 75%  B minus
74% to 72%  C plus
71% to 69%  C 
68% to 65%  C minus Required for 
64% to 62%  D plus EE Degree
61% to 59%  D 
58% to 55%  D minus
below 55%  F
SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 4

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3/9/2020

Looking Forward
More difficult materials
More difficult exam
Less relax grading 
scheme

SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 5

Syllabus

SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 6

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4/9

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Please make sure you have no conflict

SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 8

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3/9/2020

Common Source Amplifier

CMOS Amplifiers
Chapter 17
Common Gate Amplifier

Source Follower

SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 9

CG Stage with Biasing and a Review
What is RIN? (assume no CLM and C1 is large, 
note Rs is the source resistance )

vout g m RD

vin 1  1  g R RS Try to derive yourself use the 
 m 1 voltage divider method .
R1

What is the effect of biasing resistor R1?

SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 10

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3/9/2020

Source Follower Steps:

1.  Which is the input?
Which is the Output?
Why it is called common drain/source 
follower?

2.  Questions to ask yourself:
How does it work? (Large Signal)

3. Small Signal Analysis
RIN?
ROUT?
GM ?
AV?

SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 11

Analysis of Source Follower Core (Intuitive 
picture)

SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 12

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3/9/2020

Small‐signal model of Source Follower
Find the gain without and with CLM

Why it is called source follower?

SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 13

Input and Output Impedance of Source 
Follower

SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 14

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3/9/2020

Source Follower with Biasing
Version 1 Version 2
Here, assume C1 and C2
are large.

What is the input impedance? What is the gain?

What is the advantage of having M2?
What is the gain?

SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 15

Output Impedance

Cascode Stages
Chapter 9

SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 16

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3/9/2020

Review: Voltage Gain of any Linear Circuit

AV = ‐GM Rout

How to find ROUT?

SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 17

How to find GM?
iout
Gm 
vin vout  0

SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 18

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3/9/2020

Why do we need Cascode?
Purpose: To increase output impedance
Why do we want higher output impedance?

I already know how to increase output impedance by using source degeneration!

SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 19

What is Cascode Stage?

Cascode transistor

RS degeneration transistor

Is Cascode the same as Cascade?

SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 20

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3/9/2020

Cascode Stage Headroom

RS

SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 21

Simplification of Cascode Stage ROUT

SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 22

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3/9/2020

PMOS Cascode Stage
Rout

SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 23

Pen and Paper Time:  Parasitic Resistance 

SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 24

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3/9/2020

Gain

Cascode Stages
Chapter 9

SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 25

MOS Cascode Amplifier GM, Rout, Av
Ignore CLM

Why we don’t apply input to M2?

We developed the cascode concept from CS 
with degeneration. But eventually input is 
applied to the “degeneration transistor” to be 
useful in Cascode circuit. 

SJSU, EE124‐01 SPRING 2020, HIU YUNG WONG 26

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