(No. of Hours: 11) Unit II
(No. of Hours: 11) Unit II
409 L T C
Paper: ADVANCED VLSI
DESIGN 3 1 4
INSTRUCTIONS TO PAPER SETTERS: MAXIMUM MARKS: 75
1. Question No. 1 should be compulsory and cover the entire syllabus. This question should have objective or short answer type questions.
It should be of 25 marks.
2. Apart from Q. No. 1 rest of the paper shall consist of four units as per the syllabus. Every unit should have two questions. However,
student may be asked to attempt only 1 question from each unit. Each question should be of 12.5 marks.
Unit I
Review of MOS modeling , Integrated circuit layout : Matching concepts ,
MOS transistor layout, Resistor and capacitor layout Noise in integrated circuits –
Shot noise, Burst, Avalanche noise
MOS current and sources : Simple ,cascade , high swing cascade
MOS current mirrors: Simple, standard cascade, Wilson, wilder regulated
cascade.
[No. of Hours:
11]
Unit II
CMOS amplifiers: Gain calculations, frequency response of active load, current
source push pull inverters. Large signal and small signal analysis, of differential
and cascade amplifiers slow rate Qualitative discussion of output amplifiers.
CMOS opanp- Ideal opamp, characterization, classification, Two stage opamp,
miller compensation Qualitative discussion of PSRR, cascade and folded
opamp. [No. of Hours: 11]
Unit III
Comparators: Characterization, static & dynamic characteristics Two stage
open loop comparator, Auto zeroing techniques, comparator using hysteresis high
speed comparators
MOSFET switch: Charge injection, capacitive feed through sample and hold
circuits.
Switch capacitor circuits- Resistor emulation integrator, charge amplifier, switch
capacitor amplifier OTA
filters. [No. of
Hours: 11]
Unit IV
Phase Lock loop: Various stage of PLL: XOR phase detector and PFD, VCO,
current starved, loop filter
Data Converters: Current scaling DAC, Voltage scalling DAC charge scaling
DAC, Extending resolution of parallel DAC, similar scaled DACs
High speed ADCS, parallel or flash ADCS, interpolating ADCS, folding ADCS,
Multibit pipeline ADCS delta sigma modular, Decimators
filters. [No. of Hours: 11]
Text Books:
1. P. E. Allen, D. R. Holberg “CMOS Analog Circuit Design” Oxford
University Press 2002.
2. R. J. Baker, H. W. Li and D. E. Boyce, “CMOS Circuit Design, Layout and
Simulation” PHI – 2000.
Reference Books:
1. B. Razavi, “Design of Analog CMOS Integrated Circuits” TMH – 2002.
2. P. R. Gray, P. J. Hurrt, S. H. Lweic, RoG. Meyer, “Analysis and Design of
Analog Integrated Circuits” John Wiley and Sons Inc. 2001.
3. D. A. John, Ken Martin “ Analog Integrated Circuits” Wiley, 1997.
4. Geiger, Allen, Strader “VLSI Design Techniques for Analog and Digital
Circuits” Mc. Graw Hill, 1990.