SRM VALLIAMMAI ENGINEERING COLLEGE

(An Autonomous Institution)

SRM Nagar, Kattankulathur – 603 203

DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING

QUESTION BANK

Regulation : 2017

Academic Year : 2020 – 2021 Odd Semester

Class : III Year, V Semester

Subject Code : EC8553

Subject Name : Discrete Time Signal Processing

Prepared by

Dr. N. Ushabhanu, Professor / ECE

Dr. J Mohan, Associate Professor / ECE

Dr. C. Amali, Assistant Professor / ECE

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 SRMVALLIAMMAI ENGINEERING COLLEGE
(An Autonomous Institution)
SRM Nagar, Kattankulathur – 603 203

DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING

Class : III Year, V semester
Subject Code : EC8553
Subject Name : Discrete Time Signal Processing
UNIT I – DISCRETE FOURIER TRANSFORM

Review of signals and systems, concept of frequency in discrete-time signals, summary of analysis &
synthesis equations for FT & DTFT, frequency domain sampling, Discrete Fourier transform (DFT) - deriving
DFT from DTFT, properties of DFT - periodicity, symmetry, circular convolution. Linear filtering using DFT.
Filtering long data sequences - overlap save and overlap add method. Fast computation of DFT - Radix2
Decimation-in-time (DIT) Fast Fourier transform (FFT), Decimation-in-frequency (DIF) Fast Fourier
transform (FFT). Linear filtering using FFT.

PART – A

Q. Questions BT Competence
No Level

1 How will you perform linear convolution using circular convolution? BTL1 Remembering

2 Describe about relation between Discrete Fourier Transform and Discrete BTL2 Understanding
time Fourier Transform
3 Test the causality and stability of (𝑛) = sin(𝑛). BTL4 Analyzing

4 Compare energy and power signal of Discrete time signal BTL5 Evaluating

5 Discuss about overlap save method. BTL6 Creating

6 Distinguish between linear convolution and circular convolution? BTL1 Remembering

7 Write the time shifting property of DFT? BTL1 Remembering

8 Give the Parseval’s relation of DTFT. BTL1 Remembering

9 State and prove periodicity property of DFT. BTL5 Evaluating

10 Obtain the circular convolution of 𝑥(𝑛) = {1,2,3,4} ; ℎ(𝑛) = {1,1,2,2} BTL4 Analyzing

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11 Explain zero adding? What are its uses? BTL2 Understanding

12 Check and explain whether the system (𝑛) = 𝑒(𝑛) is linear or not? BTL3 Applying

13 Point out the usage of in-place computation in FFT? BTL1 Remembering

14 Identify the advantages of FFT over DFT. BTL3 Applying

15 How many stages of decimations are required in the case of a 64point radix-2 BTL3 Applying
DIT FFT algorithm?
16 Outline the concept of bit reversal in FFT? BTL2 Understanding

17 Draw the basic butterfly diagram of radix-2 DIT FFT. BTL2 Understanding

18 List the differences and similarities between DIT and DIF. Analyzing

19 What is twiddle factor? BTL1 Remembering

20 Estimate the number of multiplications required in the computation of 8-point BTL6 Creating
DFT using FFT.
PART – B
1 How will you determine the circular convolution of the following sequence BTL1 Remembering
(𝑛) = {1,1,2,1}, ℎ(𝑛) = {1,2,3,4} using DFT and IDFT method? (13)
2 Illustrate the 8-point DFT of a sequence 𝑥(𝑛) { } (13) BTL2 Understanding

3 Summarize the following properties of DFT: Periodicity, Time Reversal, BTL2 Understanding
Circular frequency shifting & Multiplication. (13)
4 Demonstrate the output y(n) of a filter whose impulse response h(n) = {1,2} BTL2 Understanding
and input signal x(n) = {1, 2, -1, 2, 3, -2, -3, -1, 1, 1, 2, -1} using overlap save
method and overlap add method. (13)
5 Construct the circular convolution of two finite duration sequences BTL6 Creating
𝑥1(𝑛) = {1, −1, −2,3, −1}; 𝑥2(𝑛) = {1,2,3}. (13)
6 (i) Show that FFT algorithm helps in reducing the number of computations BTL1 Remembering
involved in DFT computation. (7)
(ii) Discuss about overlap add method for convolution. (6)
7 Find the 8-point DFT of a given sequence (𝑛) = {1,2,2,1,1,2,2,1} using DIF- BTL1 Remembering
FFT algorithm. (13)
8 (i) Develop the steps for radix-2 DIT FFT algorithm. (7) BTL3 Applying
(ii) Solve the 8-point of a given sequence (𝑛) = 𝑛 + 1 using DITFFT
algorithm. (6)
9 Calculate IDFT of the sequence X(K) = {7, −0.707− j0.707, −j ,0.707− 0.707, BTL4 Analyzing
1, 0.707+ j0.707, j, −0.707+ j0.707 using DIT algorithm. (13)
10 Apply DIT algorithm to compute DFT of the given sequence. (𝑛) = {1, 1, 1, BTL3 Applying
1, 0, 0, 0, 0}. (13)

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11 Compute the DFT of the sequence 𝑥(𝑛) 𝑐 where 𝑁 = 4 using DIF BTL1 Remembering
FFT algorithm. (13)
12 (i) Analyze the N – point DFT of the following sequences (a) x(n) = δ(n) (b) BTL4 Analyzing
x(n) = δ(n-1). (4)
(ii) Compute 8 – point DFT of the sequence x(n) = {0, 1, 2, 3, 4,5, 6, 7} using
radix – 2 DIT algorithm? (9)
13 Examine the 8-point DFT of the sequence (𝑛) = {2,2,2,2,1,1,1,1} using BTL4 Analyzing
decimation in time FFT algorithm. (13)
14 Estimate the DFT for the sequence {1,2,3,4,4,3,2,1} using Radix-2 BTL5 Evaluating
Decimation in Frequency algorithm. (13)
PART – C

1 Using linear convolution construct 𝑦(𝑛) = 𝑥(𝑛) ∗ ℎ(𝑛) for the sequence ℎ(𝑛) BTL6 Creating
= {1,1,1} and input signal 𝑥(𝑛) = {3,−1,0,1,3,2,0,1,2,1} using overlap save
method and overlap add method. (15)

2 Estimate the DFT of the sequence 𝑥,𝑛- * + (15) BTL5 Evaluating

3 Formulate the 8-point DFT using FFT BTL6 Creating

𝑓 𝑛
𝑥,𝑛- { (15)
ℎ𝑒 ℎ
4 Evaluate the 8 point for the given sequence using DIT FFT algorithm BTL Evaluating
5
𝑓 𝑛
𝑥,𝑛- { (15)
ℎ𝑒 𝑒

UNIT II – INFINITE IMPULSE RESPONSE FILTERS

Characteristics of practical frequency selective filters. Characteristics of commonly used analog filters -
Butterworth filters, Chebyshev filters. Design of IIR filters from analog filters (LPF, HPF, BPF, BRF) -
Approximation of derivatives, Impulse invariance method, Bilinear transformation. Frequency transformation
in the analog domain. Structure of IIR filter - Direct form I, Direct form II, Cascade, Parallel realizations.
PART – A
Q.No Questions BT Competence
Level
1 Compare IIR and FIR filters. BTL 2 Understanding
2 Distinguish between recursive realization and non-recursive realization? BTL 2 Understanding
3 Convert the given analog transfer function ( ) into digital by BTL6 Creating
impulse invariant method?
4 List the different types of filters based on frequency response. BTL 1 Remembering

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5 Write the properties of Butterworth filter. BTL 1 Remembering
6 Justify why impulse invariant method is not preferred in the design of IIR BTL 5 Evaluating
filter other than LPF?
7 Identify the expression for location of poles of normalized Butterworth BTL 3 Applying
filter.
8 Why do we go for analog approximation to design a digital filter? BTL 4 Analyzing
9 Outline the steps in design of a digital filter from analog filters. BTL 2 Understanding
10 Mention the requirements for the digital filter to be stable and causal. BTL 1 Remembering
11 Discuss the need for prewarping. BTL 1 Remembering
12 Give the properties of bilinear transformation. BTL 1 Remembering
13 Use the backward difference for the derivative to convert analog LPF BTL 3 Applying
with system function H( )
14 Compare Butterworth with Chebyshev filters. BTL 2 Understanding
15 Justify why the Butterworth response is called a maximally flat response. BTL 4 Analyzing
16 Develop the parameters that can be obtained from Chebyshev filter BTL 3 Applying
specification?
17 What is the advantage of direct form II realization when compared to BTL 1 Remembering
direct form I realization?
18 How to represent the frequency warping in IIR filter? BTL 4 Analyzing
19 Compute the expression for location of poles of normalized Butterworth BTL6 Creating
filter?
20 Sketch the frequency response of an odd and even order Chebyshev low BTL 5 Evaluating
pass filters.
PART – B
1 Enumerate the steps for IIR filter design by impulse invariance with BTL1 Remembering
example. (13)
2 Obtain the direct form I ,direct form II and cascade form realization of BTL1 Remembering
the following system functions 𝑦,𝑛- 𝑦,𝑛 - 𝑦,𝑛 -
𝑥,𝑛- 𝑥,𝑛 - 𝑥,𝑛 - (13)
3 Explain the bilinear transform method of IIR filter design. What is BTL 4 Analyzing
wrapping effect? Explain the poles and zeros mapping procedure clearly.
(13)
4 Develop the steps in the design of IIR filter using bilinear transformation BTL3 Applying
for any one type of filter? (13)
5 Given the specification ∝𝑝= 3𝑑𝐵; ∝ = 16𝑑𝐵; 𝑓𝑝 = 1𝐾 𝑧; 𝑓 = 2𝐾 𝑧. BTL3 Applying
Solve for H(s) using Chebyshev approximation. (13)
6 For the given specifications, design an analog Butterworth filter BTL6 Creating
0.9 ≤ | (𝑗𝛺)| ≤ 1 𝑓 0 ≤ 𝛺 ≤ 0.2𝜋
| (𝑗𝛺)| ≤ 0.2 𝑓 0.4𝜋 ≤ 𝛺 ≤ 𝜋 (13)

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7 Convert the analog filter into a digital filter whose system function is BTL3 Remembering
( ) Use impulse invariance technique. Assume 𝑇 = 1 𝑒𝑐.
( )
(13)
8 Determine the cascade form and parallel form implementation of the BTL 5 Evaluating
system governed by the transfer function ( ) (13)
9 Analyze a digital Chebyshev filter to satisfy the constraints BTL4 Analyzing
0.707 ≤ | (𝑒 )|≤ 1 0 ≤ 𝜔 ≤ 0.2𝜋
| (𝑒 )|≤ 0.1 0.5𝜋 ≤ 𝜔 ≤ 𝜋
using Bilinear transformation and assuming 𝑇 = 1 𝑒𝑐 . (13)
10 Explain the conversion of analog BPF into digital IIR filter using BTL 2 Understanding
backward difference for the derivative ( ) (13)
( )
11 Apply Bilinear transformation to determine (𝑧) for Butterworth filter BTL3 Applying
satisfying the following specifications.
0.8 ≤ | (𝑒 )| ≤ 1 0 ≤ 𝜔 ≤ 𝜋/4
| (𝑒 )| ≤ 0.2 𝜋/2 ≤ 𝜔 ≤ 𝜋 (13)
12 Find the system function H(z) of the Chebyshevs low pass digital filter BTL1 Remembering
with the specifications
∝𝑝= 1𝑑𝐵 𝑝𝑝𝑙𝑒 𝑛 ℎ𝑒 𝑝𝑎 𝑏𝑎𝑛𝑑 0 ≤ 𝜔 ≤ 0.2𝜋;
∝ = 15𝑑𝐵 𝑝𝑝𝑙𝑒 𝑛 ℎ𝑒 𝑝 𝑏𝑎𝑛𝑑 0.3𝜋 ≤ 𝜔 ≤ 𝜋;
using bilinear transformation assume 𝑇 = 1 𝑒𝑐. (13)
13 An Analog filter has a transfer function BTL 2 Understanding
( )
Design a digital filter equivalent to this using impulse invariant method
for 𝑇 = 0.2 𝑒𝑐. (13)
14 Summarize the design steeps followed by discrete time IIR filter from BTL 2 Understanding
analog filter. (13)
Part C
1 Evaluate the direct form I, direct form II, cascade and parallel form BTL 5 Evaluating
realization of LTI system governed by the equation:
𝑦(𝑛) 𝑦(𝑛 ) 𝑦(𝑛 ) 𝑦(𝑛 ) 𝑥(𝑛)
𝑥(𝑛 ) 𝑥(𝑛 ) (15)
(15)
2 Propose a digital Butterworth filter with the following specifications : BTL6 Creating
0.707 ≤ | (𝑒 )| ≤ 1 0 ≤ 𝜔 ≤ 0.5𝜋
| (𝑒 )|≤ 0.2 0.75𝜋 ≤ 𝜔 ≤ 𝜋
using bilinear transformation determine system function (𝑍) assuming
𝑇 = 1 𝑒𝑐. (15)

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3 For the given specifications, design an digital Butterworth filter using BTL 5 Evaluating
impulse invariance method satisfying the constraints. Assume T=1sec
0.8 ≤ | (𝑒 )| ≤ 1 0 ≤ 𝜔 ≤ 0.2𝜋
| (𝑒 )| ≤ 0.2 0.6𝜋 ≤ 𝜔 ≤ 𝜋 (15)
4 Develop a third order Butterworth digital filter using impulse invariant BTL 6 Creating
technique. Assume the sampling period 𝑇 = 1 𝑒𝑐 (15)

UNIT III - FINITE IMPULSE RESPONSE FILTERS

Design of FIR filters - symmetric and Anti-symmetric FIR filters - design of linear phase FIR filters using
Fourier series method - FIR filter design using windows (Rectangular, Hamming and Hanning window),
Frequency sampling method. FIR filter structures - linear phase structure, direct form realizations
PART - A
Q. BT
Questions Competence
No Level
1. Name the different types of filters based on frequency response. BTL 1 Remembering

2. List the advantages of FIR filters. BTL 2 Understanding

Assess the necessary and sufficient condition for the linear phase BTL 4 Analyzing
3.
characteristic of an FIR filter.
Develop the frequency response of linear phase LTI system with BTL 6 Creating
4.
constant phase delay and constant group delay.
5. Outline the causes of phase distortions and delay distortion. BTL 1 Remembering

6. Identify the significance of linear phase response. BTL 3 Applying

7. State the conditions for a digital filter to be causal and stable. BTL 2 Understanding

Discuss the two concepts that lead to the Fourier series method for BTL 3 Applying
8.
designing FIR filters.

9. Write the hanning window sequence for the design of FIR filter. BTL 2 Understanding

10. Define Gibbs phenomenon. BTL 1 Remembering

Summarize the need for employing window technique for FIR filter BTL 2 Understanding
11.
design?
12. Points out the desirable characteristics of FIR filter using windows. BTL 1 Remembering
13. Sketch the frequency response of N-point rectangular windows. BTL 3 Applying
14. Compare Hamming and Hanning window. BTL 5 Evaluating
15. Give the advantages of rectangular window function. BTL 1 Remembering
16. Analyze the mathematical problem involved in the design of BTL 4 Analyzing

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 window function?
Justify that frequency-sampling method is suitable for narrow band BTL 4 Analyzing
17.
filters.
18. Draw the direct form realization of FIR filter. BTL 6 Creating
19. What is the reason that FIR filter is always stable?. BTL 1 Remembering
20. How the zeros in FIR filter is located?. BTL 5 Evaluating
PART - B
Show that an FIR filter has linear phase if the unit sample response
1. satisfies the condition ℎ(𝑛) ℎ(𝑁 𝑛). Also discuss BTL 1 Remembering
symmetric and antisymmetric case of FIR filter when 𝑁 is even. (13)
Design an ideal low pass filter with a frequency response
𝜋 𝜋
𝑓 𝜔
2. 𝑑(𝑒 ) { 𝜋
BTL 4 Analyzing
𝑓 |𝜔| 𝜋
Find the values of ℎ(𝑛) for 𝑁 . Find (𝑧). (13)
Using a rectangular window technique, Illustrate a low pass filter
with pass band gain of unity, cut-off frequency of 1000 Hz and BTL 2 Understanding
3.
working at a sampling frequency of 5 KHz. The length of the
impulse response should be 7. (13)
By Choosing N = 7,design a filter with
𝜋
𝑒 𝑓 |𝜔|
4. 𝑑(𝜔) { 𝜋
BTL 1 Remembering
|𝜔| 𝜋
Using Hamming window. (13)
(i) A band reject filter of length 7 is required it is to have lower and
upper cut off frequencies of 3kHz and 5 kHz respectively. The
sampling frequency is 20 kHz. Discover the filter coefficient using BTL 4 Analyzing
5.
hanning window. (11)
(ii) Inspect the frequency domain characteristics for Rectangular and
Hanning Window. (2)
How to design a FIR band stop filter to reject frequencies in the
6. range 1.2 to 1.8 rad/sec using hamming window, with length 𝑁 . BTL 3 Applying
(13)
Design an FIR filter approximating the ideal frequency
response
𝜋 BTL 2 Understanding
7. 𝑒 𝑓 |𝜔|
𝑑(𝜔) { 𝜋
|𝜔| 𝜋

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 Determine the filter coefficients for N=7 using Hamming window.
(13)
8. Develop the procedure of designing FIR filters by windows. (13) BTL 1 Remembering
Construct a low pass filter using frequency sampling method with
9. the following specifications; cut off frequency 𝜔 𝜋 and N=15 BTL 6 Creating
and plot the magnitude response. (13)
Obtain the direct form and cascade form realizations of the
10. following system equation BTL 2 Understanding
y(n) = 0.1 y(n-1) + 0.2 y(n-2) + 3x(n) +3.6x(n-1) + 0.6 x(n-2) (13)
Examine the design procedures of FIR filter using frequency- BTL 4 Analyzing
11.
sampling method. (13)
Evaluate the direct form I & II structure of the system function BTL 5 Evaluating
12.
(𝑧) 𝑧 𝑧 𝑧 𝑧 (13)
What is the need for realization of FIR filters?. Summarize about the BTL 1 Remembering
13.
different types of linear phase FIR structures. (13)
Construct a direct form and linear phase FIR structures with the
following impulse response. Which is the best realization and why?
14. BTL 3 Applying
ℎ(𝑛) (𝑛) (𝑛 ) (𝑛 ) (𝑛 ) (𝑛 ).
(13)

PART - C
(i) Develop the linear phase structure of FIR filter with the following
impulse response ℎ(𝑛) (𝑛) (𝑛 ) (𝑛 )
1. (𝑛 ) (𝑛 ) (8) BTL 5 Evaluating
(ii) Explain the steps involved by the general process of designing a
digital filter. (7)
Prove that an FIR filter has linear phase if the unit sample response
2. satisfies the condition ℎ(𝑛) ℎ(𝑁 𝑛). Also discuss BTL 5 Evaluating
symmetric and antisymmetric case of FIR filter when N is odd. (15)
Design an ideal high pass filter using hanning window with a
frequency response
𝜋
𝑓 |𝜔| 𝜋
3. BTL 6 Creating
(𝑒 ) { 𝜋
𝑓 |𝜔|
Assume 𝑁 . (15)
Demonstrate the coefficients of a linear phase FIR filter of
length which has a symmetric unit sample response
4. BTL 6 Creating
and a frequency response that satisfies the conditions.

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 𝜋
( ) { }
(15)

UNIT - IV FINITE WORD LENGTH EFFECTS

Fixed point and floating point number representation - ADC - quantization - truncation and rounding -
quantization noise - input / output quantization - coefficient quantization error - product quantization error -
overflow error - limit cycle oscillations due to product quantization and summation - scaling to prevent
overflow.
PART - A
BT
Q.No Questions Competence
Level
1. List the different types of fixed point arithmetic. BTL1 Remembering
2. Define truncation. BTL1 Remembering
3. Point out the causes of round off noise error. BTL1 Remembering
4. Write about the over flow oscillations. BTL 1 Remembering
5. State about the dead band of a filter. BTL1 Remembering
6. Discuss about the saturation arithmetic. BTL1 Remembering
7. Outline about the input quantization error and product quantization
BTL2 Understanding
error.
8. Interpret how the digital filter is affected by quantization of filter BTL2 Understanding
coefficients?
9. Identify the causes of limit cycle oscillations. BTL2 Understanding
10. What do you infer from signal scaling? BTL2 Understanding
11. Categorize the differences between fixed point and floating point BTL3 Applying
number representations.
12. Illustrate zero input limit cycle oscillation. BTL3 Applying
13. Compute the method to eliminate overflow limit cycles. BTL3 Applying
14. Differentiate truncation with rounding errors. BTL4 Analyzing
15. Summarize the effects of finite word length in digital filters. BTL4 Analyzing
16. Examine the different quantization methods. BTL4 Analyzing
17. Why we select rounding over truncation in realizing digital filter. BTL5 Evaluating
18. Assess the advantages of floating point arithmetic. BTL5 Evaluating
19. Develop the types of quantization errors occur in digital system. BTL6 Creating
20. Construct truncation error for sign magnitude representation and for BTL6 Creating

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 2’s complement representation.
PART – B

(i) Describe in detail about finite word length effects in digital

filters. (6)
(ii) Determine the variance of the round of noise power at the
1. BTL1 Remembering
output of cascade realization of the filter is as described by the
transfer function (𝑧) (𝑧) (𝑧).Where
(𝑧) 𝑎𝑛𝑑 (𝑧) . (7)

2. Describe the quantization process and errors introduced due to BTL1 Remembering
quantization. (13)

For the second order IIR filter, the system function is,
(𝑍) BTL1 Remembering
3. ( 𝑧 )( 𝑧 )
Examine the effect of shift in pole location with 3 bit coefficient
representation in direct and cascade forms. (13)
(i) Write a note on Limit Cycle oscillation. (3)
(ii) Explain the characteristics of limit cycle oscillations to
4. the system described by the difference equation y(n)= BTL1 Remembering
0.95y(n-10+x(n); x(n)=0 and y(n-1)=13. Determine the
dead band of the system. (10)
(i) Explain the characteristics of a limit cycle oscillation with
respect to the system described by the equation 𝑦(𝑛)
5. ) 𝑥(𝑛) Estimate the dead band of the filter. BTL2 Understanding
𝑦(𝑛
(Assume sign magnitude is 4 bit). (7)
(ii) Illustrate Zero input limit cycle oscillation. (6)
(i)Explain in detail the input quantization error and coefficient
quantization error and its effect on digital filter design, with an
6. example. (6) BTL2 Understanding
(ii) Illustrate quantization noise. Summarize the expression for
quantization noise power at the output ADC. (7)
7. Summarize the need for scaling and derive the scaling factor for a BTL2 Understanding
second order IIR filter. (13)
Consider the recursive filter y(n)= 0.8y(n-1)+x(n). The input x(n)
8. has a range of values represented by 8 bits. Compute the BTL3 Applying
variance of the output due to Analog to Digital conversion system.
(13)
An IIR causal filter has the system function (𝑧) .Assume
9. that the input signal is zero valued and the computed output signal BTL3 Applying
values are rounded to one decimal place. Show that under those
stated conditions, the filter output exhibits dead band effect. What is
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 the dead band range? (13)
Analyze the behavior of limit cycle oscillation with respect to the
system described by the following equation𝑦(𝑛) 𝑦(𝑛 )
10. 𝑥(𝑛).Determine the dead band of the system when 𝑥(𝑛) and BTL4 Analyzing
𝑦( ) Assume that the product is quantized to 4 bits by
rounding. (13)

The input to the system 𝑦(𝑛) 𝑦(𝑛 ) 𝑥(𝑛)is applied to

11. BTL4 Analyzing
an ADC. Calculate the power produced by the quantization noise at
the output of the filter if the input is quantized to 8 & 16 bits. (13)

(i) Represent the following numbers in floating point format with

five bits for mantissa and three bits for exponent.
12. (a) 710 (4) BTL4 Analyzing
(b)0.2510 (3)
(ii) Compare fixed and floating point representation. (6)
(i)Determine the errors during resulting from truncation and
rounding. (10)
13. BTL5 Evaluating
(ii)Explain the various formats of the fixed point representation of
binary numbers. (3)

Derive the steady state output noise power and find the steady state
14. variance of the noise in the output due to quantization of input for BTL6 Creating
the first order filter 𝑦(𝑛) 𝑎 𝑦(𝑛 ) 𝑥(𝑛) (13)

PART –C
The output of an A/D converter is applied to a digital filter with the

1. system function; ( ) . Formulate the output noise power BTL6 Creating

from the digital filter when the input signal is quantized to have 8
bits. (15)
i) For the digital network shown find H(Z) and scale factor S0 to
avoid overflow in register A1 (10)

2. BTL5 Evaluating

(ii)Explain the need for signal scaling with necessary derivations

(5)

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 Examine the effect of coefficient quantization on pole locations of
the second order IIR system realised in Direct Form I and in
Cascade. Assume word length of 4 bits through truncation. The
3. BTL5 Evaluating
transfer function of the realization is given as follows.
(𝑧) (15)

Consider the transfer function where (𝑧) (𝑧) (𝑧)

Let (𝑧) (𝑧) (𝑧) i.e.,
BTL6 Creating
4. ( ) ( )
Estimate the output round off noise power. Assume b = 3.
(excluding Sign Bit) (15)

UNIT V - INTRODUCTION TO DIGITAL SIGNAL PROCESSORS

DSP functionalities - circular buffering – DSP architecture – Fixed and Floating point architecture principles –
Programming – Application examples.
PART – A
BT Competence
Q.No Questions
Level
1. List the applications of DSP. BTL 1 Remembering
2. What is the role of the pipeline operation in a Digital Signal Processor? BTL 1 Remembering
3. Mention the buses used in digital signal processors? BTL 1 Remembering
4. Define circular buffering. BTL 1 Remembering
5. Brief the features of MAC unit. BTL 1 Remembering

6. Point out the classification of instruction set in Digital Signal

BTL 1 Remembering
Processor?
7. Outline the different phases in pipelining process. BTL 2 Understanding
8. Compare the difference between Von Neumann architecture &
BTL 2 Understanding
Harvard architecture.
9. Enumerate the advantages and disadvantages of VLIW architecture. BTL 2 Understanding
10. Categorize the addressing modes of TMS320C54XX processor. BTL 2 Understanding
11. Illustrate the need of accumulator. BTL 3 Applying
12. Identify any two logical instruction of DS processor. BTL 3 Applying
13. Specify the features of a Digital Signal Processor over Microcontroller? BTL 3 Applying
14. Write a program to add to numbers in DSP Processor. BTL 4 Analyzing
15. Distinguish between fixed and floating point arithmetic? BTL 4 Analyzing
16. How the DS Processor pipeline differs from micro controller. BTL 4 Analyzing
17. Explain the features to select digital signal processor. BTL 5 Evaluating
18. Conclude the various addressing modes of TMS32050. BTL 5 Evaluating
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19. Examine the arithmetic instructions of C5x processor. BTL 6 Creating
20. Elaborate the major functional units present in TMS32050. BTL 6 Creating
PART – B
1. List and explain the various types of addressing modes of digital
BTL 1 Remembering
signal processor with suitable example. (13)
(i) What are the factors used to select a Digital Signal processor? (5)
2. (ii) Write in detail about few applications of programmable digital BTL 1 Remembering
signal processor. (8)
3. Give a detailed note about arithmetic instructions with necessary
BTL 1 Remembering
syntax (13)
(i) Name the different types of MAC functions in Digital
4. Signal processor. (3)
BTL 1 Remembering
(ii) Describe about VLIW architecture and its advantages and
disadvantages. (10)
(i) Outline about different stages of pipelining and specify its
5. importance. (6)
BTL 2 Understanding
(ii) Mention the features of Von Neumann and Harvard
architectures. (7)
6. With neat sketch explain the architecture of TMS320C54x processor. BTL 2 Understanding
(i) Specify the role of accumulator in TMS320C54x processor. (5)
7. (ii) Show the functionality of barrel shifter in TMS320C54x processor BTL 2 Understanding
with neat sketch. (8)
8. (i) Identify the need of MAC and its application in PDSP’s.. (8)
BTL 3 Applying
(ii) List the instruction set of Digital Signal processor. (5)
(i) Examine the applications of PDSP’s. (5)
9. (ii) Develop a simple program to generate square and saw tooth wave BTL 3 Applying
form. (8)
10. Draw and explain the bus structure and CPU of TMS320C50x . (13) BTL 4 Analyzing

11. Enumerate the various on chip peripherals in TMS320C54x

BTL 4 Analyzing
processor. (13)
12. Examine about CSSU and Exponent encoder of TMS320C54x. (13) BTL 4 Analyzing
13. Evaluate about Arithmetic Logic Unit with neat functional diagram
BTL 5 Evaluating
of TMS320C54x (13)
14. Discuss about the principle of operation of floating point architecture
BTL 6 Creating
with necessary diagram. (13)
PART C

1. Elaborate in detail about the architecture of TMS 320C5416 Digital

BTL 6 Creating
Signal Processor with neat sketches. (15)
2. Discuss in detail with syntax for any six instructions used in
BTL 5 Evaluating
TMS320C50X processors. (15)
Develop a suitable algorithm and illustrate the memory access used
3. to calculate the value of the function Y= A*X1+B*X2+C*X3. Write BTL 6 Creating
the necessary assembly code in TMS320C50 processor. (15)

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 With neat functional diagram elaborate the following features of
TMS320C54X :
4. (i) Multiplier / Adder Unit (8) BTL 5 Evaluating
(ii) Barrel Shifter (7)

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