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DLD Lab No. 14

This document describes an experiment to design and test a sequential digital circuit to control a traffic signal. The circuit uses D flip-flops and logic gates to implement a 4-state counter representing the traffic light states. Students are asked to complete the design by filling in a state table and schematic. They then build the circuit on a breadboard, including switches to simulate inputs. The goal is to step through the 4 states, representing the light sequences, by controlling the inputs as specified in a provided state diagram.

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0% found this document useful (0 votes)
56 views6 pages

DLD Lab No. 14

This document describes an experiment to design and test a sequential digital circuit to control a traffic signal. The circuit uses D flip-flops and logic gates to implement a 4-state counter representing the traffic light states. Students are asked to complete the design by filling in a state table and schematic. They then build the circuit on a breadboard, including switches to simulate inputs. The goal is to step through the 4 states, representing the light sequences, by controlling the inputs as specified in a provided state diagram.

Uploaded by

rizwan900
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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International Islamic University Islamabad

Faculty of Engineering and Technology

Department of Electrical Engineering

DIGITAL LOGIC DESIGN LAB

Experiment No. 14: Application of Sequential Digital Circuit (The Traffic Signal

Controller)

Name of Student: …………………………………..

Roll No.: ……………………………………………

Section: …………………………………………….

Date of Experiment: ………………………………..

Objectives
 Complete the design of a sequential counter that is controlled by input variables.
 Construct and test the circuit from the first objective.

Experiment No. 14: Application of Sequential Digital Circuit (The Traffic Signal Controller) Page 1
Equipment Required:
 DMM
 Logic Probe
 Breadboard
 Digital Trainer
 IC: 7408 quad AND gate [Qty = 1]
 IC: 7474 dual D flip-flop [Qty = 1]
 IC: 74121 one-shot [Qty = 1]
 IC: 74LS153 dual data selector [Qty = 1]
 Capacitor: 150-uF [Qty = 1]
 Red LEDs [Qty = 2]
 Resistors: 330-Ω [Qty =2], 1-kΩ [Qty =6]
 Connecting Wires
Theory:
A synchronous counter forms the heart of many small digital systems. The traffic signal
controller uses a small synchronous counter to represent each of the four possible “states”
that the output can take. The state of the counter in the traffic signal controller is determined
by three input variables and two state variables. When certain conditions of these variables
are met, the counter advances to the next state. The three input variables are defined as
follows:
Vehicle on side street = Vs
25 s timer (long timer) is on = TL
4 s timer (short timer) is on = Ts
The use of complemented variables indicates the opposite conditions. A state diagram
is repeated in Figure 14.1 for reference. Based on this state diagram, the sequential
operation is described as follows:
1st state: The counter shows the Gray code 00, representing main-green, side-red. It will
̅̅̅).
stay in the first state if the long timer is on or if there is no vehicle on the side street (TL + Vs
It will go to the second state if the long timer is off and there is a vehicle on the side street
̅̅̅̅ Vs).
(TL
2nd state: The counter shows 01, representing main-yellow, side-red. It will stay in the
second state if the short timer is on (Ts). It will go to the third state if the short timer is off
̅̅̅).
(Ts
3rd state: The counter shows 11, representing main-red, side-green. It will stay in the third
state if the long timer is on and there is a vehicle on the side street (TLVs). It will go to the
fourth state if the long timer is off or there is no vehicle on the side street (TL̅ + Vs
̅̅̅).

Experiment No. 14: Application of Sequential Digital Circuit (The Traffic Signal Controller) Page 2
Figure 14.1
4th state: The counter shows 10, representing main-red, side-yellow. It will stay in the fourth
state if the short timer is on (Ts). It will go to first state if the short timer is off (Ts).
The block diagram in Figure 14.2 further defines the sequential logic. The input logic
block consists of two data selectors to route the three input variables (Vs, r L, and Ts) to the
flip-flops. This is shown in more detail in the partially completed schematic shown in the
report. The data selectors (DS-0 and DS-1) are the 74LS153 chips. The line selected (C0
through C3) is determined by the present state (because the flip-flop outputs are connected
to the select inputs).

Figure 14.2: Block Diagram of Sequential Logic


In this experiment, you will design and construct a portion of the system. To make our
simulation more realistic, it will be helpful to have the short timer working. The same IC will
be used but the trigger connections will be different since the trigger logic is not available for
this part of the experiment. From the next-state table, it can be seen that the short timer
should be ON in the second and fourth states (Gray codes 01 and 10). Triggering will be set

Experiment No. 14: Application of Sequential Digital Circuit (The Traffic Signal Controller) Page 3
up so that the short timer will trigger on the trailing edge of the clock, causing it to start in any
state. This won’t matter for this experiment because it is tested only to move into states 00
and 11. The trailing edge is used for triggering the short timer because the outputs change
on the leading edge. This avoids a “race” condition where the clock and states change
together. The triggering for this experiment is shown in Figure 14.3. The present state-next
state table with input conditions is shown in Table 14.1 of the report. Each pair of lines in
Table 14.1 represents the two possible states that the counter could assume. For example,
on the first pair of lines, the counter is in the first state (Gray code 00) and could either stay
in the first state (Gray code 00) or go to the second state (Gray code 01), depending on the
long timer and vehicle sensor inputs. Notice that in the first state (Gray code 00), the next
state for Qx requires that it remain a 0 no matter what the inputs do, so a 0 is entered for the
product term for data selector-1 (DS-1). On the other hand, Q0 will be a 1 only if the long
timer is LOW (timed out) and the vehicle sensor is HIGH (vehicle waiting). Thus, the input
product term for DS-0 is TLVS. As one more example, notice that in the second state (Gray
code 01), the next state for Q0 will be a 1 no matter what the inputs do, so a 1 is entered in
the table.

Figure 14.3

Experiment No. 14: Application of Sequential Digital Circuit (The Traffic Signal Controller) Page 4
Procedure:
a. Review the Theory section to be sure, you understand the idea for the circuit. The
present state-next state table with input conditions is shown in Table 14.1 of the report.
Three of the inputs for the data selectors are completed as an example. Decide what to
do with the remaining inputs and complete the remaining five inputs in Table 14.1.
b. From the inputs determined in Step 1, complete the schematic shown in Figure 14.4 of
the report. Show the inputs to each data selector and the enable. Note that the select
lines of the data selectors are connected to the outputs of the flip-flops.
c. To simulate the inputs, construct only the short timer shown in Figure 14.3. You will need
to compute the value of R1 in order to make a 4 s timer. Notice that the triggering of the
short timer is different than in the full system for reasons of simplicity. The long timer and
vehicle sensor are made from SPST switches as shown in Figure 14.3. A “NOTed”
variable, such as TL, is asserted when the switch is closed.
d. On the same protoboard as the short timer and the switches representing the long timer
and vehicle sensor, add the sequential logic in Figure 14.4. The LEDs serve as state
indicators. Connect all inputs in accordance with your design in Step 1. Set the pulse
generator to 10 kHz.
e. The state diagram (Figure 14.1) will guide you through the inputs required for the
sequence in order to test the circuit. Start by opening the long timer and vehicle sensor
switches (both HIGH). Place the counter in the first state (Gray code 00) by placing a
momentary ground on the CLR inputs. In this condition, a vehicle is assumed to be on
the side street (because Vs is HIGH) but the long timer has not finished the cycle on the
main street. Close the long timer switch. This should immediately cause the circuit to go
into the second state (Gray code 01), and the 4 s short timer should take over. While the
4 s timer is on, open the long timer switch again. The circuit should switch by itself (after
4 s) to the third state (Gray code 11).
f. If you successfully arrived in the fourth state (Gray code 10), look at the state diagram
and decide what steps need to be taken to return to the first state and remain there.
Then, use the switches to move back to the first state. Summarize your results in the
Results and Conclusion section.

Experiment No. 14: Application of Sequential Digital Circuit (The Traffic Signal Controller) Page 5
Table 14.1

Figure 14.4

Experiment No. 14: Application of Sequential Digital Circuit (The Traffic Signal Controller) Page 6

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