Digital Modulation Techniques
Digital Modulation Techniques
Digital-to-Analog signals is the next conversion we will discuss in this chapter. These techniques are
also called as Digital Modulation techniques.
Digital Modulation provides more information capacity, high data security, quicker system availability
with great quality communication. Hence, digital modulation techniques have a greater demand, for
their capacity to convey larger amounts of data than analog modulation techniques.
There are many types of digital modulation techniques and also their combinations, depending upon
the need. Of them all, we will discuss the prominent ones.
according to the number of phase shifts. The other one is Differential Phase Shift Keying D
DPPS
SKK
M-ary Encoding
M-ary Encoding techniques are the methods where more than two bits are made to transmit
simultaneously on a single signal. This helps in the reduction of bandwidth.
The types of M-ary techniques are −
M-ary ASK
M-ary FSK
M-ary PSK
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Any modulated signal has a high frequency carrier. The binary signal when ASK modulated, gives a
zero value for Low input while it gives the carrier output for High input.
The following figure represents ASK modulated waveform along with its input.
To find the process of obtaining this ASK modulated wave, let us learn about the working of the ASK
modulator.
ASK Modulator
The ASK modulator block diagram comprises of the carrier signal generator, the binary sequence from
the message signal and the band-limited filter. Following is the block diagram of the ASK Modulator.
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The carrier generator, sends a continuous high-frequency carrier. The binary sequence from the
message signal makes the unipolar input to be either High or Low. The high signal closes the switch,
allowing a carrier wave. Hence, the output will be the carrier signal at high input. When there is low
input, the switch opens, allowing no voltage to appear. Hence, the output will be low.
The band-limiting filter, shapes the pulse depending upon the amplitude and phase characteristics of
the band-limiting filter or the pulse-shaping filter.
ASK Demodulator
The clock frequency at the transmitter when matches with the clock frequency at the receiver, it is
known as a Synchronous method, as the frequency gets synchronized. Otherwise, it is known as
Asynchronous.
The Asynchronous ASK detector consists of a half-wave rectifier, a low pass filter, and a comparator.
Following is the block diagram for the same.
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The modulated ASK signal is given to the half-wave rectifier, which delivers a positive half output. The
low pass filter suppresses the higher frequencies and gives an envelope detected output from which
the comparator delivers a digital output.
Synchronous ASK detector consists of a Square law detector, low pass filter, a comparator, and a
voltage limiter. Following is the block diagram for the same.
The ASK modulated input signal is given to the Square law detector. A square law detector is one
whose output voltage is proportional to the square of the amplitude modulated input voltage. The low
pass filter minimizes the higher frequencies. The comparator and the voltage limiter help to get a clean
digital output.
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carrier signal varies according to the digital signal changes. FSK is a scheme of frequency modulation.
The output of a FSK modulated wave is high in frequency for a binary High input and is low in
frequency for a binary Low input. The binary 1s and 0s are called Mark and Space frequencies.
The following image is the diagrammatic representation of FSK modulated waveform along with its
input.
To find the process of obtaining this FSK modulated wave, let us know about the working of a FSK
modulator.
FSK Modulator
The FSK modulator block diagram comprises of two oscillators with a clock and the input binary
sequence. Following is its block diagram.
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The two oscillators, producing a higher and a lower frequency signals, are connected to a switch along
with an internal clock. To avoid the abrupt phase discontinuities of the output waveform during the
transmission of the message, a clock is applied to both the oscillators, internally. The binary input
sequence is applied to the transmitter so as to choose the frequencies according to the binary input.
FSK Demodulator
There are different methods for demodulating a FSK wave. The main methods of FSK detection are
asynchronous detector and synchronous detector. The synchronous detector is a coherent one,
while asynchronous detector is a non-coherent one.
The block diagram of Asynchronous FSK detector consists of two band pass filters, two envelope
detectors, and a decision circuit. Following is the diagrammatic representation.
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The FSK signal is passed through the two Band Pass Filters B
BPPF
Fss , tuned to Space and Mark
frequencies. The output from these two BPFs look like ASK signal, which is given to the envelope
detector. The signal in each envelope detector is modulated asynchronously.
The decision circuit chooses which output is more likely and selects it from any one of the envelope
detectors. It also re-shapes the waveform to a rectangular one.
The block diagram of Synchronous FSK detector consists of two mixers with local oscillator circuits,
two band pass filters and a decision circuit. Following is the diagrammatic representation.
The FSK signal input is given to the two mixers with local oscillator circuits. These two are connected
to two band pass filters. These combinations act as demodulators and the decision circuit chooses
which output is more likely and selects it from any one of the detectors. The two signals have a
minimum frequency separation.
For both of the demodulators, the bandwidth of each of them depends on their bit rate. This
synchronous demodulator is a bit complex than asynchronous type demodulators.
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signal is changed by varying the sine and cosine inputs at a particular time. PSK technique is widely
used for wireless LANs, bio-metric, contactless operations, along with RFID and Bluetooth
communications.
PSK is of two types, depending upon the phases the signal gets shifted. They are −
This is also called as 2-phase PSK or Phase Reversal Keying. In this technique, the sine wave carrier
takes two phase reversals such as 0° and 180°.
This is the phase shift keying technique, in which the sine wave carrier takes four phase reversals
such as 0°, 90°, 180°, and 270°.
If this kind of techniques are further extended, PSK can be done by eight or sixteen values also,
depending upon the requirement.
BPSK Modulator
The block diagram of Binary Phase Shift Keying consists of the balance modulator which has the
carrier sine wave as one input and the binary sequence as the other input. Following is the
diagrammatic representation.
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The modulation of BPSK is done using a balance modulator, which multiplies the two signals applied
at the input. For a zero binary input, the phase will be 0° and for a high input, the phase reversal is of
180°.
Following is the diagrammatic representation of BPSK Modulated output wave along with its given
input.
The output sine wave of the modulator will be the direct input carrier or the inverted
180
180°°p
phha
asse
essh
hiif
ftte
edd input carrier, which is a function of the data signal.
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BPSK Demodulator
The block diagram of BPSK demodulator consists of a mixer with local oscillator circuit, a bandpass
filter, a two-input detector circuit. The diagram is as follows.
By recovering the band-limited message signal, with the help of the mixer circuit and the band pass
filter, the first stage of demodulation gets completed. The base band signal which is band limited is
obtained and this signal is used to regenerate the binary message bit stream.
In the next stage of demodulation, the bit clock rate is needed at the detector circuit to produce the
original binary message signal. If the bit rate is a sub-multiple of the carrier frequency, then the bit
clock regeneration is simplified. To make the circuit easily understandable, a decision-making circuit
may also be inserted at the 2nd stage of detection.
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the previous signal element. No reference signal is considered here. The signal phase follows the high
or low state of the previous element. This DPSK technique doesn’t need a reference oscillator.
It is seen from the above figure that, if the data bit is Low i.e., 0, then the phase of the signal is not
reversed, but continued as it was. If the data is a High i.e., 1, then the phase of the signal is reversed,
as with NRZI, invert on 1 a
affo
orrm
moof
fddi
ifff
feer
reen
ntti
iaalle
ennc
cood
diin
ngg .
If we observe the above waveform, we can say that the High state represents an M in the modulating
signal and the Low state represents a W in the modulating signal.
DPSK Modulator
DPSK is a technique of BPSK, in which there is no reference phase signal. Here, the transmitted
signal itself can be used as a reference signal. Following is the diagram of DPSK Modulator.
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DPSK encodes two distinct signals, i.e., the carrier and the modulating signal with 180° phase shift
each. The serial data input is given to the XNOR gate and the output is again fed back to the other
input through 1-bit delay. The output of the XNOR gate along with the carrier signal is given to the
balance modulator, to produce the DPSK modulated signal.
DPSK Demodulator
In DPSK demodulator, the phase of the reversed bit is compared with the phase of the previous bit.
Following is the block diagram of DPSK demodulator.
From the above figure, it is evident that the balance modulator is given the DPSK signal along with 1-
bit delay input. That signal is made to confine to lower frequencies with the help of LPF. Then it is
passed to a shaper circuit, which is a comparator or a Schmitt trigger circuit, to recover the original
binary data as the output.
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QPSK Modulator
The QPSK Modulator uses a bit-splitter, two multipliers with local oscillator, a 2-bit serial to parallel
converter, and a summer circuit. Following is the block diagram for the same.
At the modulator’s input, the message signal’s even bits (i.e., 2nd bit, 4th bit, 6th bit, etc.) and odd bits
(i.e., 1st bit, 3rd bit, 5th bit, etc.) are separated by the bits splitter and are multiplied with the same
carrier to generate odd BPSK (called as PSKI) and even BPSK (called as PSKQ). The PSKQ signal is
anyhow phase shifted by 90° before being modulated.
The QPSK waveform for two-bits input is as follows, which shows the modulated result for different
instances of binary inputs.
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QPSK Demodulator
The QPSK Demodulator uses two product demodulator circuits with local oscillator, two band pass
filters, two integrator circuits, and a 2-bit parallel to serial converter. Following is the diagram for the
same.
The two product detectors at the input of demodulator simultaneously demodulate the two BPSK
signals. The pair of bits are recovered here from the original data. These signals after processing, are
passed to the parallel to serial converter.
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The word binary represents two bits. M represents a digit that corresponds to the number of
conditions, levels, or combinations possible for a given number of binary variables.
This is the type of digital modulation technique used for data transmission in which instead of one bit,
two or more bits are transmitted at a time. As a single signal is used for multiple bit transmission, the
channel bandwidth is reduced.
M-ary Equation
If a digital signal is given under four conditions, such as voltage levels, frequencies, phases, and
amplitude, then M = 4.
The number of bits necessary to produce a given number of conditions is expressed mathematically
as
N
N =
= log
log2 M
M
2
Where
N is the number of bits necessary
M is the number of conditions, levels, or combinations possible with N bits.
N
N
2
2 =
= M
M
In general, Multi-level M
M −
−aar
ryy modulation techniques are used in digital communications as the
digital inputs with more than two modulation levels are allowed on the transmitter’s input. Hence, these
techniques are bandwidth efficient.
There are many M-ary modulation techniques. Some of these techniques, modulate one parameter of
the carrier signal, such as amplitude, phase, and frequency.
M-ary ASK
P
PAAM
M .
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S
Sm (t) = A mc
m (t) = Am co
oss(
(22π
πffc t)
c t)
A
Am ϵ(2m − 1 − M )Δ, m = 1, 2... . M
m ϵ(2m − 1 − M )Δ, m = 1, 2... . M
a
annd
d
0
0 ≤
≤ t
t ≤
≤ T
Tss
M-ary FSK
−
−−
−−
−
2
2EEs
s
π
π 0
0 ≤
≤ t
t ≤
≤ T
Tss
a
annd
d i
i =
= 1
1,, 2
2,, 3...
3... .. .. M
M
S
Sii (
(tt)
) =
= √
√ cos
cos(( (
(nnc + i) t)
c + i) t)
T
Ts T
Tss
s
n
ncc
Where f
fc =
c = 2
for some fixed integer n.
2TTs
s
The bandwidth efficiency of M-ary FSK decreases and the power efficiency increases with the
increase in M.
M-ary PSK
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−
−
−
−−
−
2
2EE 0
0 ≤
≤ t
t ≤
≤ T
T a
annd
d i
i =
= 1
1,, 2
2.. .. .. M
M
S
Sii (
(tt)
) =
= √
√ cos
cos((w
wo t + ϕ it
o t + ϕi t)
)
T
T
2
2ππi
i
ϕ
ϕii (
(tt)
) =
= w
whhe
erre
e i
i =
= 1
1,, 2
2,, 3
3.. .. .. .. .. .. M
M
M
M
The bandwidth efficiency of M-ary PSK decreases and the power efficiency increases with the
increase in M.
So far, we have discussed different modulation techniques. The output of all these techniques is a
binary sequence, represented as 1s and 0s. This binary or digital information has many types and
forms, which are discussed further.
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