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Course Syllabus: Medina College Ipil, Inc

This document provides a course syllabus for a Digital Logic and Design course. The syllabus outlines the course code, name, credits, description, mode of delivery, pre-requisites, total hours, vision, mission, goals, and program and course learning outcomes. It details the assessment indicators, due dates, and breakdown of student learning time between face-to-face and online components. Modules 1-3 are also summarized, outlining their learning outcomes relating to data, number systems, digital and analog systems, and number formats.

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0% found this document useful (0 votes)
99 views

Course Syllabus: Medina College Ipil, Inc

This document provides a course syllabus for a Digital Logic and Design course. The syllabus outlines the course code, name, credits, description, mode of delivery, pre-requisites, total hours, vision, mission, goals, and program and course learning outcomes. It details the assessment indicators, due dates, and breakdown of student learning time between face-to-face and online components. Modules 1-3 are also summarized, outlining their learning outcomes relating to data, number systems, digital and analog systems, and number formats.

Uploaded by

Kobe Bry
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 14

MEDINA COLLEGE IPIL, INC.

Don Andres Ipil Zamboanga Sibugay

BACHELOR OF SCIENCE IN COMPUTER SCIENCE


1ST Semester Academic Year 2020 – 2021
COURSE SYLLABUS
.

COURSE CODE: CS 301 COURSE NAME: DIGITAL LOGIC & DESIGN COURSE CREDITS: 3.0 UNITS
FLEXIBLE LEARNING MODE INTRODUCTION TO
ONLINE MWF 10AM-11AM PRE-REQUISITE: TYPE OF COURSE: Lecture & Lab
(Contact Hour): COMPUTING
COMPUTER
PRE-REQUISITE COURSE TO: ORGANIZATION AND TOTAL NO. OF HOURS INCLUDING LAB SESSION: 54.0 hours (3 HOURS/WEEK)
ARCHITECTURE
COURSE This course provides an overview of the principles underlying number systems, logic gates, Fixed-Point Representation, Boolean Function, Boolean algebra,
DESCRIPTION: combinational and sequential logic circuits, flip-flops, registers, and PLAs.
VISION: An educational community of men and women dedicated to the formation of the whole person with professional commitment to promote local, regional and global
development.
MISSION: As an institution of learning
The college commits itself to offer a well-rounded program of liberal education and to provide varied opportunities for students to grow professionally,
spiritually, socially and culturally and in the pursuit of the mission: Medina Colleges is guided by the following commitments:

As a Christian community, it welcomes faculty, staff and students with other religious beliefs and respects the religious freedom of every member, while
providing opportunities for them to grow in their faith-life.

As an academic community, it offers quality and responsive education to prepare its graduates to be skilled professionals for national and global
competitiveness.

As a Filipino community, it promotes the formation of the student’s awareness of their civil and social responsibilities and development of the student’s pride for
the nation rich in cultural heritage.
GOALS: Respect Service Love of Country
Integrity God Fearing
Social Responsibilities Long Life Learning

SE101 Page 1 of 14
MEDINA COLLEGE IPIL, INC.
Don Andres Ipil Zamboanga Sibugay

BACHELOR OF SCIENCE IN COMPUTER SCIENCE


1ST Semester Academic Year 2020 – 2021
COURSE SYLLABUS

PROGRAM GRADUATE

MCLO1

MCLO2

MCLO3
ATTRIBUTES (Applicable PROGRAM GRADUATE OUTCOMES (Applicable to the Course):

:
to the Course):
Identify, analyze, formulate, research literature, and solve complex computing problems and requirements reaching
PROBLEM ANALYSIS substantiated conclusions using fundamental principles of mathematics, computing sciences, and relevant domain   
disciplines
DESIGN/ DEVELOPMENT An ability to apply mathematical foundations, algorithmic principles and computer science theory in the modeling and design
OF SOLUTIONS of computer based systems in a way that demonstrates comprehension of the tradeoffs involved in design choices.   
COURSE LEARNING OUTCOMES
ATTRIBUTES OUTCOMES INDICATORS DUE DATE
EFFECTIVE MCLO1: Build an understanding of the principle of Digital Documented project requirements September 2, 2020
COMMUNICATOR logic Design and the physical phenomenon that can be specifications following computing JQXQ-9CP8-GQKX3
(K) used to transmit digital information. industry standards PDF format not exceeding100MB
October 2, 2020
MCLO2: apply in some specific areas of networking such JQXQ-9CP8-GQKX3
SKILLED
as the design and maintenance of individual networks and Project Design using Circuit Maker PDF, Video (mp4), Slide Deck
PROFESSIONAL
Familiarize the basic taxonomy and terminology of the Application files not exceeding100MB each file.
(S)
computer networking area.
December 2, 2020
MCLO3: Function effectively on team recognizing the JQXQ-9CP8-GQKX3
TEAMPLAYER (A) roles within a different ways of organizing team to Project Presentation with Video Clip PDF, Video, Document, and Slide Deck,
accomplish common goals. files not exceeding 100MB each file.

TOTAL STUDENT LEARNING TIME (SLT) Face to Face Online Learning SLPA TLT

TL T P SCL/O A OL OA

SE101 Page 2 of 14
MEDINA COLLEGE IPIL, INC.
Don Andres Ipil Zamboanga Sibugay

BACHELOR OF SCIENCE IN COMPUTER SCIENCE


1ST Semester Academic Year 2020 – 2021
COURSE SYLLABUS

TL = Traditional Lecture
T = Tutorial 5 5
P = Practical 15 3 18
SCL/O = Student Centered Learning/Others 12 12
O = Others
A = Assessment 2 2 4
OL = Online Learning
OA = Online Assessment
SLPA = Self Learning Preparation &
15 15
Assessment
TLT = Total Learning Time 54

SE101 Page 3 of 14
MEDINA COLLEGE IPIL, INC.
Don Andres Ipil Zamboanga Sibugay

BACHELOR OF SCIENCE IN COMPUTER SCIENCE


1ST Semester Academic Year 2020 – 2021
COURSE SYLLABUS
PRELIMS MODULE 1 -3 (Module 1.pptx, Module 2. pptx, Module 3. pptx)  presentation slide and Documents

Module Learning Outcomes:


At the end of this module, the students must be able to:
1 Explain and define Data and Number System;
2 Understand and explain Digital System;
3 Identify the role of Analog and digital Systems in Information Processing;
4 Examine the main number formats and number operations used in Digital Machines;
5 Identify the different of Complement Arithmetic ;
6 Understand the data and number system.

TEACHING & LEARNING MODALITIES


(ACTIVITIES/ASSESSMENT)
COURSE CONTENT/ SUBJECT MATTER/ TOPIC/OBJECTIVES
STUDENT’S ACTIVITIES ASSESSMENTS

Data And Number Systems (3 hours) Principles of Digital Logic Design Overview Online Meeting
Refer to Module 1. pptx Distribution of Hand-outs (remote/no internet
Data And Number System connection)
1.1: Data And Number Systems “Number Systems Introduction -
1.1.1: Introduction Decimal, Binary, Octal, Hexadecimal & 1. Problem Solving – (link)
1.1.2: Number Systems BCD Conversions " a. INSTRUCTION
1.2.3: Conversion between Number Systems i. For self-faced
1.2.4: Complements A Saba & N. Manna - Digital Design b. RUBRICS
1.2.5: Binary Arithmetic "Data and Number System" pages 1– c. PACKAGE (form of submission)
1.2.6: 1’s and 2’s Complement Arithmetic 30)
1.2.7: Signed Binary Numbers
1.2.8: 7’s and 8’s Complement Arithmetic John Hayes  "Data and Number
1.2.9: 9’s and 10’s Complement Arithmetic System

SE101 Page 4 of 14
MEDINA COLLEGE IPIL, INC.
Don Andres Ipil Zamboanga Sibugay

BACHELOR OF SCIENCE IN COMPUTER SCIENCE


1ST Semester Academic Year 2020 – 2021
COURSE SYLLABUS
1.2.10: 15’s and 16’s Complement Arithmetic 2. Testing Activities
1.2.11: BCD Addition Digital Principles & Logic Design, Saba a. INSTRUCTION
1.2.12: BCD Subtraction & N. Manna “ Data Number system” b. RUBRICS
c. PACKAGE (form of submission)
Codes and Their Conversions (3 hours) Codes and their Conversion
Refer to Module 2. pptx 3. Online Meeting
Codes and Conversion a. Online participation in class discussion
2.1: Introduction “Code Conversion | Digital Logic using a rubric to assess the quality of
2.1.1: Codes Design participation
2.1.2: Solved Problems b. Online assessment in group presentation
A Saba & N. Manna - Digital Design using a rubric to assess the quality of
Boolean Algebra and Logic Gates (3 hours) "Code conversion" pages 31–49 participation.
Refer to Module 3. pptx c. Online assessment in the submitted report
Digital Principles & Logic Design, Saba about the evaluation of the network using a
3.1: Introduction & N. Manna “ Data Number system” rubric to assess.
3.1.1: Basic Definitions
3.1.2: Definition of Boolean Algebra FORMATIVE ASSESSMENT
3.1.3: Two-valued Boolean Algebra
3.1.4: Basic Properties and Theorems of Boolean Algebra Boolean Algebra and Logic Gates
3.1.5: Venn Diagram “Boolean algebra and Logic Gates |
3.1.6: Boolean Functions Digital Logic Design
3.1.7: Simplification of Boolean Expressions
3.1.8: Canonical and Standard Forms Boolean Algebra and Logic Gates
3.1.9: Other Logic Operators “Digital Logic Design” page 54-85
3.1.10: Digital Logic Gates
3.1.11: Positive and Negative Logic FORMATIVE ASSESSMENT
3.1.12: Concluding remarks SUMMATIVE
ASSESSMENT

SE101 Page 5 of 14
MEDINA COLLEGE IPIL, INC.
Don Andres Ipil Zamboanga Sibugay

BACHELOR OF SCIENCE IN COMPUTER SCIENCE


1ST Semester Academic Year 2020 – 2021
COURSE SYLLABUS

PRELIMS MODULE 4 -6 (Module 4.pptx, Modu le 2. pptx, Module 3. pptx)  presentation slide and Documents
Module Learning Outcomes:
At the end of this module, the students must be able to:
1 Explain and define Simplification and Minimization of Boolean Functions;
2 Understand the combination of Logic Circuits;
3 Identify the different of variables variable Karnaugh Maps ;
4 Introduce the elements of Logic Design;
5 Identify the theoretical principles underlying circuit structures and behaviors ;
6 Understand the fundamental structural properties of gate-level circuits.
7 Examine the switch-level structure .
TEACHING & LEARNING MODALITIES
COURSE CONTENT/ SUBJECT MATTER/ TOPIC/OBJECTIVES (ACTIVITIES/ASSESSMENT
STUDENT’S ACTIVITIES ASSESSMENTS
Simplification and Minimization of Boolean Functons (3 hours) Principles of Digital Logic Design Overview Online Meeting
Refer to Module 4. pptx Distribution of Hand-outs (remote/no internet
Simplification and Minimization of connection)
4.1: Introduction Boolean Functions
4.1.1: Two-variable Karnaugh Maps 1. Problem Solving – (link)
4.1.2: Three-variable Karnaugh Maps a. INSTRUCTION
4.1.3: Four-variable Karnaugh Maps A Saba & N. Manna - Digital Design i. For Online Modality
4.1.4: Five-variable Karnaugh Maps "variable Karmaugh Maps" pages 89– b. RUBRICS
4.1.5: Six-variable Karnaugh Maps 123) c. PACKAGE (form of submission)
4.1.6: Combinations
4.1.7: The Tabulation Methods John Hayes  "variable Karmaugh maps
4.1.8: Variables-entered Karnaugh Maps
Digital Principles & 2. Testing Activities
Logic Design, Saba & a. INSTRUCTION

SE101 Page 6 of 14
MEDINA COLLEGE IPIL, INC.
Don Andres Ipil Zamboanga Sibugay

BACHELOR OF SCIENCE IN COMPUTER SCIENCE


1ST Semester Academic Year 2020 – 2021
COURSE SYLLABUS
Combination Logic Circuits (3 hours) N. Manna “ Data Number system” b. RUBRICS
Refer to Module 5. pptx c. PACKAGE (form of submission)
Codes and their Conversion
5.1: Introduction 3. Online Meeting
5.1.1: Design Procedure Combination Logic Circuits d. Online participation in class discussion
5.1.2: Adders “Logic Circuits Combinatin | Digital using a rubric to assess the quality of
5.1.3: Subtractors Logic Design participation
5.1.4: Code Conversion e. Online assessment in group presentation
5.1.5: Parity Generator and Checker A Saba & N. Manna - Digital Design using a rubric to assess the quality of
5.1.6: Some Examples of Combination Logic Circuits "Code conversion" pages 125–190 participation.
5.1.7: Combination Logic with MSI and LSI f. Online assessment in the submitted report
5.1.8: Four-bit Binary Parallel Adder Digital Principles & Logic Design, Saba about the evaluation of the network using a
5.1.9: Magnitude Comparator & N. Manna “ Logic Combination” rubric to assess.
5.1.10: Decoders
5.1.11: Encoders FORMATIVE ASSESSMENT
5.1.12: Multiplexers or Data Selectors SUMMATIVE
5.1.13: Demultiplexers or Data Distributors ASSESSMENT

Sequential Logic Circuits (3 hours) Sequential Logic Circuits and Logic


Refer to Module 6. pptx Gates “Boolean algebra and Logic
Gates | Digital Logic Design
6.1: Introduction
6.1.1: Flip-flops Sequential and Logic Gates “Digital
6.1.2: Types of Flip-flops Logic Design” pages 193-238
6.1.3: Clocked S-R Flip-flop
6.1.4: Clocked D Flip-flop
6.1.5: J-K Flip-flop FORMATIVE ASSESSMENT
6.1.6: T Flip-flop SUMMATIVE

SE101 Page 7 of 14
MEDINA COLLEGE IPIL, INC.
Don Andres Ipil Zamboanga Sibugay

BACHELOR OF SCIENCE IN COMPUTER SCIENCE


1ST Semester Academic Year 2020 – 2021
COURSE SYLLABUS
6.1.7: Toggling Mode of S-R and D Flip-flops ASSESSMENT
6.1.8: Triggering of Flip-flops
6.1.9: Excitation Table of a Flip-flops
6.1.10: Interconversion of Flip-flops
6.1.11: Sequential Circuit Model
6.1.12: Classification of Sequential Circuits
3.1.13: Analysis of Sequential Circuits
3.1.14: Design Procedure of Sequential Circuits

FINALS MODULE 7 -9 (Module 7.pptx, Modu le 8. pptx, Module 9. pptx)  presentation slide and Documents
Module Learning Outcomes:
At the end of this module, the students must be able to:
1 Explain and define Simplification and Minimization of Boolean Functions;
2 Understand the combination of Logic Circuits;
3 Identify the different of variables variable Karnaugh Maps ;
4 Introduce the elements of Logic Design;
5 Identify the theoretical principles underlying circuit structures and behaviors ;
6 Understand the fundamental structural properties of gate-level circuits.
7 Examine the switch-level structure .

TEACHING & LEARNING MODALITIES


COURSE CONTENT/ SUBJECT MATTER/ TOPIC/OBJECTIVES (ACTIVITIES/ASSESSMENT
STUDENT’S ACTIVITIES ASSESSMENTS
Part 7: Introduction Registers (5 hours) Internet Registers Online Meeting

SE101 Page 8 of 14
MEDINA COLLEGE IPIL, INC.
Don Andres Ipil Zamboanga Sibugay

BACHELOR OF SCIENCE IN COMPUTER SCIENCE


1ST Semester Academic Year 2020 – 2021
COURSE SYLLABUS
Refer to Module 7. pptx Distribution of Hand-outs (remote/no internet
Introduction to Registers connection)
7.1: Registers “Registers | Digital Logic Design"
7.1.1: Shift Register 1. Problem Solving– (link)
7.1.2: Serial-in-Serial-out Shift Register A Saba & N. Manna - Digital Design a. INSTRUCTION
7.1.3: Serial-in-Parallel-out Register "Registers" pages 241-267 i. For Online Modality
7.1.4: Parallel-in-Serial-out Register b. RUBRICS
7.1.5: Universal Register Digital Principles & Logic Design, Saba c. PACKAGE (form of submission)
7.1.6: Shift Register Counters & N. Manna “ Registers”
7.1.7: Sequence Generator
7.1.8: Serial Addition
7.1.9: Binary Divider FORMATIVE ASSESSMENT 2.Testing Activities
SUMMATIVE d. INSTRUCTION
ASSESSMENT e. RUBRICS
Part 8: Introduction to Counters (5 hours) f. PACKAGE (form of submission)
Refer to Module 8. pptx
Counters Logic Circuit 3.Online Meeting
2.1: Counter g. Online participation in class discussion
8.1.1: Asynchronous ( Serial or Ripple) Counters Counters Logic Circuits using a rubric to assess the quality of
8.1.2: Asynchronous Counter ICs “Counters | Digital and Logic Design" participation
8.1.3: Synchronous (Parallel) Counters h. Online assessment in group presentation
8.1.4: Synchronous Down-Counter using a rubric to assess the quality of
8.1.5: Synchronous Up-Down Counter A Saba & N. Manna - Digital Design participation.
8.1.6: Design Procedure of Synchronous Counter "Counters" pages 269-316 i. Online assessment in the submitted report
8.1.7: Synchronous/Asynchronous Counter about the evaluation of the server side
8.1.8: Presettable Counter Digital Principles & Logic Design, Saba scripting languages using a rubric to
8.1.9: Synchronous Counter ICs & N. Manna “ Registers” assess.
8.1.10: Counter Application

SE101 Page 9 of 14
MEDINA COLLEGE IPIL, INC.
Don Andres Ipil Zamboanga Sibugay

BACHELOR OF SCIENCE IN COMPUTER SCIENCE


1ST Semester Academic Year 2020 – 2021
COURSE SYLLABUS
8.1.11: Hazards in Digital Circuits
FORMATIVE ASSESSMENT
Part 9: Alternative Gate Symbols (5 hours) SUMMATIVE
Refer to Module 9. pptx ASSESSMENT

3.1: Alternative Gate Symbols Alternative Gate Symbols


3.1.1: 74 Series Integrated Circuits “Gate Symbol"
3.2.1: Pin Configuration of 74 Series Integrated Circuits
3.2.2: 4000 Series Integrated Circuits
3.2.3: Pin Configuration of 4000 Series Integrated Circuits A Saba & N. Manna - Digital Design
"Gate Symbols" pages 323-381

Digital Principles & Logic Design, Saba


& N. Manna “ Registers”

FORMATIVE ASSESSMENT

SUMMATIVE ASSESSMENT

GRADING SYSTEM:
Attendance and Online/Remote Class Activity Participation 10%
Major Examinations 45%
Prelims 30%
Midterms 30%
Finals 40%

SE101 Page 10 of 14
MEDINA COLLEGE IPIL, INC.
Don Andres Ipil Zamboanga Sibugay

BACHELOR OF SCIENCE IN COMPUTER SCIENCE


1ST Semester Academic Year 2020 – 2021
COURSE SYLLABUS
Task Performance (T/L Activities) 25%
Problem – Based Learning/ Project – Based Tasks 20%

TOTAL 100%
COURSE REQUIREMENTS:
In order to pass this course, a student must be able to obtain a rating of at least ________ derived from the following fulfilled requirements:
1. Attendance and Online/Remote Class Activity Participation
2. Major Examinations
3. Task Performance
4. Problem – Based Learning/ Project – Based Tasks

Rubrics for the following requirements will be made available/will be sent thru individual E-Mails.
COURSE EXPECTATIONS:
Students of this course are expected to:
1. Observe the rules and regulations of the institutions regarding the proper decorum, attendance and the general requirements for a/an _______ student as
per stipulated in the Students Handbook;
2. Equip oneself with relevant, updated and current news and information;
3. Conduct self-paced learning for the basic accounting and financial terminologies and concepts prior to attending this class;
4. Possess extensive knowledge on Word Processing and Spreadsheets as a means to process tasks and activities;
5. Participate actively in all of the discussions and exchange of ideas to earn points for this course using English language as a means of communication;
6. Assert one’s own point of view during the discussion or may initiate discussion/topics relevant to the course without prejudice, bigotry, biases and
discrimination and consider individual differences;
7. Monitor their E-Mail/SMS inboxes for announcements, assignments and comments. Hence, all students are required to register in group;
8. Observe proper citations when utilizing published or unpublished works to avoid violations of Intellectual Property Rights;
9. Share insights to improve Rubrics for each Requirement;
10. Submit required tasks in a neat and presentable manner; and,
11. Prepare, accomplish, submit, present and perform all assigned tasks and course works required in order to pass this course.
** The Professor in-charged of this course is also expected to exhibit the same above-mentioned expectations.

SE101 Page 11 of 14
MEDINA COLLEGE IPIL, INC.
Don Andres Ipil Zamboanga Sibugay

BACHELOR OF SCIENCE IN COMPUTER SCIENCE


1ST Semester Academic Year 2020 – 2021
COURSE SYLLABUS
ONLINE/REMOTE CLASSROOM POLICIES (Adopted)
1. Late submissions are not accepted. Unless there is a very valid excuse for such late submission. The following are considered valid: hospitalized (with
medical certificate), death of an immediate family member (God forbid), and flu (but not hospitalized; with an excuse letter from parents, guardian, or dorm
manager).
2. Plagiarism is to be avoided at all costs. First offense, the student will receive a grade of 0 for the work/activity/seatwork/essay. Second offense, the student
will receive a final grade of 0.0 for the subject.
3. No one is allowed to use his or her phone for texting or calling, unless it is for emergency purposes.
4. For attendance, the policies of the school are applied.

FORMAT OF PAPERS (This is followed in any requirement that will be submitted in class)

1. PAPER: A4 bond paper


2. ORIENTATION: Portrait (It would only be in landscape if specified in the instructions)
3. MARGIN: 1” margin – top, bottom, left, right
4. FONT: Arial #11
5. SPACING: Double space, but no extra space between paragraphs
6. TOP OF THE FIRST PAGE: On the top of the first page should always be:
FAMILY NAME, FIRST NAME, DATE
SUBJECT AND SECTION
(if there are two or more names, always arrange them alphabetically)
7. PAGE NUMBERS: Always have page numbers, unless the assigned paper has only one page.
8. CITATION: Use APA format for citations.
9. REFERENCE: The “Reference” will always be on a separate paper or papers.
10. SUBMISSION: Papers having 2-15 pages to be submitted should be fastened together; papers having more than 16 pages should be soft bounded.
REFERENCES
USE THE APA FORMAT

Prepared by: Recommended Approved by: Approved by:

SE101 Page 12 of 14
MEDINA COLLEGE IPIL, INC.
Don Andres Ipil Zamboanga Sibugay

BACHELOR OF SCIENCE IN COMPUTER SCIENCE


1ST Semester Academic Year 2020 – 2021
COURSE SYLLABUS

BRYAN P. AMADO PAUL B. BOKINGKITO MSIT Nestor C. Unito Ed. D


Instructor Dean, College of BSCS VP for Academic

SE101 Page 13 of 14
MEDINA COLLEGE IPIL, INC.
Don Andres Ipil Zamboanga Sibugay

BACHELOR OF SCIENCE IN COMPUTER SCIENCE


1ST Semester Academic Year 2020 – 2021
COURSE SYLLABUS
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
STUDENT’S ACKNOWLEDGMENT

I, __________________________________, a student of the BSCS Program hereby acknowledge receipt of the herewith attached Course Syllabus
of CS 208 – DIGITAL LOGIC & DESIGN First Semester of SY 2020-2021.

_________________________________ Date: ______________________ Time: ______________


Student’s Signature over Printed Name

SE101 Page 14 of 14

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