Final mark awarded ______

UNIVERSITY OF GLAMORGAN
Assessment Cover Sheet and Feedback Form
2010/11
Module Code: Module Title: Lecturer:
EE4S05 Electronic System Design Iain Shewring

Assignment No: No. of pages in total including Maximum Word Count:

this page:
1 5,000

Assignment Title: ASIC Design Flow proposal

Tasks: see attached

Section A: Record of Submission

Record of Submission and Plagiarism Declaration

I declare that this assignment is my own work and that the sources of information
and material I have used (including the internet) have been fully identified and
properly acknowledged as required in the referencing guidelines provided.

Student Number: 10001077

You are required to acknowledge that you have read the above statement by writing your
student number(s) above.

(If this is a group assignment, please provide the student numbers of ALL group members)

Details of Submission

Note that all work handed in after the submission date and within 5 working days will be capped
at 40%. No marks will be awarded if the assignment is submitted after the late submission date
unless mitigating circumstances are applied for and accepted.

 IT IS YOUR RESPONSIBILITY TO KEEP A RECORD OF ALL WORK SUBMITTED.

 An electronic copy of your work should be submitted via Blackboard.
 Work should also be submitted to the member of academic staff responsible for setting your
work.
 Work not submitted to the lecturer responsible may, exceptionally, be submitted (on the
submission date) to the reception of the Faculty of Advanced Technology, which is on the
2nd floor of G block (Room G221) where a receipt will be issued.

Mitigating Circumstances: if there are any exceptional circumstances which may have
affected your ability to undertake or submit this assignment, make sure you contact the
Faculty Advice Shop on 01443 482540 (G221).
 Section B : Marking and Assessment
This assignment will be marked out of 100% It is estimated that you
should spend approximately
This assignment contributes to 25% of the total module marks. 30 hours on this
assignment.
This assignment is bonded . Details :

 To understand advanced design methodologies and the

issues associated with contemporary implementation
technologies.

Date Set: Submission Date: Feedback Date:

10/11/10 17/01/11 15/02/11

Learning Outcomes
This assignment addresses the following learning
outcome(s) of the module:

 To understand advanced design methodologies and the issues

associated with contemporary implementation technologies.

Marks Marks
Marking Scheme Available Awarded
Well structured report (to include background material) 40
Punctuation and grammar 20
Design flow (choice of tools and rationale) 40

TOTAL 100

Assessment Criteria
Performance Level Criteria
Fail Report contains very little relevant information and
(< 40%) little or no conclusion.
3rd Class / PASS Report contains the bare minimum information,
(40% - 49%) proposed approach is mostly correct. Little work
done in researching around the subject, little effort in
costing tools and design flow.
Lower 2nd Class / PASS Report contains basic information and shows that
(50% - 59%) research has been undertaken in the subject area.
Proposed design flow and tools have been costed
and evaluated.
Upper 2nd Class / MERIT Report addresses all parts of the assignment, and
(60% - 69%) demonstrates that research has been done in the
area and clearly shows its relevance. Design flow is
well described and its advantages explained. A full
costing of the approach and its component parts is
presented.
1st Class / DISTINCTION Report addresses all parts of the assignment, and
(70% +) demonstrates that extensive research has been done
in the area. Design flow is well described and its
advantages explained, together with a critical
evaluation of the possible options. A full costing of
the approach and its component parts has been
produced.
 Section C : Marker’s Feedback
Lecturer’s Comments:

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Areas to concentrate on next time:

Report structure Research Content Team work

Referencing Presentation

Lecturer’s signature: Date: Mark awarded:

All marks are subject to confirmation by the Board of Examiners

 Assignment (Digital Electronics) – ASIC Design Flow

1. Scenario

There is a requirement to propose a new ASIC design flow within your company,
from VHDL design capture through to GDSII tape out. It is very important that
the flow includes all the tools, and you explain all data formats, that will be
required. You should choose an example application design to assist in your
discussion.

2. Report
Your report for this assignment should include;
1. Suggest a design flow (graphically and with an accompanying discussion), to
take a design from VHDL to GDSII.
2. Detail all the tools chosen, together with their suppliers. Include the features
of the tool and the data formats that they will accept, and cost the design
flow for implementation.
3. Explain what comprises an ASIC library, and suggest a suitable technology
for your chosen application. Give recommendations on choosing ASIC
libraries for any application.

Provide all references for all relevant material, and be aware that the report will
be checked for originality via TurnItIn.