Devansh Raghuwanshi 

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COMPUTER FUNDAMENTALS - REPORTS

OVERALL ANALYSIS COMPARISON REPORT SOLUTION REPORT

ALL(38) CORRECT(0) INCORRECT(0) SKIPPED(38)

Devansh Raghuwanshi
Course: GATE+ESE
Electrical Engineering (EE)
Q. 1

In a 16-bit computer instruction format, the size of address field is 5-bit. The computer uses expanding opcode technique. It
HOME has two 2-address instructions and 1024 one address instruction. How many zero-address instruction can be formulated?
FAQ Have any Doubt ?
MY TEST
A 28720
BOOKMARKS

B 30704
MY PROFILE

REPORTS 30720
C
Correct Option
BUY PACKAGE
Solution :
ASK AN EXPERT (c)
 D 32704

QUESTION ANALYTICS

Q. 2

Consider the following statements, out of the statements choose the one which best characterizes computers using memory
mapped I/O.
FAQ Have any Doubt ?

A the computer provides special instruction for manipulating I/O port.

B I/O ports are placed as address on bus and are accessed just like other memory location.
Correct Option

Solution :
(b)
Memory mapped I/O uses the same address bus to address both memory and I/O devices. The memory and registers of
the I/O devices are mapped to address values.
So, when an address is accessed by the CPU, it may refer either to a portion of physical memory, or memory of an I/O
device.

C to perform an I/O operation, it is sufficient to place the data in an address and call the channel to
perform the operation.

D ports are referenced only by memory mapped instruction of the computer and are located at hardwired
memory location.

QUESTION ANALYTICS

Q 3
Q. 3

Consider the following statements :

S1  : Microprogrammed control unit uses fixed logic to interrupt instruction.
S2 : Horizontal microprogramming control unit requires an additional hardware (like a decoder)
S3 : The overall performance of a system is directly proportional to the memory accesses which can be satisfied by the cache.
Which of the above statement(s) is/are correct?
FAQ Have any Doubt ?

A S1  and S2 only

B S1 and S3 only

C S3 only
Correct Option

Solution :
(c)
Consider each statements :
S1 : Microprogrammed control unit uses variable logic to interrupt an instruction since it uses encoded scheme for the
instruction.
S2  : Horizontal microprogramming control unit does not require an additional hardware (like a decoder) because a fixed
logic is associated with the instructions.
S3 : Performance of a system depends on the direct proportion of memory accesses satisfied by cache.

D None of the above

QUESTION ANALYTICS

Q. 4

A CPU has 24-bit instructions. A program starts at address 300 (in decimal). Which one of the following is a legal program
counter (all values in decimal)?
FAQ Have any Doubt ?

A 400
 B 500

C 600
Correct Option

Solution :
(c)
Size of instruction 24-bits
Starting address of the program is 300. The size of  instruction is 3 bytes long so the address is always the multiple of 3
byte. Next address will be 600 and it will also be the next instruction of the program.

D 700

QUESTION ANALYTICS

Q. 5

When an interrupt occurs, an operating system

FAQ Have any Doubt ?

A may change state of interrupted process to blocked and schedule another process.
Correct Option

Solution :
(a)

B ignore the interrupt.

C always change state of interrupted process of the processing the interrupted.

D always resume execution of interrupted process after processing the interrupt.

 QUESTION ANALYTICS

Q. 6

A hard disk with transfer rate of 10 kB/sec is constantly transferring data to memory using direct memory access (DMA). The
processor at 800 kHz takes 700 and 900 clock cycles to initiate and complete the DMA transfer of 200 B, what is the
percentage of processor time consumed for transfer operation?
FAQ Have any Doubt ?

A 0.01%

B 10%

C 9%
Correct Option

Solution :
(c)

D 90%

QUESTION ANALYTICS

Q. 7

In vectored interrupt:
In vectored interrupt:
FAQ Have any Doubt ?

A the branch address is assigned to a fixed location in memory

B the branch address is obtained from a register in the processor

C the interrupting source supply the branch information to the processor through an interrupt vector
Correct Option

Solution :
(c)

D none of the above

QUESTION ANALYTICS

Q. 8

The average seek time and rotational delay in a disk system are 6 ms and 3 ms, respectively. The rate of data transfer to or
from the disk is 30 MBps and all disk accesses are of 8 kB of data. Disk direct memory access (DMA) controller, the processor,
and the main memory are all attached to a single bus. The data bus width is 32 bits, and a bus transfer to or from the main
memory takes 10 nanoseconds. How many disk units are there that can be simultaneously transferring data to or from the
main memory?
FAQ Have any Doubt ?

A 11

B 12

C 13
Correct Option

Solution :
(c)
 (c)

D 14

QUESTION ANALYTICS

Q. 9

Consider the cache memory which is 30 times faster than main memory and it can be uses 90% of the total time. What is the
speedup gain by cache memory?
FAQ Have any Doubt ?

A 7.33

B 7.46

C 7.69
Correct Option

Solution :
(c)
 D 7.52

QUESTION ANALYTICS

Q. 10

Consider a system that uses interrupt-driven I/O for a particular device which has an average data transfer rate of 10 kBps. The
processing of the interrupt which includes the time to jump to interrupt service routine (ISR), its execution and returning to the
main program is 250 μs. What fraction of processor time of consume by I/O device, if I/O device interrupts for every 2 byte (in
%)?
FAQ Have any Doubt ?

A 80
Correct Option

Solution :
(a)

B 40

C 12

D None of these
 QUESTION ANALYTICS

Q. 11

Consider the following floating point format

Mantissa is a pure fraction in sign-magnitude form. What is the representation of decimal number 0.625 × 218 in hexadecimal
without normalization and rounding off ?
FAQ Have any Doubt ?

A 52B0

B 52A0
Correct Option

Solution :
(b)

C 52A1

D None of these
 QUESTION ANALYTICS

Q. 12

A cache block has 64 kbyte. The main memory has latency of 64 μsec and bandwidth 1 GBps. What is the total time required to
fetch the entire cache block from the main memory (in μsec, 1G=109)?
FAQ Have any Doubt ?

A 125

B 128
Correct Option

Solution :
(b)

C 135

D None of these

QUESTION ANALYTICS

Q. 13

Processor XYZ supports only the immediate and the direct addressing modes. Which of the following programming language
data structures cannot be implemented on this processors?
1. Pointers
2 Arrays
2. Arrays
3. Records
FAQ Have any Doubt ?

A 1, 2 and 3
Correct Option

Solution :
(a)
To access pointer, arrays and records we need indirect addressing modes, so with direct and immediate addressing
modes we cannot implement these.

B 2 and 3

C 1 and 2

D Only 1

QUESTION ANALYTICS

Q. 14

Match List-I with List-II and select the correct answer using the codes given below the lists:

FAQ Have any Doubt ?

 A a

B b

C c
Correct Option

Solution :
(c)

D d

QUESTION ANALYTICS

Q. 15

Consider that for a certain processor, a read request takes 10 nanoseconds on a cache hit and 100 nanoseconds on a cache
miss. Suppose while running a program, it was observed that 80% of the processor’s read requests result in a cache hit. The
average read access time in nanoseconds is
FAQ Have any Doubt ?

A 14

B 20

C 17

D 28
Correct Option
 Correct Option

Solution :
(d)

QUESTION ANALYTICS

Q. 16

Consider a PC relative mode branch instruction is 5 B long. The address of the instruction in decimal is 2000. Which of the
following represent branch target address if signed displacement is –30?
FAQ Have any Doubt ?

A 2035

B 2015

C 1975
Correct Option

Solution :
(c)
 D 2005

QUESTION ANALYTICS

Q. 17

Consider the following C program:

Which of the following represents the value of j at the end of execution of above code? (Assume no syntax error)
FAQ Have any Doubt ?

A 7

B 10
Correct Option

Solution :
(b)
Count is static variable, so every time when value is changed it becomes the new value of count. So first count value = 0
then 1, then 3 and at the end of execution value will be 10.

C 6
 D 5

QUESTION ANALYTICS

Q. 18

Consider x to be an integer which can take a value of 0 and 1. The statement

is equivalent to which one of the following?

FAQ Have any Doubt ?

A x = 1% x ;

B x=x–1;

C x=1+x;

D x=1–x;
Correct Option

Solution :
(d)

QUESTION ANALYTICS

Q. 19

Which of the following best defines array?

Which of the following best defines array?
FAQ Have any Doubt ?

A It is collection of items that share common name.

B It is collection of items of same type and storage class that share a common name and occupy
consecutive memory locations.
Correct Option

Solution :
(b)
Array is a collection of items of same type either character, integer, float or anything and storage class that share common
name and occupy consecutive memory locations.

C It is collection of items that share common name and occupy consecutive memory location.

D None of these

QUESTION ANALYTICS

Q. 20

Consider p is a pointer to an integer and q is a pointer to a character, then size of (p) will be
FAQ Have any Doubt ?

A same as that of size of (q)

Correct Option

Solution :
(a)
Size of pointer (P) for integer, character, double or any other data type will be same.

B greater than that of size of (q)

C less than that of size of (q)

 C (q)

D none of the above

QUESTION ANALYTICS

Q. 21

If max is a function that returns the larger of two integers, given as argument, then which of the following statements find the
largest of three give numbers
FAQ Have any Doubt ?

A max (max (a, b), max (a, c))

B max (b, max (a, c))

C max (max (a, b), max (b, c))

D all of these
Correct Option

Solution :
(d)

QUESTION ANALYTICS

Q. 22

Which of the following represents the use of the function?

 c o t e o o g ep ese ts t e use o t e u ct o ?
FAQ Have any Doubt ?

A Function helps to avoid repeating a set of statement many times.

B Enhance logical clarity of the program.

C Helps to avoid repeated programming across programs.

D All of the above

Correct Option

Solution :
(d)

QUESTION ANALYTICS

Q. 23

With single resource, deadlock occurs

FAQ Have any Doubt ?

A if there are more than two processes competing for that resource

B if there are only two processes competing for that resource

C if there is a single process competing for that resource

D none of these
Correct Option

Solution :
(d)
With only a single resource deadlock cannot occur
 With only a single resource, deadlock cannot occur.

QUESTION ANALYTICS

Q. 24

Consider the following set of processes, with the arrival times and the burst time given in msec.

What is the average waiting time for these processes with the pre-emptive shortest remaining time first algorithm?
FAQ Have any Doubt ?

A 5.5

B 2.5
Correct Option

Solution :
(b)

C 3.5
 D 4.5

QUESTION ANALYTICS

Q. 25

Consider the page fault service time to be 20 msec in a computer with average access time being 40 nsec. If one page fault is
generated for every 106 memory accesses, then what is the effective access time for the memory?
FAQ Have any Doubt ?

A 30 nsec

B 50 nsec

C 60 nsec
Correct Option

Solution :
(c)

D 90 nsec

QUESTION ANALYTICS

Q. 26

Match List-I with List-II and select the correct answer using the codes given below the lists:
 FAQ Have any Doubt ?

A a

B b

C c

D d
Correct Option

Solution :
(d)

QUESTION ANALYTICS

Q. 27

In the working set strategy, which of the following is done by operating system to prevent thrashing?
FAQ Have any Doubt ?

A It initiates another process if there are enough extra frames.

B Exceeds the total number of available frames.

 C It selects a process to suspend if sum of the size of the working set exceeds the total number of
available frames.
Correct Option

Solution :
(c)
If there are enough extra frames, another process can be initiated. If the sum of working set size increases, exceeding the
total number of available frames, the operating system selects a process to suspend.

D Both (a) and (b)

QUESTION ANALYTICS

Q. 28

Which of the following ISO level is more closely related to the physical communication facilities?
FAQ Have any Doubt ?

A Application

B Session

C Network

D Data link
Correct Option

Solution :
(d)
Data link layer because frame made in data link layer (DLL) after that frames that is the protocol data unit (PDU) of data
link layer (DLL) are converted into signal format at the physical layer.

QUESTION ANALYTICS
 QUESTION ANALYTICS

Q. 29

Which of the following is true about protocols?

FAQ Have any Doubt ?

A agreements on how communication components and Data Terminal Equipments (DTE’s) are to
communicate
Correct Option

Solution :
(a)
Protocols are a set of rules. It is an agreement between the communicating parties on how communication should
proceed. Hence (a) is correct option.

B logical communication channels used for transferring data

C physical communication channels used for transferring data

D none of the above

QUESTION ANALYTICS

Q. 30

Match List-I with List-II and select the correct answer using the codes given below the lists:
 FAQ Have any Doubt ?

A a
Correct Option

Solution :
(a)

B b

C c

D d

QUESTION ANALYTICS

Q. 31

Communication via circuit switching involves three phases which are:

FAQ Have any Doubt ?
 A circuit establishment, data transfer, circuit disconnect
Correct Option

Solution :
(a)
There are two types of switching: (a) Packet switching and (b) Circuit switching.
Connection via circuit switching involves circuit establishment, data transfer and circuit disconnect. Connection path must
be established before data transmission begins.

B circuit establishment, data compression, circuit disconnect

C data transfer, data compression, circuit disconnect

D circuit establishment, data compression

QUESTION ANALYTICS

Q. 32

The topology with highest reliability is

FAQ Have any Doubt ?

A bus topology

B star topology

C ring topology

D mesh topology
Correct Option

Solution :
(d)
I M hT l d i h d di t d i tt i t li k t th d i i th li k i t ffi
 In a Mesh Topology, every device has a dedicated point-to-point link to every other device. i.e. the link carries traffic
between only the two devices it connects. For this reason the communication between two links is reliable.

QUESTION ANALYTICS

Q. 33

Assertion (A): Add R0 , 2 is implemented by the help of immediate Addressing Mode.

Reason (R): Since, the constant to be added is directly provided in the address.
FAQ Have any Doubt ?

A a
Correct Option

Solution :
(a)

B b

C c

D d

QUESTION ANALYTICS

Q. 34

Assertion (A): The operating system is designed to maximize the resource utilization
Assertion (A): The operating system is designed to maximize the resource utilization.
Reason (R): The control program manages the system program.
FAQ Have any Doubt ?

A a

B b

C c
Correct Option

Solution :
(c)
Control programs enhances an operating system by creating an environment in which you can run other programs. Control
programs generally provide a graphical user interface (GUI) and enable you to run several programs at once in different
windows.

D d

QUESTION ANALYTICS

Q. 35

Assertion (A): Thrashing degrades the system throughput.

Reason (R): New processors arrives in the ready queue before the termination of execution of current process.
FAQ Have any Doubt ?

A a

B b
Correct Option

Solution :
(b)
Both the assertion and reason are correct as thrashing degrades the system throughput. There can be multiple processes
at a time in the ready queue but this is not the correct reason for thrashing. Thrashing occurs when the processor spends
 at a time in the ready queue but this is not the correct reason for thrashing. Thrashing occurs when the processor spends
most of its time swapping rather than executing instructions.

C c

D d

QUESTION ANALYTICS

Q. 36

Assertion (A): In a computer system, cache increases the average speed of memory access.
Reason (R): Cache memory increases the available memory space for data.
FAQ Have any Doubt ?

A a

B b

C c
Correct Option

Solution :
(c)
Cache memory increases the average speed of memory access as the cache memory is high speed memory. Which is
used between main memory and hard disk. Time to access RAM is less than time required to access main memory.
Cache memory contains the copy of data present in main memory but not increase the memory space.

D d

QUESTION ANALYTICS
Q. 37

Assertion (A): Physical address on headers change as a packet moves from network to network but the logical address do not.
Reason (R): Physical address are used by data link layer which is responsible for hop to hop delivery whereas logical address to
be used by network layer which is responsible for node to node delivery.
FAQ Have any Doubt ?

A a
Correct Option

Solution :
(a)
On the senders side, the IP address that is included in the header of the packet is of the, destination. Hence IP address
don’t change.

B b

C c

D d

QUESTION ANALYTICS

Q. 38

Assertion (A): Queue has a major role in implementation of recursive function calls in C.
Reason (R): Queue are FIFO kind of data structure.
FAQ Have any Doubt ?

A a

B b

C c
D d
Correct Option

Solution :
(d)
For recursive function calls, a stack is required. Since the variables are declared at each function call and the instants of
all the local variables at each function call are needed to be stored. For this, a stack data structure is used.

QUESTION ANALYTICS