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ACTIVITY No. 1: Logic Gate Circuits (Various Logic Families) Christian O. Sabas

This document summarizes an experiment on simulating logic gate circuits from different logic families using Multisim software. It describes simulating OR, AND, NOT, NAND and NOR gates using Diode-Resistor Logic (DRL) and Diode-Transistor Logic (DTL). The experiment allowed students to analyze, design and implement digital circuits made from diodes, transistors and resistors functioning as logic gates. Through understanding the unique characteristics of different logic families, students can optimize digital circuit design.

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98 views4 pages

ACTIVITY No. 1: Logic Gate Circuits (Various Logic Families) Christian O. Sabas

This document summarizes an experiment on simulating logic gate circuits from different logic families using Multisim software. It describes simulating OR, AND, NOT, NAND and NOR gates using Diode-Resistor Logic (DRL) and Diode-Transistor Logic (DTL). The experiment allowed students to analyze, design and implement digital circuits made from diodes, transistors and resistors functioning as logic gates. Through understanding the unique characteristics of different logic families, students can optimize digital circuit design.

Uploaded by

christian sbs
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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ACTIVITY No.

1: Logic Gate Circuits (Various Logic Families)


Christian O. Sabas

I. INTRODUCTION
In the production of the digital basically we will be just simulating this
integrated circuits various circuit diagram to the multism.
configurations and production
technology are used. These
configurations and approaches are
called Logic families such as the Diode-
Resistor Logic (DRL), Diode-Transistor
Logic (DTL), Transistor-Transistor Logic
(TTL). For every same family that is
fabricated entails similar or identical
electrical attributes. These
characteristic could be the same logic
input and output level, speed of
response, dissipation of power and the
range of voltage supply. It is very
The following diagram shows the output of DRL
important for us to know the OR gate.
significance of the different logic
families in creating a more compatible
and a much better combination of the
integrated circuits for the design of the
digital system.

II. METHODLOGY
The entire procedure of this
experiment was done through the
use of the multisim, It enables
virtual simulation of the circuitry as
per the module has instructed.

III. RESULTS AND DISCUSSION

This experiment was divided in to three


sub-experiment, first we have executed the
DRL or the Diode-Resistor Logic which can
perform the OR and AND logic fuctions Figure1.1 DRL OR gate.
INPUT OUTPUT
A B Q=A+B
0 0 0
0 1 1
1 0 1
1 1 1
Table 1.1 DRL OR gate.
Figure1.2 DRL AND gate.

The following diagram shows the output of DRL Input Output


AND gate. Q = AB
A B

0 0 0

0 1 0

1 0 0

1 1 1
Table 1.2 DRL AND gate.

For the second part of the experiment we will


now be executing the Diode Transistor Logic
(DTL) for the NAND/NOR operation and the
inverter circuit for not.
We will simulate these diagrams

The following diagram shows the output of DTL


NOT gate.
Figure2.1: DTL NOT gate.

Input A Output
Q = A’

0 1

1 0
Table 2.1: DTL NOT gate.

The following diagram shows the output of DTL


NAND gate.
Figure2.2: DTL NAND gate.
Input Output

A B Q = (A.B)’

0 0 1

0 1 1

1 0 1

1 1 0
Table 2.2: DTL NAND gate.

The following diagram shows the output of DTL


NOR gate.
students were also able to describe,
analyze, design, and implement
digital circuits along with
familiarizing themselves with the
family of logic circuits as they
construct together elements such
as the diode, the transistors and
resistor which can perform or
function as logic gates.
Furthermore, through
understanding its unique
characteristics, functionality and
behavior we can optimize our
digital circuit design.

V. REFERENCES

Tocci, R. (2007) Digital Systems:


Principle and application

Figure2.3: DTL NOR gate.

Input Output

A B Q = (A+B)’

0 0 1

0 1 0

1 0 0

1 1 0
Table 2.3: DTL NOR gate.

IV. CONCLUSION
Multisim is a very proficient flat
form to help the students visualize
how the logic gate works. The

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