1. Integrating analog-to-digital (A/D) converters operate by indirectly converting an input voltage into a time period measured by a clock and counter. Common methods include single-slope, dual-slope, and triple-slope as well as charge-balancing quantized-feedback modulation.
2. The dual-slope technique uses two time periods - one fixed and one proportional to the input voltage - to represent the ratio of the input to a reference voltage as a digital output word. Accuracy depends only on the reference and integrator linearity.
3. Charge-balancing conversion generates a pulse train frequency proportional to input voltage by balancing current ramps with reference pulses over a fixed time period. The pulse
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Lec 6 Integrating Type ADC PDF
1. Integrating analog-to-digital (A/D) converters operate by indirectly converting an input voltage into a time period measured by a clock and counter. Common methods include single-slope, dual-slope, and triple-slope as well as charge-balancing quantized-feedback modulation.
2. The dual-slope technique uses two time periods - one fixed and one proportional to the input voltage - to represent the ratio of the input to a reference voltage as a digital output word. Accuracy depends only on the reference and integrator linearity.
3. Charge-balancing conversion generates a pulse train frequency proportional to input voltage by balancing current ramps with reference pulses over a fixed time period. The pulse
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Integrating Type A/D Converters lec7
1 INDIRECT A/D CONVERSION
A class of analog-to-digital (A/D) converters, known as integrating type, operates by an indirect conversion method. The unknown input voltage is converted into a time period, which is then measured by a clock and counter. A number of variations exist on the basic principle such as single-slope, dual-slope, and triple-slope methods. In addition, there is another technique – completely different – that is known as the charge-balancing, quantized-feedback method or sigma-delta modulator. The most popular of these methods are dual-slope and charge balancing; although both are slow, they have excellent linearity characteristics with the capability of rejecting input noise. Because of these characteristics, integrating type A/D converters are almost exclusively used in digital panel meters, digital multimeters, and other comparatively slow measurement applications. 2 DUAL-SLOPE A/D CONVERSION The dual-slope technique, shown in Figure 1, is perhaps the best known. Conversion begins when the unknown input voltage is switched to the integrator input; at the same time, the counter begins to count clock pulses and counts up to overflow. At this point, the control circuit switches the integrator to the negative reference voltage, which is integrated until the output is back to zero. Clock pulses are counted during this time until the comparator detects the zero crossing and turns them off. The counter output is then the converted digital word. Figure 2 shows the integrator output waveform where T1 is a fixed time and T2 is the time proportional to the input voltage. The times are related as follows: T2 = T 1* V in /Vref (1) The digital output word, therefore, represents the ratio of the input voltage to the reference voltage. Dual-slope conversion has several important features. First, conversion accuracy is independent of the stability of the clock and integrating capacitor so long as they are constant during the conversion period. Accuracy depends only on the reference accuracy and the integrator circuit linearity. Second, the periodic noise rejection of the converter can be infinite if T1 is set to equal the period of the noise. To reject 60 Hz power noise, therefore, requires that T1 be 16.667 ms or its multiples. Figure 1. Dual-slope A/D converter.
Figure 2. Integrator output waveform for dual-slope A/D converter.
Figure 3. Charge-balancing A/D converter. 3 CHARGE-BALANCING A/D CONVERSION The charge-balancing, or quantized-feedback, method of conversion is based on the principle of generating a pulse train with a frequency proportional to the input voltage and then counting the pulses for a fixed period of time. This circuit is shown in Figure 3. Except for the counter and timer, the circuit is a voltage-to-frequency (V/F) converter that generates an output pulse rate proportional to input voltage. The circuit operates as follows. A positive input voltage causes a current to flow into the operational integrator through R1. This current is integrated, producing a negative going ramp at the output. Each time the ramp crosses zero, the comparator output triggers a precision pulse generator, which puts out a constant width pulse. The pulse output controls switch S1, which connects R2 to the negative reference for the duration of the pulse. During this time, a pulse of current flows out of the integrator summing junction, producing a fast, positive ramp at the integrator output. This process is repeated, generating a train of current pulses, which exactly balances the input current – hence the name charge balancing. This balance has the following relationship: where τ is the pulse width and f the frequency. A higher input voltage, therefore, causes the integrator to ramp up and down faster, producing higher frequency output pulses. The timer circuit sets a fixed time period for counting and the number of pulses within this period represents the digital output. If the output of the comparator is synchronized with a clock signal and directly used to control the switch S1 as the pulse generator and more than one clock period is needed to balance the current of maximum input voltage over two clock periods, the circuit becomes a sigma-delta modulator. The synchronized comparator output signal generates a sequence of 1 and 0, and the output pulse density balances the input voltage. The counter for the digital output counts the periods n where the switch is connected to the reference voltage and its relation to the used number N of clock periods in the time window represents the digital output signal.
Like the dual-slope converter, the circuit also integrates input noise, and if the timer is synchronized with the noise frequency, infinite rejection results.