9 Op-Amps and Transistors
9 Op-Amps and Transistors
9 Op-Amps and Transistors
The three terminal voltages v+, v–, and vo are all node voltages relative to ground
When we analyze a circuit containing op-amps, we cannot use the constraint equation µ(v+ – v–)
since the gain µ is infinite
This property requires a different approach to the analysis of op-amp circuits
1.3 The Op-amp Virtual Short Model
We first assume that µ is finite, perform analysis in the conventional way, and then allow µ to tend
to infinity
Consider the following simple op-amp circuit; we wish to determine the output voltage vo:
Topic 9 – Op-amps and transistors
We can replace the op-amp symbol with its infinite voltage gain VCVS equivalent and then denote
the gain by a finite parameter µ:
We can apply KCL, bearing in mind that no current flows into the op-amp input terminals (they are
equivalent to an open circuit):
v− − vo
= −is v− = vo − is R
R
Now we introduce the VCVS constraint:
v o = µ(v s − v− )
Eliminating v– between these two equations, we have:
vo = µ ( vs − v− ) = µ ( vs − vo + is R )
µ ( vs + Ris )
vo =
1+ µ
Also:
v− = vo − is R
µ ( vs + Ris )
= − is R
1+ µ
µv − Ris
= s
1+ µ
We now let µ → ∞:
v o = v s + Ris
This equation is the solution.
We also have for µ → ∞:
v− = vs
But from the circuit diagram, we have:
v+ = vs
2
Topic 9 – Op-amps and transistors
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Topic 9 – Op-amps and transistors
Example 11
Find a nullor equivalent for the op-amp sub-circuit shown:
Solution
We apply test sources and replace the op-amp by its nullor equivalent:
We note that the nullator holds the voltage at the middle node to zero
Furthermore, as the current into the nullator is zero, the current through R2 is the same as that
through R1
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Topic 9 – Op-amps and transistors
The practical importance of equivalent sub-circuits is that they allow one to design and analyze
circuits rapidly by recognizing their topologies
Consider another example:
Example 5.12
Compute the voltage vo, and currents ia and io in the circuit shown:
Solution
We can quickly analyze this circuit for vo by simply noting that this quantity is the negative of the
ratio of the "feedback" resistor (8 kΩ) to the "input" resistor (2 kΩ) multiplied by the value of
voltage at the input terminal (2 V)
Thus, it is –8 V
We can then use Ohm's law to find that ia = –8 V/2 kΩ = –4 mA
We can find io by observing that the top middle node is held to zero volt by the op-amp input
terminals and that the current into the minus (or inverting) op-amp terminal is zero. This gives a
current of 8 V/8 kΩ = 1 mA from left to right through the 8 kΩ resistor
KCL at the output node gives io = 1 mA – Ia = 1 mA – (– 4 mA) = 5 mA
The nullor equivalent circuit with the currents indicated is as follows:
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Topic 9 – Op-amps and transistors
If the 2 kΩ resistor at the output of the op-amp was changed to a 1 kΩ resistor, the op-amp output
voltage (–8 V) would not change because it is governed by the voltage gain equation; therefore, the
current in the load resistor would double to – 8 mA and the op-amp output current io would increase
to 9 mA; this illustrates the fact that the op-amp output current does not have any constraint – it
provides any current demanded by the rest of the circuit
It is a fact that op-amps limit the current flowing in their output terminals, usually to a value of a
few tens of mA
For this reason, a practical range of values for resistors in an op-amp circuit is on the order of a few
hundred Ω to a few MΩ
Typical values are in the kΩ range, as we have seen
1.5 The Inverting Amplifier Topology
The sub-circuit shown below appears as part of a wide range of op-amp circuits encountered in
practice:
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Topic 9 – Op-amps and transistors
Notice that resistor R has become the trans-resistance of the controlled source
Example 13
Find the voltage vo for the circuit shown:
Solution
This circuit can easily be analyzed by applying KCL to the central node assuming a nullor model
for the op-amp:
0 − v1 0 − v 2 0 − v 0
+ + =0
R1 R2 R0
Hence:
R0 R
v 0 = −v1 − v2 0
R1 R2
Thus, our circuit output is the weighted sum of the two input voltages
Clearly, we could add additional resistors to sum any number of additional input voltages
The currents flowing in the circuit are as follows:
We can solve the same example by using the CCVS equivalent for the op-amp and its feedback
resistor Ro:
We can immediately see that the currents in the two input resistors add together to produce ii and
hence obtain the expression for v0:
⎛v v ⎞
v 0 = −R0ii = −R0 ⎜ 1 + 2 ⎟
⎝ R1 R2 ⎠
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Topic 9 – Op-amps and transistors
Solution
We attach a test source at the input and one at the output and use the nullor model for the op-amp:
We have used a voltage source at the input because the input current is constrained to be zero by the
nullator:
The nullator forces the voltage at the junction of the two feedback resistors to be the same as the
input voltage vi
We can apply KCL at this node:
vi vi − v o
+ =0
R1 R2
Hence:
⎛ R ⎞
v 0 = v1⎜1+ 2 ⎟
⎝ R1 ⎠
Because the input current of the whole circuit is zero independently of the input voltage, there is an
equivalent open circuit between the input terminal and ground
The output voltage obeys the above equation independently of the output current io, so we see that
there is an equivalent VCVS connected between the output terminal and ground
Thus, the equivalent circuit is as follows:
8
Topic 9 – Op-amps and transistors
We see that it is non-inverting (the plus sign is at the top and the voltage gain is positive)
Unlike the inverting voltage amplifier, it presents an open circuit at the input; thus, it is exactly
equivalent to an ideal voltage-controlled voltage source
The voltage gain cannot be less than unity for the present configuration, whereas it can be less than
unity for the inverting topology
1.7 The Voltage Follower (or Unity Gain Buffer)
If in the non-inverting amplifier circuit, we let R1 → ∞, we see that the voltage gain approaches
unity, independently of R2
Thus, we simply let R2 = 0
This gives the following circuit:
Thus we can see that the input current is zero and the output current is provided by the norator at
the amplifier output; the output current depends on the load connected
The voltage follower can therefore have substantial current gain
Although the voltage buffer does not provide any voltage gain, it is a useful configuration, as shown
by the following example:
Example 15
A signal source with Thevenin equivalent voltage and resistance of 2 V and 1 MΩ has to be
connected to a 1 kΩ load
Find the load voltage vL and the power absorbed by the load resistor RL for both circuit
configurations shown:
Solution
For the circuit on the left, we use the voltage divider rule to obtain the voltage vL:
9
Topic 9 – Op-amps and transistors
1 kΩ
vL = × 2 V = 0.002 = 2 mV
1 MΩ + 1 kΩ
The power absorbed by the load resistor is:
v L2 4 ×10−6
PL = = = 4 ×10−9 = 4 nW
1 kΩ 1×10 3
Now let's look at the circuit on the right above:
It is the same as the one on the left with the insertion of a unity gain buffer between the source
elements and the load resistor RL
The buffer presents an open circuit to the Thevenin equivalent of the source, so we see that the
current through the 1 MΩ resistor is zero; thus, there is no voltage drop across it
Therefore, the voltage at the positive input terminal of the op-amp is the source value, 2 V
This same voltage is transferred to the load resistor; thus:
vL = 2 V
The power absorbed by the load resistor is:
v L2 4
PL = = 3
= 4 ×10−3 = 4 mW
1 kΩ 1×10
This is an increase in delivered voltage and power by factors of 1000 and 106, respectively
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Topic 9 – Op-amps and transistors
However, voltage-controlled devices (VCVS and VCCS) always behave like an open-circuit at their
input irrespective of their gain, and hence their input current is always zero
Hence, for these voltage-controlled sources with infinite gain, both the input voltage and the input
current are zero
It is also shown above that for the current-controlled devices (CCVS and CCCS), their infinite gain
forces their input current to zero
But current-controlled devices (CCVS and CCCS) always behave like a short-circuit at their input
and hence their input voltage is always zero
Hence, for these current-controlled sources with infinite gain, both the input voltage and the input
current are zero
Thus, for all four controlled sources, both the input voltage and the input current are zero
Hence the input terminals of all four controlled sources behave like a nullator
Consider now the output terminals of the four controlled sources
We can now write:
VCVS: vo = µvx → ∞ × 0 = arbitrary for µ→∞
VCCS: io = gm vx → ∞ × 0 = arbitrary for gm → ∞
CCVS: vo = rmix → ∞ × 0 = arbitrary for rm → ∞
CCCS: io = β ix → ∞ × 0 = arbitrary for β→∞
In the limit as the gain parameters becomes infinite and the input variable becomes zero, the output
variable in each case becomes arbitrary (or indeterminate)
We see that, for the controlled voltage sources (VCVS and CCVS) with infinite gain, the output
voltage becomes arbitrary
However, for voltage sources of any gain the output current is always arbitrary
Hence, for these sources, both output voltage and output current are arbitrary
It is also seen that for the controlled current sources (VCCS and CCCS) with infinite gain, the
output current becomes arbitrary
However, for current sources of any gain the output voltage is always arbitrary
Hence, for these sources too, both output voltage and output current are arbitrary
Hence, for all four sources with infinite gain, the output voltage and output current are arbitrary
In other words they place no constraints on their output voltage nor on their output current; output
voltage and output current are determined by other elements in the circuit
It follows that the output terminals of all four controlled sources behave like a norator
Hence, we have shown that each of the dependent sources when their gain is infinite is equivalent to
the nullor:
Note that, if the nullor were the model of an op-amp, then the norator is grounded
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Topic 9 – Op-amps and transistors
The only difference between the two is the feedback resistor R2: it is returned to the negative op-
amp input in one and to the positive input in the other
If the op-amp is ideal in both circuits then both are equivalent to the same nullor equivalent circuit
shown:
Hence, with an ideal op-amp the circuits should behave the same
However, no real circuit behaves in an ideal fashion
In practice, the two circuits behave quite differently; the main difference is their stability properties
In order to investigate stability of a circuit, we de-activate all independent sources, in this case the
input voltage source vi
Each circuit has a feedback loop, going from an op-amp input terminal, through to the output
terminal of the op-amp, then through the resistor R2 and then back to the same op-amp input
terminal
In order to explore circuit stability, we cut the feedback loop and insert a test source in order to
determine the loop gain; we now make the cut in the lead feeding into the input terminal of the op-
amp:
The test signal vt is amplified by the amplifier, and comes back through R2 to its starting point
where we label the voltage vf (for feedback voltage):
We represent the op-amp by a VCVS having a finite voltage gain µ
Performing this procedure for the circuit on the left and on the right, we have:
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Topic 9 – Op-amps and transistors
µ R1 µ R1
v f (left ) = − vt = − µ Fvt v f (right ) = + vt = + µ Fvt
R1 + R2 R1 + R2
F is the voltage division ratio which determines vf from vo; F is called the feedback factor:
R1
F=
R1 + R2
We define the loop gain by the equation:
vf
LG =
vt
We see that the circuit on the left above has loop gain:
µ R1 µ R1
LG(left ) = − = − µF LG(right ) = + = + µF
R1 + R2 R1 + R2
We say that the circuit has positive feedback if LG > 0 and negative feedback if LG < 0
Since F and µ are positive, the left circuit has negative feedback and the right circuit has positive
feedback
3.2 Negative and positive feedback
In order to determine the effects of positive and negative feedback, consider that we re-join-up the
circuit where we broke it and remove the test source vt at the same time, but we remember that the
loop gain is negative and positive for the left and right circuits respectively
Since there is no independent source, we can assume that all voltages and currents are zero
We then assume that there is a source of interference, perhaps a mobile phone transmitting, and that
the signal is picked up by the wire connected to the op-amp input terminal
In the case where there is positive feedback, the interfering signal will be amplified as it traverses
the loop and will appear instantaneously at the point where the interference was picked up
considerable amplified and in phase with the interference signal; this amplified signal will in turn be
amplified again; the result is that the voltages in the circuit will increase uncontrollably until they
are limited by the power supply voltage of ±5 V or ±15 V; the circuit will cease to operate correctly
as an amplifier of the input signal
Consider now the case where there is negative feedback; the situation will be similar up to the point
where the amplified interference signal appears again at the op-amp input, but in this case the
amplified signal is 1800 out of phase with the interfering signal and will therefore tend to cancel the
effect of the interfering signal
The negative feedback case requires some assumptions about the dynamics of the op-amp for a
precise analysis, but it may be shown that with negative feedback, following a burst of interference,
all voltages and currents will tend towards their DC steady state values of 0 V and 0 A; in other
words the circuit is stable
Depending on the dynamics of the op-amp, output voltage versus time for a stable and unstable
circuit could have typical forms:
vo ( t )( stable) = Ae−t τ vo ( t )(unstable) = Ae+t τ
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Topic 9 – Op-amps and transistors
So far, we have considered a circuit which may have either negative or positive feedback
In practice, circuits often have elements connected to both input terminals, which means that both
positive and negative feedback is occurring
Such cases can be represented by a generic op-amp circuit:
Then we define different feedback factors for the + and – input terminals of the op-amp:
R1 R3
F+ = F− =
R1 + R2 R3 + R4
where:
v + = F+v o v− = F−v o
The condition for a circuit to be stable is:
F− > F+
If F− < F+ , the circuit is unstable
If F− = F+ , we say that the circuit is on the borderline between stability and instability (or
marginally stable/unstable)
3.3 Example of Stability Testing
We show a circuit which realises negative resistance being tested by a v-source and by an i-source
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Topic 9 – Op-amps and transistors
15
Topic 9 – Op-amps and transistors
First we check stability of the circuit: we deactivate both voltage sources and compute the positive
and negative feedback factors F+ and F–; these turn out to be F+ = 1/3 and F– = 2/3; hence the circuit
is stable
Our first step in the analysis using the nodal method is to replace the op-amp by its (grounded)
nullor equivalent:
It is sometimes helpful to alter the circuit layout slightly to an equivalent form with a ladder
structure:
We see there are two non-essential nodes, one super-node, and one essential node; thus, we
anticipate two KCL equations
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Topic 9 – Op-amps and transistors
Note that the dependent source is treated like an independent source when determining non-
essential nodes
Returning to our nullor version of the circuit, we prepare it for nodal analysis as shown:
We must write one equation at the super-node and one at the essential node
However, the voltages on either side of a nullator are the same and this means that the super-node
and the essential node have the same voltage, which we label as v
Although their voltages are the same, we apply KCL to each node separately, remembering that the
nullator carries zero current
v − 8 v v + 2 − vo
+ + = 0 (for supernode)
2 2 2
v v − vo
+ = 0 (for essential node)
6 3
Note that we have used the self-consistent units of kΩ, mA, and V
We can easily solve the KCL equations to get v = 4 V and vo = 6 V
The solution can easily be checked by looking at the circuit
To establish confidence, we now repeat the above analysis using a VCVS with finite gain, and then
let the VCVS gain go to infinity in order to represent the ideal op-amp
4.2 Justification for the Nullor Model
The version of the circuit with the op-amp replaced by a finite gain VCVS is as follows:
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Topic 9 – Op-amps and transistors
v o = µ(v1 − v 2 )
Using this equation to eliminate vo in the above equations, we have the matrix equation:
⎡3 − µ µ ⎤⎡v1 ⎤ ⎡6⎤
⎢ ⎥⎢ ⎥ = ⎢ ⎥
⎣ −2µ 3 + 2µ⎦⎣v 2 ⎦ ⎣0⎦
Solving, we have:
⎡2( 3 + 2µ) ⎤
⎡v1 ⎤ ⎢ 3 + µ ⎥
⎢ ⎥ = ⎢ 4µ ⎥
⎣v 2 ⎦ ⎢ ⎥
⎢⎣ 3 + µ ⎥⎦
Solution
The feedback factors are F– = 1 and F+ = 1/14; hence this op-amp circuit is stable
We apply nodal analysis using a nullor to replace the buffer:
We have labelled the node at the top of the norator with the symbol vc, for we are considering it
(from a topological point of view) to be a VCVS (with gain → ∞)
Note that due to the norator, node vc is a non-essential node
The KCL equations at the two essential nodes v1 and v2 are, therefore:
v1 − 2 v1 v1 − v 2 v1 − v c
+ + + = 0 (for node v1 )
1 2 2 2
v 2 v 2 −12 v 2 − v1
+ + = 0 (for node v 2 )
4 1 2
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Topic 9 – Op-amps and transistors
5 TRANSISTOR CIRCUITS
5.1 Introduction
The transistor is certainly a very important circuit component because it is used to construct all the
key building blocks of digital and analogue circuits from logic gates to operational amplifiers
It is also an important component in its own right for analogue circuit design both in integrated
circuits and non-integrated circuits
Transistors are of two main types:
The bipolar junction transistor (BJT) was invented in 1947 and was the main active device until
about 1970
The field effect transistor (FET) became important in about 1970 in the form of CMOS-FETs
(complementary metal-oxide-semiconductor - FETs) and rapidly took over from the BJT for most
digital and analogue applications
The reasons for the success of CMOS-FETs is their low power consumption, ease of design and
their small size which allows the development of very large scale integrated (VLSI) circuits with
over 106 transistors on a single chip
Transistors in most applications need to be operated with power supplies; these are usually DC
voltage sources or DC current sources; application of suitable DC sources to a transistor to allow it
to operate is called biasing and the components that do this constitute the bias circuit
Transistors are active devices which are able to amplify a small input signal to produce a larger
output signal
A small AC input signal can effectively modulate the DC power supplied to the transistor from its
biasing circuits so that some of the modulated DC power appears as a transistor AC output signal
This means that the input and output signals of a transistor consist of both DC (bias) and AC
(signal) components superimposed
In many applications, it is important that the relationship between the AC input signal and the AC
output signal is linear; for instance to avoid distortion in an audio application
It is thus common practice to separate the linear AC operation of the transistor and produce a linear
AC equivalent circuit which describes this important aspect of behaviour
In this section we will look at some linear AC equivalent circuits for transistors and apply the
methods of circuit analysis to determine AC responses for given AC input signals
The term 2 course ‘Analogue Electronics’ will provide a detailed study of different types of
transistors, the design of suitable biasing circuits and the extraction of linear AC equivalent circuit
models of the type we use here
We emphasise again that the transistor circuits we give here will not work as given because power
supplies are not included at this stage; this material is presented to provide familiarity in working
with linear AC equivalent circuits for transistors which will be used extensively in later courses
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Topic 9 – Op-amps and transistors
The three terminals are labelled E for emitter, B for base, and C for collector
BJTs are of two types called NPN and PNP depending on their construction; in the symbol for an
NPN transistor, the arrow on the emitter points from the base and towards the emitter (as above); in
the symbol for a PNP transistor, the arrow on the emitter has the reverse orientation
The operation of the transistor can be explained briefly as follows:
Consider an external current iE in the form of electrons to be injected into the device from the
emitter
99 % of the electrons that are injected go across the base region and emerge from the collector
terminal; this fraction of electrons is denoted α; thus the collector current is αiE
However, 1 % of the electrons that are injected at the emitter undergo a process called
recombination which leads to base current (1 – α)iE which is much smaller than iE and iC
In reality, the base current would be the input signal and emitter current iE or collector current iC
would be the output signal, an output signal about 100 times as large as the input base current
Recalling that electron motion to the right constitutes conventional current to the left, we see that
the three terminal currents have the directions shown in the diagram above
5.3 BJT Models
We are now in a position to form a model for a BJT:
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Topic 9 – Op-amps and transistors
An NPN transistor is biased so that the collector is at a more positive voltage than the base and
therefore the diode DC is reverse biased and may be ignored
The diode DE is forward biased and therefore the transistor base voltage tends to be about +0.7 V
with respect to the emitter voltage
Hence for the DC model, we can replace DE by a 0.7 V voltage source V0:
Note that this DC model can not predict AC signals correctly; it is useful however for design of bias
circuits. In the DC model, currents are represented by upper-case I and upper-case E, B and C
For the AC small signal model (which will be derived properly in the Analogue Electronics course),
we can replace DE by a resistor re that depends upon the DC value of emitter current:
Note that this AC model cannot predict DC signals correctly; for instance, the fact that the base
voltage is around 0.7 V higher than the emitter is no longer apparent. In the AC model, currents are
represented by lower-case i and lower-case e, b and c
It may be shown that the re is given by:
VT
re = where VT = 25 mV
iE
where iE is the total instantaneous emitter current. Since this current consists of a DC bias value IE
with an AC signal component ie superimposed then, strictly, re will vary with the AC signal
waveform variations
6
ie (AC)
2
-1
0 5 10 15 20 25 30 35 40 45 50
Time (ms)
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Topic 9 – Op-amps and transistors
Notes:
1) This is a small signal AC equivalent circuit; the DC sources have already been de-activated
for the analysis and are not shown
2) In this circuit, we say that the transistor is in common base configuration since the base
terminal is the reference node for both the input and output voltages of the transistor
3) Input resistance is the resistance presented to the input voltage source by the amplifier
4) Voltage gain is the ratio of the output (collector) voltage vc to the input (emitter) voltage ve
Solution
We first replace the transistor symbol by its small signal equivalent circuit:
Note that we use an upper-case R to denote circuit elements and lower case r to denote component
within elements models
There is only one essential node, the output terminal (collector terminal of the BJT) – so only one
KCL nodal equation is required:
vc
+ αie = 0
Rc
The controlling variable ie for the CCCS can be expressed in terms of the input source voltage ve:
ve
ie = −
re
Hence:
αRc
vc = ve
re
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Topic 9 – Op-amps and transistors
and:
vc α Rc Rc 5000
Av = = ≈ ≈ ≈ 200
ve re re 25
Thus, the collector voltage is much larger: than the emitter voltage
Notice that the input source establishes a current ie in the low-valued emitter diode resistance re, and
the BJT reproduces that same current in the much larger resistance Rc through the action of the
CCCS
It is from this principle that the name transistor comes: transferring current through a resistor
Though the voltage gain of the common base circuit is large, the input resistance is small
Thus, if the Thevenin resistance of the input source is non-zero, a sizable voltage drop will occur at
the input, and the overall voltage gain will be reduced
This is a disadvantage of the configuration
Another is the fact that the current gain is less than unity
The common-emitter configuration overcomes these limitations
5.4 The Common Emitter Small Signal Model for the BJT
Suppose we twist the BIT around so that the base terminal is the input terminal:
Since the base current is given by (1 – α)iE and α ≅ 0.99, then the input current iB is very small
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Topic 9 – Op-amps and transistors
We would therefore expect that both the current gain and the input resistance would be much higher
than for the common base circuit
It is helpful to define a new parameter β which is the current gain in common-emitter configuration:
iC α iE α
β= = =
iB (1 − α ) iE 1 − α
Thus for a typical value for α of 0.99, then β will be 0.99/(1 – 0.99) = 99
We have been working with total instantaneous variables, but the same relationship holds, of
course, for small signal ones
Expressing the CCCS current expression in terms of β, we have the small signal equivalent circuit
shown:
The current through re is ib + βib = ib(1 + β); hence the voltage between the B and E terminals is:
vbe = reib (1 + β )
Since the current flowing between the b and e terminals is ib, it follows that there is an equivalent
resistance between the B and E terminals of:
v be
rπ = = re (1+ β )
ib
This leads to the hybrid-$ model for the transistor:
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Topic 9 – Op-amps and transistors
Example 21
Find the small signal voltage gain Av = vc/vb and the small signal input resistance of the common
emitter voltage amplifier whose small signal equivalent circuit is shown:
Solution
Just as for the common base circuit, we replace the BJT symbol with its small signal equivalent
circuit, in this case the hybrid–$ model:
There is only one essential node the collector terminal of the BJT
The nodal equation is:
vc
+ βib = 0
Rc
We now express the controlling variable for the controlled source ib in terms of the independent
source variable vb:
vb
ib =
rπ
These two equations give the voltage gain:
vc − β ib Rc βR
Av = = =− c
vb ib rπ rπ
Substitution of the expression for r$ in terms of re shows that the voltage gain is the same as that for
the common base amplifier apart from the minus sign:
β Rc β Rc αR
Av = − =− =− c
rπ re (1 + β ) re
α β
Note that β = reverses to α =
1−α 1+ β
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Topic 9 – Op-amps and transistors
The minus sign in the voltage gain expression for the common-emitter amplifier implies that there
is a 180o phase shift between the output and input signals
However, the input resistance of the common emitter amplifier r$ is (β + 1) times as large as the
value for the common base circuit re
The current gain is clearly equal to β, a factor of β + 1 times as large as for the common base circuit
since β/α = 1/(1 – α) = β + 1
Thus, the common emitter circuit has the same voltage gain magnitude, a higher current gain, and a
higher input resistance
These factors lead to the highest power gain that can be produced by a transistor and an amplifier
circuit which can be readily cascaded to lead to enormously high overall gains, as required, for
instance, in a radio receiver
5.6 The Ideal BJT Model
For an ideal BJT, the CCCS in its model would have an infinite β just as an ideal op-amp is
equivalent to a VCVS with infinite voltage gain
Let's get some idea of how to treat such a case by looking more closely at the hybrid–$ model:
Let's convert the controlling variable for the controlled source from ib to vbe
This gives the CCCS constraint equation:
v be β β α
βib = β = v be = v be = v be = gm v be
rπ rπ (β + 1)re re
where
β α 1
gm = = ≈
rπ re re
is called the transconductance which depends on re and is practically independent of β
The resulting hybrid–$ model with a VCCS is as follows:
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Topic 9 – Op-amps and transistors
We see that the directions of all total instantaneous currents are reversed compared with the NPN
transistor
This means that all bias voltages and currents are the negative of those for an NPN transistor
However, it does not affect the small signal AC operation and the small signal AC model is
identical to that for the NPN BJT
Thus the same small signal AC models may be used for NPN and PNP transistors
Solution
We first add a sinusoidal test source at the general frequency ω and draw the phasor equivalent
circuit:
A number of analysis approaches are possible: we could replace the op-amp by its nullor equivalent
and perform nodal analysis
However, our approach is to make use of the general equivalent for the op-amp inverting
configuration which we derived assuming resistors
We now replace the resistors by general impedances:
The equivalent circuit we derived previously with resistors replaced by impedances is as follows:
We now let:
1
Z1 ( jω ) = R Z 2 ( jω ) =
jωC
Hence, the voltage gain is:
1
Vo Z ( jω ) jωC 1 1 1
= H ( jω ) = − 2 =− =− =j = ∠90
Vi Z1 ( jω ) R jωCR ωCR ωCR
The phase is constant (at 90o) with respect to frequency, so we do not need to plot it
The gain plot is a straight line with a slope of –20 dB/decade:
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Topic 9 – Op-amps and transistors
This circuit is referred to as an integrator circuit; it may be shown that the output voltage is the
integral of the input voltage
1 1 ⎛ vi ( t ) ⎞ 1
v o (t) =
C
∫ ic (t)dt = C ∫ ⎜⎝− R ⎠
⎟ dt = −
CR
∫ vi (t)dt
RC is the integration time constant
Transient analysis can be used to show that the circuit is marginally stable; this means that the
circuit is not usable by itself, but it does form a vital building block in many types of system,
including active filters
Example 15: Find the voltage gain function for the following circuit and sketch the Bode plot:
Solution
This circuit is related to the one in the last example by interchange of capacitor and resistor:
The phasor circuit is:
This circuit has the topology of the general inverting configuration shown above but Z1 and Z2 are
interchanged
Hence, the voltage gain transfer function is:
Vo Z ( jω ) R
= H ( jω ) = − 2 =− = − jωCR = ωCR∠ − 90
Vi Z1 ( jω ) 1
jωC
The phase is again constant (this time at – 90o), so we will not plot it
The gain function rises linearly at 20 dB/dec as shown:
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Topic 9 – Op-amps and transistors
This circuit is referred to as a differentiator circuit; it may be shown that the output voltage is the
differential of the input voltage
⎛ dv ( t ) ⎞ dv ( t )
v o ( t ) = RiR ( t ) = R⎜ −C i ⎟ = −CR i
⎝ dt ⎠ dt
6.3 The non–inverting op-amp topology
We showed that the inverting amplifier configuration which we analysed previously using resistors
as elements could be generalised to the case of general impedances as elements
A similar generalisation is possible for the non-inverting configuration:
Note that for the non-inverting configuration, unlike the inverting configuration, the input
impedance is infinite
Example 12.16: Find the voltage gain function vo/vi for the circuit shown and sketch the linearised
Bode gain plot:
Solution
We first identify the circuit as having the non-inverting topology
Next, we identify the two impedances: Z1(jω) corresponds to the 25 kΩ resistor and Z2(jω) to the
100 kΩ resistor and l0 nF capacitor connected in parallel:
1
10 5 ×
jω10−8 1
Z1 ( jω ) = 25 ×10 3 Z 2 ( jω ) = =
10 5 +
1 jω10 + 10−5
−8
jω10−8
Next, we use the equivalent circuit for the non-inverting amplifier to write the voltage gain:
1
Vo Z ( jω ) −3
jω ×10 + 10−5 jω ×10 + 5
−8
= H ( jω ) = 1+ 2 = 1+ =
Vi Z1 ( jω ) 25 ×10 3 jω ×10−3 + 1
The Bode gain plot is as follows:
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Topic 9 – Op-amps and transistors
Note here that the low frequency constant asymptotic gain is 20log(5) = 14 dB
The high frequency constant asymptotic gain (well above 5000 rad/s) is 20log(1) = 0 dB
6.4 Frequency Response of the Op–amp Itself
We have assumed so far that op–amp gain is independent of frequency, whether it is infinite (ideal
op–amp) or a constant finite value
We now explore the practical case where the op-amp has a non-infinite, or finite, bandwidth
We start by showing the op-amp terminal voltages:
The current into each of the input terminals is always zero; therefore, it is equivalent to the open
circuit shown in the phasor equivalent circuit:
This equivalent circuit for the op-amp includes the frequency response of the op–amp:
(
Vo = H ( jω ) V+ − V− )
Ao Aoω a
H ( jω ) = =
ω jω + ω a
1+ j
ωa
We can write the voltage frequency response function in Euler form:
Ao
H ( jω ) = ∠ tan −1 (ω ω a )
1 + (ω ω a )
2
For ω → 0, we have:
H ( j0 ) = Ao
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Topic 9 – Op-amps and transistors
Fo ω = ωa, the real and imaginary parts in the denominator become equal defining a break
frequency as the gain begins to follow a –20 dB/decade asymptote of falling gain at higher
frequencies
The gain and phase asymptotes for the op-amp are as follows:
For the most common type of op-amp called the 741, the magnitudes of the parameters are:
1
Ao ≈ 10 5 fa = ω a ≈ 10 Hz
2π
The model for the frequency response is a simple RC lowpass filter type of response called the
dominant pole model; in practice, most op-amps follow this characteristic quite well
We consider now the high frequency asymptote in more detail; let ω → ∞ in the op-amp frequency
response function:
Aoω a
H ( jω ) ω →∞ =
ω
This expression describes the high frequency –20 dB/decade asymptote
The frequency ω at which this asymptote reaches a gain of unity (or 0 dB) is called the unity gain
cut-off frequency and designated GB or ωT
From the above, we have:
ω T = Aoω a
Because Ao is the low-frequency (or DC) voltage gain and ωa is the 3 dB bandwidth, ωΤ is also
called the gain bandwidth product
Sometimes one uses the Hertz form
ωT
fT = Ao f a =
2π
For the 741 type of op-amp, we have typically:
fT = Ao fa = 10 5 × 10 Hz = 10 6 = 1 MHz
Example 17
Find the voltage transfer function for the non-inverting op-amp circuit shown and sketch the Bode
gain plot assuming that the op-amp can be represented by its dominant pole model:
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Topic 9 – Op-amps and transistors
Solution
We first replace the op-amp symbol with the non-ideal op-amp model:
Analysis can proceed using KCL and the voltage divider rule, but in this case we define a feedback
factor:
R1
F=
R1 + R2
and obtain:
( ) (
Vo = H (ω ) Vi − V f = H (ω ) Vi − FVo )
Thus:
H (ω )
Vo = Vi
1+ FH (ω )
We next insert the explicit equation for H(ω); this results in:
1 1 Aoω a Aoω a
Vo = Vi = Vi = Vi = Vi
1 H (ω ) + F ( jω + ω a ) Aoω a + F jω + ω a + FAoω a jω + (1 + FAo )ω a
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Topic 9 – Op-amps and transistors
Ao
× (1+ FAo )ω a
1+ FAo Goω 'a
G( jω ) = =
jω + (1+ FAo )ω a jω + ω 'a
where Go is the closed loop DC gain:
Ao 1
Go = ≈
1 + FAo F
and ωa’ is the closed loop bandwidth:
Ao ω
ω a' = (1 + FAo )ω a ≈ FAoω a ≈ ωa ≈ T
Go Go
We can immediately see that the gain of the op-amp itself has been reduced and the bandwidth
increased both by the same factor:
We have superimposed a plot of the open loop gain (the gain of the op-amp itself) over the gain plot
of the complete amplifier to allow comparison
Since the gain of the op-amp has been reduced by the same factor that the bandwidth has increased,
this means that corner point for the closed-loop response will always lie on the –20dB/dec
asymptote of the open-loop op-amp gain curve, as shown
The variable in the design is the feedback factor F which depends on the ratio of the resistors
For small values of F, the gain will be high and the bandwidth small; for high values of F, the gain
will be low and the bandwidth high; in all case, the corner point will lie on the amplifier’s –20
dB/dec asymptote
We can see now how op-amp circuits can possess a reasonably high bandwidth even though the
bandwidth of the op-amp itself may be as low as 10 Hz
For example, for the 741 op-amp, possible closed-loop gain and bandwidth combinations are as
follows:
Go f' a
1 1 MHz
10 100 kHz
100 10 kHz
1000 1 kHz
If the bandwidth for a given gain requirement is not high enough, then a special wideband op-amp
would have to be used.
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Topic 9 – Op-amps and transistors
Assume that the BJT is well represented by its high frequency hybrid–$ model with the following
parameters which are valid at the chosen bias point:
r$ = 1 kΩ, c$ = 10 pF, co =0.1 pF, gm = 20 mS.
Solution
We replace the BJT symbol with the high-frequency small signal hybrid–$ model, resulting in the
time-domain equivalent circuit shown:
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Topic 9 – Op-amps and transistors
1
1 kΩ jω10−13
1 kΩ 1 0.02 Vb 1 kΩ
−11
jω10
8 CONCLUSIONS
In this topic, we have given an introduction to circuits containing op-amps and transistors. We
introduced the nullor equivalent for the ideal op-amp and considered nodal analysis of circuits
containing op-amps. We considered practical aspects of op-amps circuits, including feedback and
stability. We then looked at models for transistors. Finally, we considered the frequency response
of op-amp and transistor circuits containing capacitors including a look at the frequency response of
the op-amp itself.
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