Scribd
Upload
76 views

Mixed-Signal-Electronics: PD Dr.-Ing. Stephan Henzler

This document discusses analog-to-digital converters and their operation. It covers topics like: - Pipeline ADCs which can tolerate errors at each stage if the residue stays within the convergence region. - Subranging ADCs which use a coarse frontend ADC and fine backend ADC to achieve higher resolution. - Flash ADCs which generate all thresholds in parallel but have high power consumption so are only used for high speeds and low resolutions. - Pipeline SAR ADCs can achieve resolutions based on gain elements, not just stage quantizers. Background calibration ensures gains match over time.

Uploaded by

Ahmed Hamouda
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
76 views

Mixed-Signal-Electronics: PD Dr.-Ing. Stephan Henzler

This document discusses analog-to-digital converters and their operation. It covers topics like: - Pipeline ADCs which can tolerate errors at each stage if the residue stays within the convergence region. - Subranging ADCs which use a coarse frontend ADC and fine backend ADC to achieve higher resolution. - Flash ADCs which generate all thresholds in parallel but have high power consumption so are only used for high speeds and low resolutions. - Pipeline SAR ADCs can achieve resolutions based on gain elements, not just stage quantizers. Background calibration ensures gains match over time.

Uploaded by

Ahmed Hamouda
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 33

Mixed-Signal-Electronics

PD Dr.-Ing. Stephan Henzler

Stephan Henzler Mixed-Signal-Electronics 2011/12 1


Chapter 6
Nyquist Rate
Analog-to-Digital Converters

Stephan Henzler Mixed-Signal-Electronics 2011/12 2


Pipelined ADC 2

Stephan Henzler Mixed-Signal-Electronics 2011/12 3


High-Speed ADC: Pipeline Processing

Stephan Henzler Mixed-Signal-Electronics 2011/12 4


Robertson Diagram with Threshold Error

Stephan Henzler Advanced Integrated Circuit Design 2011/12 5


Impact of Comparator Offset on
ADC Performance

As soon as the residue leaves


the convergence region the
result suffers from major errors

Stephan Henzler Advanced Integrated Circuit Design 2011/12 6


Impact of Comparator Offset on
ADC Performance

Comparator offset reflects in


non-linearity of ADC characteristic

Stephan Henzler Advanced Integrated Circuit Design 2011/12 7


Impairments in SAR Algorithms
 Finding:
Each error in the amplifier gain or quantizer threshold causes
divergence of the convergence algorithms and thus major
conversion error

 How can we make SAR algorithms more robust

 Redundancy
 Redundant SAR algorithms

Architecture implications

 Subranging ADC  Pipeline ADC

Stephan Henzler Advanced Integrated Circuit Design 2011/12 8


How can we Strengthen the Algorithm?
 Gain and offset errors shift the algorithm out of the
convergence window.
 Does an additional threshold help?

 No, not necessarily. Important is that the residue is not


scaled back fully.

Stephan Henzler Advanced Integrated Circuit Design 2011/12 9


Redundant SAR Algorithms

 Stage quantizer with B bit  Stage quantizer with B bit


(here B=2) (here B=2)
 Gain factor = 2B  Gain factor < 2B
 Sensitive to thresh. var.  redundant SAR
 not sensitive to thres. var.
Stephan Henzler Mixed-Signal-Electronics 2011/12 10
Redundant Pipeline ADC Algorithm
 Redundant algorithm
– Two thresholds
– Gain ( = 2 ) does not scale
residue back to full scale

 Stage resolution 1 bit


 Information contained
in bi is 1.5 bit
 Redundancy

 Residue stays in
convergence box even
with strong gain and
offset variations

Stephan Henzler Mixed-Signal-Electronics 2011/12 11


Subranging Principle

quantization error

 Principle: Coarse quantization in frontend ADC and fine


quantization of residue in backend ADC
 Pipelining possible (s&h between frontend and backend
 Generalization to multi-stage ADC ( pipeline ADC)

Stephan Henzler Mixed-Signal-Electronics 2011/12 12


Model of Frontend ADC

Stephan Henzler Mixed-Signal-Electronics 2011/12 13


Linear Model of Subranging ADC

Stephan Henzler Mixed-Signal-Electronics 2011/12 14


What is the “Digital Result Combiner“?
 Output of forward and backward ADC from last slide:

 Multiply result of backend ADC by 1/a and add to Bout,1

 Overall quantization error only depends on quantization error


of backend ADC
 Quantization error of backend ADC is scaled by 1/a
 Resolution:

Stephan Henzler Mixed-Signal-Electronics 2011/12 15


Linear Model of Subranging ADC

 Effective resolution of frontend ADC is ld(a)


 not necessarily the same as the number of bits of Bout,1
 Analog and digital gain must match, otherwise leakage of
quantization error of frontend ADC

Stephan Henzler Mixed-Signal-Electronics 2011/12 16


Reconstruction of Signal

matching
 Error free reconstruction requires matching between analog
gain a and digital gain ad
In the context of variations this requires calibration

Stephan Henzler Mixed-Signal-Electronics 2011/12 17


General Pipeline SAR ADC

Stephan Henzler Mixed-Signal-Electronics 2011/12 18


General Pipeline SAR ADC II
 As long as analog and digitals gains match all intermediate
terms vanish

 Resolution R:

Gain elements determine resolution, not the stage quantizers

 Effective stage resolution:

 Last stage must not saturate under all circumstances!


Stephan Henzler Mixed-Signal-Electronics 2011/12 19
Background Calibration for Stage Gain

Digital gain is
continuously
adjusted, i.e. even
slow transient
variations are
corrected

Li et al., Background Calibration Techniques for Multistage Pipelined ADCs With Digital Redundancy, TCAS II, 9/2003.
Fu et al., A Digital Background Calibration Technique for Time-Interleaved Analog-to-Digital Converters, JSSC, 12/1998
Liu et al., A 15b 40MS/s CMOS Pipelined ADC with Digital Background Calibration, JSSC, 5/2005
many more …

Stephan Henzler Mixed-Signal-Electronics 2011/12 20


Classification of Callibration Techniques
 Calibration comprises two phases
– Error estimation
– Error correction
 Analog approach  additional analog components, noise,
power, distortion, etc.
 Digital approach: Works on reults only, i.e. does not interfere
with analog signal processing

Calibration

Foreground Background

Virtual True
Ginés et al., A Survey on Digital Background Calibration of ADCs, ECCTD, 2009.

Stephan Henzler Mixed-Signal-Electronics 2011/12 21


Summary Pipeline ADC
 Stage errors can be tolerated if the residue stays inside the
convergence region
– Minimum requirement is that the residue is back in the convergence region
before the final quantizer)
– Take care for nonlinearity which is not revealed by the linear model
 Trade-off sampling frequency – resolution – latency
 Number of stages, i.e. number of elements grows linearly
with resolution (not exponentially, ref flash ADC)
 Accurate sample-and-hold elements required
(That’s the reason why pipelined time-to-digital converters do not exist)

Stephan Henzler Mixed-Signal-Electronics 2011/12 22


Nyquist Rate Analog-to-Digital Converters

– Flash Converter –

Stephan Henzler Mixed-Signal-Electronics 2011/12 23


Flash Converter
 Generate all switching thresholds in parallel
and compare them to input voltage in parallel
 very fast, but high effort in terms of
power, area, noise generation, clock
distribution, input buffering
 high speed applications with moderate
resolution

implemented
as parallel
connection
of 2 unit resistors
Stephan Henzler Mixed-Signal-Electronics 2011/12 24
Properties of Flash ADC
 Advantages
– parallel processing  very fast
– no analog post-processing

 Disadvantages:
– Huge hardware effort and power consumption (2N)
– high input capacitance
– synchronous routing of clock signal

 Good for high-speed converters with low # of bits

Stephan Henzler Mixed-Signal-Electronics 2011/12 25


thermometer code
one-hot code Flash Converter
 Thermometer-to-binary
decoder often
implemented in 2 steps
– thermo  one-hot
– one-hot  binary

 Allows for insertion of


bubble correction in
between decoders

transition detector
Stephan Henzler Mixed-Signal-Electronics 2011/12 26
Bubble Correction in Flash Converter

Stephan Henzler Mixed-Signal-Electronics 2011/12 27


Bubble Correction in Flash Converter
 Bubbles in flash converters:
0 0 0 0 0 0 1 1 1 1 1 1
0 0 0 1 0 0 1 1 1 0 1 1

 Source of bubbles:
– noise
– meta-stability
– x-talk
– mismatch
–…
 Basic bubble correction with 3-input NAND gate: transition
only detected if more than one high signal occurs.
 More complex encoders require to eliminate long distance
errors
Stephan Henzler Mixed-Signal-Electronics 2011/12 28
Interpolating Flash Converter
 Preamp. with moderate
gain to provide smooth
transition region
 Latch for sign detection
 Resistive interpolation
to create additional
transition curves in
between 2 regular ones

Stephan Henzler Mixed-Signal-Electronics 2011/12 29


Stephan Henzler Mixed-Signal-Electronics 2011/12 30
Interpolating Flash Converter

 Interpolation does not work at


boarders
 Overrange amplifiers required

Stephan Henzler Mixed-Signal-Electronics 2011/12 31


Interpolating Flash Converter (cont)
additional series resistors to balance
delays in high-speed interpolating
flash converters

Stephan Henzler Mixed-Signal-Electronics 2011/12 32


Kickback Effect
 Especially in flash converters
 Clocked comparators produce lots of
noise at their inputs when toggling
from track to latch mode.
 Different impedance seen from both
comp inputs
(input drive vs. resistor ladder)
 Differential error that may corrupt
next conversion
 Decay of error sets max sample rate

Stephan Henzler Mixed-Signal-Electronics 2011/12 33

You might also like