IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO.

5, MAY 2009 1499

One-Cycle-Controlled Bidirectional AC-to-DC

Converter With Constant Power Factor
Dharmraj V. Ghodke, Sreeraj E. S., Kishore Chatterjee, and B. G. Fernandes

Abstract—Grid-connected unity-power-factor converters based

on one-cycle control (OCC) do not require the service of phase-
locked loop or any other synchronization circuits for interfacing
with the utility. As a result, these schemes are becoming increas-
ingly popular. However, as the power handled by the converter
increases, the power factor deteriorates. To understand quantita-
tively the cause of poor power factor while negotiating high power
loads, large signal models for these schemes are developed. Having
understood the cause for poor power factor operation, a modified-
OCC-based converter is proposed. This scheme has high power
factor while supplying high power loads. Detailed simulation stud-
ies are carried out to verify the efficacy of the scheme. In order to
confirm the viability of the scheme, detailed experimental studies Fig. 1. Single-phase full-bridge converter.
are carried out on a 3-kW laboratory prototype.
Index Terms—AC–DC power conversion, one-cycle controller, supply power at power factors near to unity. As a result, they
power-factor correction, single- and three-phase rectifier. are becoming increasingly popular [3]–[5], [10]. Moreover,
in these schemes, the switching frequency of the devices is
held constant. This is an attractive feature for high power
I. I NTRODUCTION
converters. However, OCC-based schemes exhibit instability

T RADITIONALLY, diode or thyristor bridge rectifiers are

employed to obtain dc voltage from ac main. These rec-
tifiers pollute the utility with low-order harmonics, which are
in operation, when the converter is lightly loaded [3], [10],
[12], [16]. Moreover, these converters cannot shift its operation
from rectifying to inverting mode of operation, as would be the
difficult to filter. Pulsewidth-modulated (PWM) converters are case if the converter was required to negotiate active type of
used to overcome this problem. They shift the frequency of the loads. In order to address these limitations, a modified-OCC
dominant harmonics to a higher value so that these harmonics (M-OCC)-based scheme has been presented in [12] and [13]. In
can be eliminated by employing a small passive filter [1]. The all the aforementioned schemes based on OCC, the power fac-
PWM bidirectional converter draws a near sinusoidal input tor decreases under certain operating condition. This problem
current while providing a regulated output dc voltage and can becomes prominent at low switching frequencies. In this paper,
operate in the first and second quadrants of the voltage–current reasons for this limitation are analyzed. Having understood the
plane [2]. Generally, the control structure of a three-phase six- reasons for low power factor operation, a constant power factor
switch PWM boost converter consists of an inner current and an one-cycle controller for single-phase full bridge and three-
outer voltage control loop [2]–[6], [10]–[16]. The current con- phase six-switch boost bidirectional converter is proposed. This
troller senses the input current and compares it with a sinusoidal controller enables the converters to operate at constant and near
current reference. In order to obtain this reference, the phase unity power factor even for a wide variation in load. Detailed
information of the utility voltages or current is required. Gener- analytical and simulation studies are carried out to verify the
ally, this information is obtained by employing a phase-locked efficacy of the scheme. In order to confirm the viability of
loop (PLL) (or current phase observer technique) [7]–[9]. the scheme, detailed experimental studies are carried out on a
Grid-connected converters based on basic one-cycle control scaled down 3-kW laboratory prototype.
(B-OCC) do not require the service of PLL or zero crossing
detectors to synchronize with the grid and can be designed to
II. O NE -C YCLE -C ONTROLLED AC- TO -DC C ONVERTER
Manuscript received March 7, 2008; revised December 3, 2008. First pub- The schematic power circuit diagrams of single-phase full
lished January 9, 2009; current version published April 29, 2009.
D. V. Ghodke is with the Raja Ramanna Centre for Advanced Technology,
bridge and three-phase six-switch boost bidirectional convert-
Indore 452013, India (e-mail: [email protected]). ers are shown in Figs. 1 and 2, respectively. Although the
Sreeraj E. S. is with the Department of Electrical Engineering, Indian basic working principle of OCC-based single-phase converter
Institute of Technology Bombay, Mumbai 400076, India.
K. Chatterjee and B. G. Fernandes are with the Department of Electrical is presented in [13], for the sake of completeness, it is briefly
Engineering, Indian Institute of Technology Bombay, Mumbai 400076, India described in this paper. The dc-side capacitor voltage (νO ) is
(e-mail: [email protected]; [email protected]). sensed and compared with a reference voltage (VO∗ ), and the
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org. error is compensated by a proportional–integral (PI) control-
Digital Object Identifier 10.1109/TIE.2009.2012414 ler to produce a modulating reference signal (VM ). A bipolar

0278-0046/$25.00 © 2009 IEEE

1500 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 5, MAY 2009

TABLE I
PERFORMANCE OF B-OCC-BASED THREE-PHASE CONVERTER

TABLE II
PERFORMANCE OF M-OCC-BASED THREE-PHASE CONVERTER

Fig. 2. Three-phase six-switch boost converter.

sawtooth waveform whose peak-to-peak value of 2VM is gen-

erated. The frequency of the sawtooth waveform is set by a free
running clock, which also sets the switching frequency of the
converter. The sensed boost inductor current iS is compared
with the sawtooth waveform. At every rising edge of the clock
pulse, S2 and S4 are turned on. The inductor current, which is
also the source current, increases with a slope of K1 , and this is
given by
where VS is the rms value of each phase voltage. From (3)
(νS + VO )
K1 = R s (1) and (5), it can be concluded that the source current and volt-
L ages are in phase. However, this holds good only under the
where νS is the utility voltage, L is the inductance of the boost assumption that the average voltage across the inductor in every
inductor, and Rs is the gain of the source current sensor. When switching cycle is zero. This is true only at high switching
the magnitude of boost inductor current becomes equal to that frequency. Moreover, operation of the converter based on the
of the sawtooth waveform, S2 and S4 are turned off, and S1 and aforementioned scheme is unstable during light load condition
S3 are turned on. The boost inductor current falls with a slope and can function only as a rectifier [3], [10]. To address these
K2 ; this is given by limitations, a modified scheme is proposed in [12] and [13].
The performance of the converter utilizing this technique is
(νS − VO ) stable at light load condition, and more importantly, power
K2 = R s . (2)
L flow can now be bidirectional. In this technique, three fictitious
current signals iF n (n = A, B, C), which are proportional to
It has been shown in [13] that the peak value of current in the respective phase voltages (iF = Vn /RF n = A, B, C) and
each switching cycle is given by in phase with three utility voltages, are synthesized. These
(VM νS ) current signals are added to the boost inductor current signals,
iS = . (3) and their sum is compared with the sawtooth waveform to
(VO RS )
generate gating pulses for the converter switches.
It can be inferred from (3) that source current magnitude is
proportional to the source voltage and is in phase with it. The A. Demonstration of Low Power Factor Operation
power handled by the converter is given by
  Converters with the aforementioned schemes [3], [10], [12],
VM VS2 [13] operate at considerably low power factor as the power
P ≈ (4) handled by the converter increases. This problem becomes
Vo RS
prominent at lower switching frequencies. This feature of the
where Vs is the rms value of the source voltage. B-OCC-based converter proposed in [3] and [10] is demon-
A control block diagram for the three-phase scheme is ex- strated in Table I and that of the M-OCC-based converter
plained in detail in [10]. In this case, the phase current is proposed in [12] and [13] in Table II.
given by

(VM νn ) III. L ARGE -S IGNAL M ODELS FOR

in = , n = A, B, C (5) B-OCC-B ASED C ONVERTERS
(2VO RS )
A. B-OCC-Based Single-Phase Converter
and the total power handled by the converter is
  The problem of poor power factor operation of B-OCC-
3 · VM VS2 based converters while negotiating high power loads has not yet
P ≈ (6)
2 · Vo R S been quantitatively assessed. In order to understand the reason
GHODKE et al.: BIDIRECTIONAL AC-TO-DC CONVERTER WITH CONSTANT POWER FACTOR 1501

cycles is small, and using (7) and (8), the durations of t1 and
t2 from Fig. 3(a) are

VM − RS IN + (RS IN + VM ) K
K3
2

t1 = (10)
K3 + K1
(RS IN + VM )
t2 = . (11)
K3 + K1
The change in current ΔiS from the N th to (N + 1)th cycle in
time TS (= t1 + t2 ) is

VS VO
ΔiS = IN +1 − IN = (t1 + t2 ) + (t1 − t2 ). (12)
L L
Substituting K1 , K2 , and K3 from (1), (2) and (9) in (10)–(12)
ΔiS RS iS VO
νS = L + . (13)
Δt VM
Considering the switching time period to be small, (13) can be
approximated as
diS RS iS VO
νS = L + . (14)
dt VM
Considering νs to be a sinusoidal forcing function and neglect-
ing the harmonics in is , the steady state phasor form of (14) can
be approximated as
Fig. 3. (a) Generation of switching logic for single-phase B-OCC-based
converter presented in [3]. (b) Phasor model of single-phase B-OCC-based νS
converter presented in [3].
iS = RS VO
. (15)
VM + jωL

for low power factor operation of B-OCC-based converters Based on (15), the steady state model of the system is shown in
while negotiating high power loads, an effort has been made Fig. 3(b). It can be inferred that, if ωL is small compared to the
to develop large signal models of these converters. Using these ratio of VO and VM , the system operates close to unity power
models, the trajectory of the peak value of source current drawn factor. However, VM is proportional to the operating power
by the converter in each switching cycle can be determined. level, as depicted in (4). As a result, the power factor of the
When the switches S2 and S4 are on for the duration of t1 , converter decreases as the power negotiated by the converter
inductor current rises with the slope K1 (1), while for the increases. The problem of operation with low power factor gets
duration t2 , current falls with the slope of K2 (2). more prominent if the converter is designed to operate at low
The inductor current waveform, which is also the source switching frequency with higher value of boost inductor, which
current at the N th and (N + 1)th switching cycles, along with is generally the case in medium and high power levels.
the sawtooth waveform, is shown in Fig. 3(a). The peak value
∗
of current in N th switching cycle is IN , and IN denotes the
B. B-OCC-Based Three-Phase Converter
magnitude of current at the end of N th switching cycle.
From Fig. 3(a), The sawtooth waveform, along with the three-phase currents
  drawn at a particular switching cycle, wherein iA > iB > iC ,
∗ K2 K2 is shown in Fig. 4(a). The duration for which iA , iB , and
RS IN = RS IN 1− + VM (7)
K3 K3 iC are less than the sawtooth waveform is t1 , while t4 is the
duration for which iA , iB , and iC are greater than the sawtooth
∗
IN +1 = IN + K1 t 1 = V M − K3 t 1 (8) waveform. The duration for which only iA is higher than the
sawtooth is t2 , while t3 is the duration for which only ic is less
where K3 is the slope of the falling edge of the sawtooth than the sawtooth waveform. The slopes of the source currents
waveform and is given by of each phase n (where n is a, b, or c) for the time durations t1 ,
    t2 , t3 , and t4 are K1n , K2n , K3n , and K4n , respectively, and
VM 2VM 2VO RS are listed in Table III.
K3 = = = (9)
TI TS R e TS Since the utility considered is a three-phase three-wire
system
and Ts is the switching time period. Assuming that the change
in on time (t1 ) of the switch in two consecutive switching iA + iB + iC = 0 (16)
1502 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 5, MAY 2009

Substituting K3 from (17) and considering the switching time

period to be small, (19) can be approximated as

diA RS iA VO
νA = LA + . (20)
dt 2VM

Considering νA to be a sinusoidal forcing function and neglect-

ing the harmonic content in iA , the steady state phasor form of
(20) can be approximated for phase-A as

νA
iA = RS VO
. (21)
2VM + jωLA

Therefore, three-phase source currents can be represented as

νn
in = RS VO
, n = A, B, C. (22)
2VM + jωLn

Based on (22), the steady-state per-phase phasor model of

the system is shown in Fig. 4(b). It can be inferred that, if
ωL is small compared to the ratio of VO and VM , the source
power factor is approximately unity. Since VM is proportional
to the operating power level, the power factor decreases with
increases in power.

IV. L ARGE -S IGNAL M ODELS FOR

M-OCC-B ASED C ONVERTERS
Fig. 4. (a) Generation of switching logic for three-phase B-OCC-based con- A. Modified Single-Phase OCC Converter
verter presented in [3]. (b) Phasor model of three-phase B-OCC-based ac-to-dc
converter presented in [3]. In this converter, switching pulses are generated by compar-
TABLE III
ing the sum of the source current signal (RS iS ) and the fic-
SLOPES OF PHASE CURRENTS AT VARIOUS SWITCHING INSTANTS titious current signal iF RS = (RS /RF )νS with the sawtooth
waveform, as shown in Fig. 5(a), where RF is the resistance to
generate fictitious current (iF ). Therefore,
 
1
RS iO = RS (iS + iF ) = RS iS + νS . (23)
RF

The change in peak current between two switching cycles is

   
νS +VO νS −VO
ΔiS = K1 t1 +K2 t2 = t1 + t2 . (24)
L L
therefore,
Therefore,
IB − IC IA − IB
t3 = t2 = (17)
K3 K3 ΔiS VO
L = VS − RS iF . (25)
TS VM
where IA , IB , and IC denote the magnitude of iA , iB , and iC
at the instants where they intersect with the falling slope of the Combining (23) and (25),
sawtooth waveform. The change in phase-A current ΔiA during
 
a switching cycle (Δt = Ts ) is given by ΔiS RS VO 1
L = νS − iS + νS . (26)
TS VM RF
νA VO
ΔiA = TS − (2t2 + t3 ). (18)
LA 3LA Considering the switching time period Ts to be small, (26) can
Combining (17) and (18) and using (16) be approximated as
 
ΔiA RS iA VO RS VO diS R S VO
νA = LA + . (19) iS + L = νS 1 − . (27)
TS K3 T S VM dt RF VM
GHODKE et al.: BIDIRECTIONAL AC-TO-DC CONVERTER WITH CONSTANT POWER FACTOR 1503

Fig. 5. (a) Generation of switching logic for the M-OCC-based single-phase

converter presented in [12]. (b) Phasor model of single-phase M-OCC-based
converter presented in [12].
Fig. 6. (a) Generation of switching logic for three-phase M-OCC-based
The steady-state phasor form of (27) can be approximated as converter presented in [12]. (b) Phasor model of three-phase M-OCC-based
ac-to-dc converter presented in [12].
 
VS 1− R RS VO
F VM
iS = RS VO . (28) Combining (29) and (31) and considering TS to be small, (31)
VM + jωL can be approximated as
Based on (28), the steady-state phasor model of the system is  
RS VO diA RS VO
shown in Fig. 5(b). The conclusions made in the previous case iA + LA = νA 1 − . (32)
2VM dt RF 2VM
are also valid in this case.
Considering νA to be a sinusoidal forcing function and neglect-
B. M-OCC-Based Three-Phase Converter ing the harmonic in iA , the steady state phasor form of (32) can
be represented as
As shown in Fig. 6(a), the sum of phase current signal and
the fictitious current signal inF RS = (RS /RF )νn is compared  
νA 1 − RS VO
with the sawtooth waveform. At the point of intersection of the RF 2VM
iA = RS VO
. (33)
waveform, the following can be written: 2VM + jωLA
 
Vn Similarly, three-phase inductor currents are given by
ieff(n) = RS (inf +iLn ) = RS +iLn , n = A, B, C.
RF
(29)  
Moreover, νn 1 − RS VO
RF 2VM
in = RS VO
, n = A, B, C. (34)
+ jωLn
IOA − IOB IOB − IOC 2VM
t2 = t3 = . (30)
K3 K3 Based on (34), the steady state phasor model of the system
The change in current in phase-A in a switching cycle is is shown in Fig. 6(b). In addition to the conclusions drawn
given by in Section IV, from models shown in Figs. 5(b) and 6(b), it
can be inferred that, for (1/RF )(VO /2VM ) < 1, the converter
νA νA operates in rectifying mode and, for (1/RF )(VO /2VM ) > 1,
ΔIA = (TS ) − (t3 + 2t2 ). (31)
LA 3LA the converter operates in the inverting mode.
1504 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 5, MAY 2009

Fig. 8. Control block diagram of the B-OCC-based single-phase converter

proposed in [3].
Fig. 7. (a) Equivalent circuit of the single-phase converter when switches
S2 and S4 conduct. (b) Equivalent circuit of the single-phase converter when
switches S1 and S3 conduct. Now, the duty ratio D is a time varying function which is
dependent on the instantaneous value of the source current is . In
V. P ROPOSED CPF-OCC-B ASED C ONVERTER order to operate the switches with a duty ratio D so that (40) is
In order to understand the cause for low power factor op- satisfied, the schematic control circuit that is used [3] is shown
eration when the OCC-based converters are delivering large in Fig. 8.
magnitude of load, the basic principle of operation of OCC- Every positive pulse of the free-running clock having a time
based converters, which is presented in detail in [3] and briefly period of Ts resets the integrator and sets the R–S flip-flop,
presented in Section II, is again been repeated here. Considering thereby turning on switches S2–S4 and turning off switches
the schematic power circuit diagram of single-phase converter S1–S3. The signal VM is integrated with a time constant Ti and
shown in Fig. 1, switch pairs S1–S3 and S2–S4 are operated is then subtracted from the original signal VM to obtain νR .
with a switching time period of Ts such that S2–S4 are on for Therefore,
a time duration of DTs and S1–S3 are on for a time duration
 s
DT
of (1 − D)Ts . The pertinent equivalent circuits are shown in 1
Fig. 7(a) and (b). The switching frequency of the switching νR = V M − VM dt. (41)
Ti
devices is 1/Ts . 0
∗ ∗
If Ts is assumed to be small, referring to Fig. 1, IN ≈ IN +1 ,
therefore, the average voltage drop across the inductor L can be At steady state, VM is constant, and therefore,
equated to zero, as given in
DTs
νR = V M − VM . (42)
(νs + Vo )DTs + (νs − Vo )(1 − D)Ts = 0. (35) Ti

Hence, When νR becomes equals to Rs is , the flip-flop resets, the

switches S2–S4 are turned off, and the switches S1–S3 are
νs = (1 − 2D)Vo . (36) turned on. Therefore,

Now, if is has to be a sinusoidal current in phase with νs , it DTS

RS iS = VM − VM . (43)
has to be made proportional to νs . Defining this proportionality Ti
constant to be Re
The time constant of the integrator Ti is chosen so that
νs = is Rs Re (37)
Ts
wherein Rs is the gain of the source current sensor. The Ti = . (44)
2
constant Re represents the effective emulated resistance that is
being viewed by an ac source when the converter is feeding a Substituting (44) in (43),
certain load and drawing in phase current is from the source.
Therefore, to have a unity power factor operation, the condition RS iS = VM (1 − 2D) (45)
that has to be fulfilled is obtained by combining (36) and
(37) as which is same as that of (40) which is required to be satisfied to
make is proportional to νs . The error that exists between dc link
is Rs Re = (1 − 2D)Vo . (38) voltage and its reference is processed through a PI controller to
generate VM . This value of VM sets the emulated load Re for
Defining the system, as per (39). Therefore, any mismatch between the
V0 emulated load Re and the actual load on the system is nullified
VM = (39) once a proper value for VM is estimated by the controller.
Re
The process of generation of switching logic for the switches
(38) transforms to by means of the control block diagram in Fig. 8 is shown
in Fig. 3(a). It can be observed from this figure that, at the
VM (1 − 2D) = Rs iS . (40) beginning of a switching cycle, the instantaneous value of the
GHODKE et al.: BIDIRECTIONAL AC-TO-DC CONVERTER WITH CONSTANT POWER FACTOR 1505

∗ ∗
source current IN is not equal to its instantaneous value IN +1
at the end of that switching cycle. This is due to the fact that
the magnitude of forcing function νs is also changing within a
switching cycle. If

∗ ∗
IN − IN +1 = Δi (46)
Δi = 0 (47)

the condition depicted by (35) is valid, and is is in phase with

νs , as shown earlier. Now, as Δi = 0, the condition of (35)
is not valid, and hence, is would not be in phase with νs .
The larger is the magnitude of |Δi|, the more is the phase
shift that is introduced between νs and is , and hence, the poor
is the power factor of the system. From Fig. 3(a), it can be
inferred that |Δi| increases with increment in VM , as well
as with increment in Ts . Now, VM increases with increment
in load negotiated by the converter, as depicted in (39), and
Ts increases if the system is designed for a lower value of
switching frequency. Therefore, as the load on the OCC-based
converter is increased or the switching frequency is reduced, the
power factor of these converters falls. In the case of M-OCC-
based bidirectional ac-to-dc converter proposed in [13], the
fictitious current component iF is added with is , and then, this
signal is compared with the sawtooth waveform. Therefore,
the amplitude of VM is more in this case compared to that
of B-OCC-based converter for the same amount of load being
negotiated. Hence, the power factor of M-OCC-based converter
is less compared to that of B-OCC-based converter when the
load negotiated by both of them remains the same for a given
switching frequency. This feature of OCC-based converters is
quantitatively corroborated by deriving the large signal models Fig. 9. (a) Control block diagram of the proposed CPF-OCC-based single-
of these systems in Sections III and IV. From the analyses phase converter. (b) Control block diagram of the proposed CPF-OCC-based
presented earlier and also from the large signals models derived three-phase converter.
in the previous sections, it can be inferred that the amplitude
of the sawtooth waveform determines the power drawn from TABLE IV
the source and the power factor. The amplitude of the sawtooth PARAMETERS USED FOR THE SIMULATION MODEL AND
LABORATORY PROTOTYPE OF THE SYSTEM
waveform increases with an increase in power drawn from
the source. As a result, the power factor decreases. Hence,
by some means, if the amplitude of the sawtooth waveform is
kept small and is maintained constant throughout the operating
range, high power factor can be maintained. Models shown in
Figs. 5(b) and 6(b) suggest that power level can be changed
if 1/RF is varied in sympathy with the power requirement
of the load while maintaining VM constant. Based on these
observations, in the control scheme of the OCC-based converter
proposed in this paper, the amplitude of the sawtooth waveform
is maintained constant, and its value is kept low. Furthermore,
the amplitude of signals obtained after multiplying the utility
A. CPF-OCC-Based Single-Phase Converter
voltages by 1/RF is multiplied by the error existing between
the sensed dc link voltage and the dc link voltage reference. The schematic control block diagram of the proposed con-
This ensures that the magnitude of the signal, which is in verter for single-phase case is shown in Fig. 9(a). The dc link
phase with the utility voltages, gets modulated as per the power capacitor voltage νO is sensed and compared with the reference
requirement of the load. The equations describing the behavior voltage VO∗ . The error so generated is fed to a PI controller.
of the proposed constant power factor OCC (CPF-OCC)-based The fictitious current signal iF , which is proportional to the
converter remain the same as that of (28) and (34). The detailed source voltage, is generated by multiplying νS by 1/RF . The
structure of the controller of the proposed scheme is explained inverted output (−νe ) of the PI controller is multiplied with
in the following section. iF to generate the signal im . The sum of im and the signal
1506 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 5, MAY 2009

Fig. 10. Schematic test setup for three-phase six-switch boost converter in rectifying and inverting modes of operations.

proportional to the source current (im + RS is ) is then com- TABLE V

COMPARISON OF THE POWER FACTOR OF THE PROPOSED CONVERTER
pared with the sawtooth waveform (νR ). Unlike in the earlier WITH OTHER OCC-BASED CONVERTERS
schemes based on OCC, the amplitude of the sawtooth wave-
form is maintained constant. Moreover, here, its magnitude is
kept small so that the power factor of the system is maintained
high. A free running clock sets the frequency of this sawtooth
waveform. At every rising edge of the clock pulse, S2 and S4
are turned on. When the sum (im + RS is ) becomes equal to the
sawtooth waveform, S2 and S4 are turned off, and S1 and S2 are
turned on.

B. CPF-OCC-Based Three-Phase Converter

The controller for the three-phase case is shown in Fig. 9(b),
and the principle of operation remains almost the same as that
of the single-phase converter. The inverted output of the PI con-
troller is multiplied by signals proportional to individual phase
voltages to generate fictitious current signals for the individual
phases. These fictitious currents signals (RS iF n n = A, B, C)
are then added to the signals proportional to the corresponding
phase current signals (RS in n = A, B, C). The three signals
so generated are compared with a common sawtooth waveform
of constant magnitude (νR ). At the rising edge of each clock
pulse S2 , S4 and S6 are turned on. When the sum of each phase
current and the fictitious current becomes equal to the sawtooth
waveform, upper switches are turned on, and the lower switches
are turned off.

VI. S IMULATION AND E XPERIMENTAL R ESULTS

The proposed one-cycle-controlled constant power factor Fig. 11. Variation of power factor with load for three-phase converters
three-phase converter is simulated on MATLAB/Simulink plat- (B-OCC [3], M-OCC [12], and CPF-OCC).
form. The parameters used for simulation studies are given in
Table IV. The schematic power circuit diagram used for the Moreover, while in the rectifying mode, the power drawn from
study is shown in Fig. 10. The single pole double throw (SPDT) the utility is given by
switch changes the mode of operation of the converter from
rectifying to inverting as the switch position is changed from Vo2
Prect = . (49)
2 to 1. When the converter is operating in inverting mode, the RL
average power fed back to the utility is given by The variation in power factor with load for B-OCC- and
  M-OCC-based converters and the proposed CPF-OCC-based
VG − Vo converter is provided in Table V, and it is shown graphically
Pinv = Vo . (48)
Rc in Fig. 11. It can be inferred from this figure that OCC-based
GHODKE et al.: BIDIRECTIONAL AC-TO-DC CONVERTER WITH CONSTANT POWER FACTOR 1507

Fig. 13. Transient performance of the proposed CPF-OCC-based three-phase

converter. (Transition from inverting to rectifying mode and back to inverting
mode).

TABLE VI
PARAMETERS USED FOR THE LABORATORY PROTOTYPE OF
THE P ROPOSED O NE -C YCLE -C ONTROLLER -B ASED
BIDIRECTIONAL CONVERTER

constant power factor converter operates at almost unity power

factor for all load conditions. The steady state responses during
the rectifier mode of operation of the B-OCC-, M-OCC-, and
CPF-OCC-based converters are shown in Fig. 12(a)–(c). The
load negotiated by the converter in all cases is 20 kW. It can
be observed from Fig. 12(a) that, in the case of B-OCC-based
converter, the source current lags the source voltage by 12.04◦ ,
while the angles for M-OCC-based converter [Fig. 12(b)] and
the proposed CPF-OCC-based converter [Fig. 12(c)] are 23.75◦
and 2.56◦ , respectively. The transient performance of the CPF-
OCC-based converter is shown in Fig. 13. The load negotiated
by the converter is changed from 20 to −20 kW at 0.08 s
and from −20 to 20 kW at 0.12 s. From the results, it can be
inferred that the dynamic response of the system is quite fast,
and no instability in the source current is observed during the
operation.
In order to confirm the viability of the proposed CPF-OCC-
based three-phase converter, a 3-kW laboratory prototype is
developed, and detailed experimental studies are carried out.
The schematic power circuit of the experimental setup remains
Fig. 12. (a) Simulated results of B-OCC-based three-phase converter operat- essentially the same as that of Fig. 10. The parametric values of
ing in rectifying mode (phase delay 12.04◦ ). (b) Simulated results of M-OCC- the components used to fabricate the power circuit of the proto-
based three-phase converter operating in rectifying mode (phase delay 23.75◦ ).
(c) Simulated results of proposed CPF-OCC-based three-phase converter oper- type are provided in Table VI. In order to have the performance
ating in rectifying mode (phase delay 2.56◦ ). equivalence between the simulation and laboratory model, the
1508 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 5, MAY 2009

Fig. 15. (a) Experimental result of proposed CPF-OCC-based converter oper-

ating in rectifying mode of operation. (CH1, CH2, CH3) Three-phase currents
(iA ), (iB ), and (iC ) (10 A/div). (CH4) Phase voltage (νA ; 100 V/div). (Ch-M)
Fig. 14. (a) Experimental result of M-OCC-based converter operating in Harmonic spectrum of phase-A current (0.5 A/div). (Time scale) 10 ms/div.
rectifying mode. (CH1) Phase-A voltage (νA ; 100 V/div). (CH2) Phase-B (b) Experimental result of proposed CPF-OCC-based converter operating in
current (iB ; 4 A/div). (CH3) Phase-C current (iC ; 4 A/div). (CH4) Phase- the inverting mode of operation. (CH1, CH2, CH3) Three-phase currents (iA ),
A current (iA ; 4 A/div). (Time scale) 10 ms/div. (b) Experimental result of (iB ), and (iC ) (2 A/div). (CH4) Phase voltage (νA ) (100 V/div). (Ch-M)
B-OCC-based converter operating in rectifier mode. (CH1) Phase-A voltage Harmonic spectrum of phase-A current (0.5 A/div). (Time scale) 10 ms/div.
(νA ; 100 V/div). (CH2) Phase-B current (iB ; 4 A/div). (CH3) Phase-C current
(iC ; 4 A/div). (CH4) Phase-A current (iA ; 2 A/div). (Time scale) 10 ms/div.
Fig. 15(b) shows the steady state performance of the proposed
size of the boost inductor in the hardware prototype is chosen converter operating in inverting mode and negotiating a load of
twice than that of the simulation model. This is required, as −1 kW. The harmonic spectrum of the phase-A current is also
the chosen switching frequency of the laboratory prototype is shown in this figure. From the figure, it can be inferred that
twice that of the switching frequency of the simulation model. the proposed scheme can operate in the inverting mode without
The measured steady state performance of the M-OCC-based any current instability. The power factor while negotiating the
three-phase ac-to-dc converter operating in rectifying mode is aforementioned load is 0.997, and total harmonic distortion
shown in Fig. 14(a). It can be seen from this figure that the angle (THD) is less than 4%. In order to study the performance
between source voltages and the corresponding currents is during transient condition, the load supplied by the converter
−33.00◦ . The steady state performances during rectifying mode is abruptly changed from −2 to +2.8 kW, i.e., the converter
of operation of the B-OCC-based three-phase ac-to-dc con- operation is changed from inverter to rectifier mode, and the
verter and the proposed converter are shown in Figs. 14(b) and results are shown in Fig. 16(a) and (b). In Fig. 16(a), CH-1
15(a), respectively. The phase angle between the source voltage and CH-2 depict the measured phase-A current and voltage,
and the corresponding current in B-OCC-based converter is respectively, and CH-3 and CH-4 depict the load current and dc
15.68◦ while that in the proposed converter is 7.34◦ . It can link voltage, respectively. At t = 45 ms, the mode of operation
be observed from the harmonic spectrum of phase-A current, is changed from inverting to rectifying by changing the position
which is shown in Fig. 15(a), that low-order current harmonics of SPDT switch from position 1 to 2 (Fig. 10). Fig. 16(b) shows
are absent in the input current waveform of the converter. the measured three-phase line currents (CH-1 to CH-3) and the
GHODKE et al.: BIDIRECTIONAL AC-TO-DC CONVERTER WITH CONSTANT POWER FACTOR 1509

Fig. 17. (a) Variation in efficiency and THD of CPF-OCC-based converter

under various loading conditions. (b) Variation in power factor of CPF-OCC-
based converter under various loading conditions.

aforementioned limitation is quantitatively explained by devel-

oping large signal models. Having understood the reason for
low power factor operation, a new CPF-OCC-based converter is
proposed. The operating power factor of the proposed scheme
is high and independent of the magnitude of load handled by
Fig. 16. (a) Experimental result of transient performance of the proposed the converter. Moreover, it can operate in bidirectional mode
CPF-OCC-based converter: Transition from inverting to rectifying mode of without exhibiting any instability in current. The viability of
operation. (CH1) DC link load current (5 A/div). (CH2) DC link voltage (νO ;
100 V/div). (CH3) Phase-A current (iA ; 10 A/div). (CH4) Phase-A voltage
the proposed scheme is established through detailed simulation
(νA ; 100 V/div). (Time scale) 10 ms/div. (b) Transient performance of the and experimental studies.
proposed CPF-OCC-based converter: Transition from inverting to rectifying
mode of operation. (CH1, CH2, CH3) Phase currents (iA ), (iB ), and (iC ) R EFERENCES
(2 A/div). (CH4) Phase-A voltage (νA ; 100 V/div). (Time scale) 10 ms/div.
[1] B. T. Ooi, J. W. Dixon, A. B. Kulkarni, and M. Nishimoto, “An integrated
measured phase-A voltage (CH-4) for the same condition as AC drive system using a controlled-current PWM rectifier/inverter link,”
IEEE Trans. Power Electron., vol. 3, no. 1, pp. 64–70, Jan. 1988.
given earlier. [2] J. R. Rodriguez, J. W. Dixon, J. R. Espinoza, J. Pontt, and P. Lezana,
The efficiency of the proposed converter and the THD of “PWM regenerative rectifiers: State of the art,” IEEE Trans. Ind.
the source current are measured for various load conditions Electron., vol. 52, no. 1, pp. 5–22, Feb. 2005.
[3] Q. Chongming and K. M. Smedley, “Unified constant-frequency integra-
by employing Voltech power analyzer PM3000A. The plots tion control of three-phase standard bridge boost rectifiers with power-
showing the variation of efficiency and THD of the converter factor correction,” IEEE Trans. Ind. Electron., vol. 50, no. 1, pp. 100–107,
with load in rectifying and inverting modes of operation are Feb. 2003.
[4] T. Jin, L. Li, and K. M. Smedley, “A universal vector controller for three-
shown in Fig. 17(a). The full load efficiency of the system is phase PFC, APF, STATCOM, and grid-connected inverter,” in Proc. IEEE
found to be 94.8% for the rectifying mode of operation and Appl. Power Electron. Conf. Expo., 2004, vol. 1, pp. 594–600.
96.1% for the inverting mode of operation. Fig. 17(b) shows the [5] Q. Chongming and K. M. Smedley, “Three-phase grid-connected in-
verters interface for alternative energy sources with unified constant-
variation in power factor with various load currents; the power frequency integration control,” in Proc. IEEE Ind. Appl. Conf., 2001,
factor remains almost constant near to unity. vol. 4, pp. 2675–2682.
[6] N. R. Zargari and G. Joos, “Performance investigation of a current con-
trolled voltage-regulated PWM rectifier in rotating and stationary frames,”
VII. C ONCLUSION IEEE Trans. Ind. Electron., vol. 42, no. 4, pp. 396–401, Aug. 1995.
[7] I. Agirman and V. Blasko, “A novel control method of a VSC without AC
The power factor of medium- and high-power grid-connected line voltage sensors,” IEEE Trans. Ind. Appl., vol. 39, no. 2, pp. 519–524,
converters based on OCC varies with the load. In this paper, the Mar./Apr. 2003.
1510 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 5, MAY 2009

[8] M. Malinowski, M. P. Kazmierkowski, S. Hansen, F. Blaabjerg, and Sreeraj E. S. was born in Kerala, India, in 1978. He
G. D. Marques, “Virtual-flux-based direct power control of three-phase received the B.Tech. degree in electrical and elec-
PWM rectifiers,” IEEE Trans. Ind. Appl., vol. 37, no. 4, pp. 1019–1027, tronics engineering from the Regional Engineering
Jul./Aug. 2001. College, Calicut, India, in 2001, and the M.Tech. de-
[9] S. Chattopadhyay and V. Ramanarayanan, “Digital implementation of a gree in energy systems engineering from the Indian
line current shaping algorithm for three phase high power factor boost Institute of Technology Bombay, Mumbai, India,
rectifier without input voltage sensing,” IEEE Trans. Power Electron., in 2006. He is currently working toward the Ph.D.
vol. 19, no. 3, pp. 709–721, May 2004. degree in the Department of Electrical Engineering,
[10] Q. Chongming and K. M. Smedley, “Unified constant-frequency integra- Indian Institute of Technology Bombay.
tion control of three-phase standard bridge boost rectifier,” in Proc. IEEE
Power Electron. Congr. CIEP, 2000, pp. 131–135.
[11] K. Chatterjee, A. Chandra, K. Al-Haddad, and P. J. Lagace, “A PLL
less VAr generator based on one-cycle control,” in Proc. IEEE Int. Conf.
Harmonics Quality Power, 2004, pp. 512–518.
[12] D. V. Ghodke, B. G. Fernandes, and K. Chatterjee, “PLL less bi-
directional UPF converter,” in Proc. IEEE PESC, 2006, pp. 1700–1706. Kishore Chatterjee was born in Calcutta, India, in
[13] D. V. Ghodke, K. Chatterjee, and B. G. Fernandes, “Modified one cycle 1967. He received the B.E. degree in power elec-
controlled bi-directional high power factor AC to DC converter,” IEEE tronics from Maulana Azad College of Technology,
Trans. Ind. Electron., vol. 55, no. 6, pp. 2459–2472, Jun. 2008. Bhopal, India, in 1990, the M.E. degree in power
[14] Q. Chongming, K. M. Smedley, and F. Maddaleno, “A single-phase active electronics from Bengal Engineering College, West
power filter with one-cycle control under unipolar operation,” IEEE Trans. Bengal, India, in 1992, and the Ph.D. degree in power
Circuits Syst. I, Reg. Papers, vol. 51, no. 8, pp. 1623–1630, Aug. 2004. electronics from the Indian Institute of Technology,
[15] R. Ghosh and G. Narayanan, “Generalized feed forward control of single- Kanpur, India, in 1998.
phase PWM rectifiers using disturbance observers,” IEEE Trans. Ind. From 1997 to 1998, he was a Senior Research
Electron., vol. 54, no. 2, pp. 985–993, Apr. 2007. Associate with the Indian Institute of Technology,
[16] Y. Chen and K. Ma Smedley, “Parallel operation of one-cycle controlled Kanpur, where he was involved with a project on
three-phase PFC rectifiers,” IEEE Trans. Ind. Electron., vol. 54, no. 6, power-factor correction and active power filtering, which was being sponsored
pp. 3217–3224, Dec. 2007. by the Central Board of Irrigation and Power, India. He became an Assistant
Professor in the Department of Electrical Engineering, Indian Institute of
Technology Bombay, Mumbai, India, in 1998, where he has been an Associate
Dharmraj V. Ghodke was born in Solapur, India, Professor since 2005. His current research interests are modern var compen-
on October 20, 1968. He received the B.E. degree in sators, active power filters, utility-friendly converter topologies, and induction
electrical engineering from Walchand College of En- motor drives.
gineering Sangli, Shivaji University, Kolhapur, India,
in 1991, and the Ph.D. degree in power electronics
from the Indian Institute of Technology Bombay,
Mumbai, India, in 2008.
After graduation, he joined the 35th batch of train-
ing school at the Bhabha Atomic Research Centre,
Department of Atomic Energy, Mumbai. After train- B. G. Fernandes received the B.Tech. degree from
ing, since 1992, he has been a Scientific Officer with Mysore University, Mysore, India, in 1984, the
the Raja Ramanna Centre for Advanced Technology, Indore, India, where he M.Tech. degree from the Indian Institute of Technol-
demonstrated the first indigenous solid-state pulsed modulator for a copper ogy, Kharagpur, India, in 1989, and the Ph.D. degree
vapor laser to replace the Thyratron-based pulsed modulator. He also designed from the Indian Institute of Technology Bombay,
and developed various circuits for low- and high-voltage isolated switch- Mumbai, India, in 1993.
mode power supplies, capacitor charging power supply of 1 W to 11 kW, He was with the Department of Electrical En-
and trigger and driver units for insulated-gate-bipolar-transistor- and thyratron- gineering, Indian Institute of Technology, Kanpur,
based pulsed modulators. These developments were made for different kinds India, as an Assistant Professor. Since 1997, he has
of lasers. He is specialized in the area of high-frequency high-power switch- been with the Department of Electrical Engineering,
mode and solid-state pulse power supply, auxiliary controllers, and circuits for Indian Institute of Technology Bombay, where he is
laser applications. His current research interests include simulation and digital currently Professor. His current research interests are permanent-magnet ma-
controllers of pulsewidth-modulation active unity-power-factor rectifiers, active chines, high-performance ac drives, quasi-resonant link converter topologies,
filters, ac-to-dc and dc-to-dc converters, etc., for high-power applications. and power electronic interfaces for nonconventional energy sources.