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Lab Experiment No: 03 Lab Report On Adder and Subtractor: Abul Barkat Mollah Sayeed Ud Doulah, PHD Dewan Rodela Ashrafi

The lab report describes experiments with adder and subtractor circuits using logic gates to add and subtract binary numbers, with diagrams and truth tables showing the outputs of half adders, full adders, half subtractors, and full subtractors for different input combinations. The results were implemented correctly in the simulations and circuits. A Tinkercad link is provided to view the digital logic designs.

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Irene Sultana
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2K views7 pages

Lab Experiment No: 03 Lab Report On Adder and Subtractor: Abul Barkat Mollah Sayeed Ud Doulah, PHD Dewan Rodela Ashrafi

The lab report describes experiments with adder and subtractor circuits using logic gates to add and subtract binary numbers, with diagrams and truth tables showing the outputs of half adders, full adders, half subtractors, and full subtractors for different input combinations. The results were implemented correctly in the simulations and circuits. A Tinkercad link is provided to view the digital logic designs.

Uploaded by

Irene Sultana
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Lab Experiment No: 03

Lab Report
On
Adder and Subtractor

Submitted to: Submitted by:


Abul Barkat Mollah Sayeed Ud Doulah, PhD Dewan Rodela Ashrafi
Assistant Professor ID: 181014002
Section: 02
Course Code: ETE 205
Course Name: Digital
Electronics Lab
University of Liberal Arts Bangladesh
Lab Report 3
Experiment Name – Adder and Subtractor
Semester – Summer 2020
Course Title - Digital Electronics Lab
Course Code - ETE 205 Section - 02

Name: Dewan Rodela Ashrafi

ID: 181014002

Section: 02

_____________________________________________________________________________

OBJECTIVE: To study adder and subtractor circuit using logic gates.

APPARATUS REQUIRED: Trainer Board, 7486, 7432, 7408, 7404 and LEDs.

Adder:

An adder is a digital circuit that performs addition of numbers. In many computers and other
kinds of processors adders are used in the arithmetic logic units. They are also utilized in
other parts of the processor, where they are used to calculate addresses, table indices,
increment and decrement operators, and similar operations.

Although adders can be constructed for many number representations, such as binary-coded
decimal or excess-3, the most common adders operate on binary numbers. In cases where
two's complement or ones' complement is being used to represent negative numbers, it is
trivial to modify an adder into an adder–subtractor. Other signed number representations
require more logic around the basic adder.

Half adder:
The half adder adds two single binary digits A and B. It has two outputs, sum (S) and carry (C).
The carry signal represents an overflow into the next digit of a multi-digit addition. The value of
the sum in decimal system is 2C + S. The simplest half-adder design, pictured on the right,
incorporates an XOR gate for S and an AND gate for C. The Boolean logic for the sum (in this
case S) will be A'B+AB' whereas for carry (C) will be AB. With the addition of an OR gate to
combine their carry outputs, two half adders can be combined to make a full adder. The half
adder adds two input bits and generates a carry and sum, which are the two outputs of a half
adder. The input variables of a half adder are called the augend and addend bits. The output
variables are the sum and carry.
Full adder:

A full adder adds binary numbers and accounts for values carried in as well as out. A one-bit full
adder adds three one-bit numbers, often written as A, B, and Cin; A and B are the operands, and
Cin is a bit carried in from the previous less-significant stage. The full adder is usually a
component in a cascade of adders, which add 8, 16, 32, etc. bit binary numbers. The circuit
produces a two-bit output. Output carry and sum typically represented by the signals Cout and S,
where in decimal system.

A full adder can be implemented in many different ways such as with a custom transistor-level
circuit or composed of other gates. One example implementation is with and. In this
implementation, the final OR gate before the carry-out output may be replaced by an XOR gate
without altering the resulting logic. Using only two types of gates is convenient if the circuit is
being implemented using simple IC chips which contain only one gate type per chip.
Subtractor:
In electronics, a subtractor can be designed using the same approach as that of an adder. The
binary subtraction process is summarized below. As with an adder, in the general case of
calculations on multi-bit numbers, three bits are involved in performing the subtraction for each
bit of the difference: the minuend, subtrahend, and a borrow in from the previous (less
significant) bit order position. The outputs are the difference bit and borrow bit. The subtractor is
best understood by considering that the subtrahend and both borrow bits have negative weights,
Subtractors are usually implemented within a binary adder for only a small cost when using the
standard two's complement notation, by providing an addition/subtraction selector to the carry-in
and to invert the second operand.
Half subtractor:
The half subtractor is a combinational circuit which is used to perform subtraction of two bits. It
has two inputs, the minuend X and subtrahend Y and two outputs the difference D and borrow out
Bout. The borrow out signal is set when the subtractor needs to borrow from the next digit in a
multi-digit subtraction.

Full subtractor:
The full subtractor is a combinational circuit which is used to perform subtraction of three input
bits: the minuend X, subtrahend Y, and borrow in Bin. The full subtractor generates two output
bits: the difference D and borrow out Bout. Bin is set when the previous digit borrowed from X.
Thus, Bin is also subtracted from X as well as the subtrahend Y. Or in symbols: X-Y-Bin. Like
the half subtractor, the full subtractor generates a borrow out when it needs to borrow from the
next digit. Since we are subtracting X by Y and Bin , a borrow out needs to be generated when
X<Y+Bin. When a borrow out is generated, 2 is added in the current digit.
LOGIC DIAGRAM:

HALF ADDER:
Half adder

FULL ADDER:
Full adder
HALF SUBTRACTOR:

Half subtractor
FULL SUBTRACTOR:

Full subtractor

PROCEDURE:

1. First we have given biasing to the ICs and designed the half adder and subtractor, and full adder
and subtractor using the XOR, OR, NAND and NOT gates.

2. Then we have started the simulation and provided various input combinations by using
toggle switches and then we have written down the outputs with the help LEDs.

3. Finally we have filled up the truth tables and put the snapshots of the circuits.

REPORT: We can see the results in tabular form. The results are implemented correctly and the
simulation is also correct. The sum and carry results for half adder and full adder are shown in the
truth tables, as well as the difference and borrow results for half subtractor and full subtractor are
shown in the truth tables above.

TINKERCAD LINK: https://www.tinkercad.com/things/0rRgWAqVxNi-dewanrodela181014002-


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