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Implementation of A Self-Motivated Arbitration Scheme For The Multilayer AHB Bus Matrix

This document proposes a self-motivated arbitration scheme for multilayer AHB bus matrices. It summarizes the existing transfer-based arbitration scheme used in ARM's ML-AHB bus matrix and its limitations. The proposed scheme uses a flexible arbiter that can support nine possible arbitration schemes by adjusting the data processing unit (transfer, transaction, desired length) and priority policies (fixed, round robin, dynamic). This allows tuning the arbitration to maximize performance based on application requirements.

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176 views3 pages

Implementation of A Self-Motivated Arbitration Scheme For The Multilayer AHB Bus Matrix

This document proposes a self-motivated arbitration scheme for multilayer AHB bus matrices. It summarizes the existing transfer-based arbitration scheme used in ARM's ML-AHB bus matrix and its limitations. The proposed scheme uses a flexible arbiter that can support nine possible arbitration schemes by adjusting the data processing unit (transfer, transaction, desired length) and priority policies (fixed, round robin, dynamic). This allows tuning the arbitration to maximize performance based on application requirements.

Uploaded by

ravibabukancharla
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Implementation of a Self-Motivated Arbitration

Scheme for the Multilayer AHB Bus matrix

ABSTRACT
The multilayer advanced high-performance bus (ML-AHB) busmatrix employs slave-side
arbitration. Slave-side arbitration is different from master-side arbitration in terms of request and
grant signals since, in the former, the master merely starts a burst transaction and waits for the
slave response to proceed to the next transfer. Therefore, in the former, the unit of arbitration can
be a transaction or a transfer. However, the ML-AHB busmatrix of ARM offers only transfer-
based fixed-priority and round-robin arbitration schemes. In this paper, we propose the design
and implementation of a flexible arbiter for the ML-AHB busmatrix to support three priority
policies—fixed priority, round robin, and dynamic priority—and three data multiplexing
modes—transfer, transaction, and desired transfer length. In total, there are nine possible
arbitration schemes. The proposed arbiter, which is self-motivated (SM), selects one of the
nine possible arbitration schemes based upon the priority-level notifications and the desired
transfer length from the masters so that arbitration leads to the maximum performance.

EXISTING SYSTEM
The ML-AHB busmatrix uses slave-side arbitration. Slave-side arbitration is different
from master-side arbitration in terms of request and grant signals since, in the former, the master
merely starts a burst transaction and waits for the slave response to proceed to the next transfer.
Therefore, the unit of arbitration can be a transaction or a transfer. The transaction-based arbiter
multiplexes the data transfer based on the burst transaction, and the transfer-based arbiter
switches the data transfer based on a single transfer. However, the ML-AHB busmatrix of ARM
presents only transfer-based arbitration schemes, i.e., transfer based fixed-priority and round-
robin arbitration schemes. This limitation on the arbitration scheme may lead to degradation of
the system performance because the arbitration scheme is usually dependent on the application
requirements; recent applications are likewise becoming more complex and diverse. By
implementing an efficient arbitration scheme, the system performance can be tuned to better suit
applications
Fig. 1. Overall structure of the ML-AHB busmatrix of ARM

DISADVANTAGES OF EXISTING SYSTEMS

 This arbitration scheme may lead to degradation of the system performance because the
arbitration scheme is usually dependent on the application requirements; recent
applications are likewise becoming more complex and diverse.
PROPOSED SYSTEM

For a high-performance on-chip bus, several studies related to the arbitration scheme have
been proposed, such as table-lookup-based crossbar arbitration , two-level time-division
multiplexing (TDM) scheduling , token-ring mechanism , dynamic bus distribution algorithm ,
and LOTTERYBUS . However, these approaches employ master-side arbitration. Therefore,
they can only control priority policy and also present some limitations when handling the
transfer-based arbitration scheme since master-side arbitration uses a centralized arbiter. In
contrast, it is possible to deal with the transfer-based arbitration scheme as well as the
transaction- based arbitration scheme in slave-side arbitration. In this paper, we propose a
flexible arbiter based on the self-motivated (SM) arbitration scheme for the ML-AHB busmatrix.
Hence,our arbiter is able to not only deal with the transfer-based fixed-priority, round-robin, and
dynamic-priority arbitration schemes but also manage the transaction-based fixed-priority, round
–robin and dynamic-priority arbitration schemes. Furthermore,our arbiter provides the desired-
transfer-length-based fixed-priority, round-robin, and dynamic-priority arbitration schemes. In
addition, the proposed SM arbiter selects one of the nine possible arbitration schemes based on
the priority-level notifications and the desired transfer length from the masters to ensure that the
arbitration leads to the maximum performance.

Fig. 2. Internal structure of our arbiter.


ADVANTAGES OF PROPOSED SYSTEM
1. It can adjust the processed data unit;
2. It changes the priority policies during runtime.
3. It is easy to tune the arbitration scheme according to the characteristics of the
target application.
SOFTWARE REQUIREMENTS
 Verification Tool
 Modelsim
 Synthesis Tool
 Xilinx

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