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SuperComputerPaper IEEE

This document summarizes a conference paper about supercomputer architecture, applications, and future uses. It discusses the history of supercomputers from the CDC 6600 in 1964 to modern systems using tens of thousands of processors. It describes India's PARAM series of supercomputers including the latest PARAM Yuva II. Supercomputers are used for scientific research in fields like weather forecasting, quantum mechanics, and military applications. Their architecture has evolved from single processors to massively parallel systems.

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SuperComputerPaper IEEE

This document summarizes a conference paper about supercomputer architecture, applications, and future uses. It discusses the history of supercomputers from the CDC 6600 in 1964 to modern systems using tens of thousands of processors. It describes India's PARAM series of supercomputers including the latest PARAM Yuva II. Supercomputers are used for scientific research in fields like weather forecasting, quantum mechanics, and military applications. Their architecture has evolved from single processors to massively parallel systems.

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Study of Supercomputer's Architecture, Application and Its Future Use

Conference Paper · July 2013

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Super Computer Technologies of Mathematical Modeling (SCTEMM-2013), Yakutsk, Russia, during 8-11 July 2013, organized by M.K.
Ammosov North-Eastern Federal University, Yakutsk, Russia, ISBN–978-5-7513-1834-5.

Study of Supercomputer’s Architecture, Application


and Its Future Use
Dr. Gonsai Atul.1, Goswami Bhargavi.2, Kar Uditnarayan.1,
1
Saurashtra University, India.
[email protected],
[email protected],
2
NIMS University, India.
[email protected]

Abstract — Generally there is only one mother super Figure 1 shows the Blue Gene/P supercomputer that
computer in each country and there are many sub runs over 250000 processors using normal data centre air-
super computers attached to the mother super conditioning. It grouped in 72 racks that are connection
computer. It helps in increasing the speed of through high-speed network.
calculation and can quickly perform the complex
tasks as given by users because of its high processing II. HISTORY OF SUPERCOMPUTER
speed and the parallel computing skills. The super Seymour Cray founded a new company, Control Data
computers are very useful in terms of scientific Corporation (CDC). He decided to develop a
research and industrial field. It also takes the level of supercomputer using circuits and transistors [11]. The
national scientific development to a certain extent of first supercomputer was CDC 6600 which was developed
highness. In this paper the architecture and in 1964 [3], [7] by CDC [11]. Cray founded his own
application of the super computer has been discussed company in 1970s and started developing supercomputer
and future development of the super computer has with new approach. In the beginning of 1980s, use of
been proposed. processor in super computer was not much, but in 1990s
it becomes thousands of processors were used in
Keywords— Supercomputer, Parallel computing, supercomputer that appeared in Japan and United State
massively parallel, Param Yuva II, Cray-1, CDC 6600 [4].

I. INTRODUCTION The supercomputer stared using thousands of


As the name suggests supercomputer is a computer processors similar to personal computer by the end of the
with high performance as compared to personal 20th century. It progressed in first decade of 21st century
computers. That means, it has something superior than
normal computer. A supercomputer is a system which has
largest capability and capacity with highest performance
[1]. Because of this it can be used for scientific research
such as NASA and industrial fields such as in IBM. A
supercomputer provides high speed calculation for large
amount of data. It becomes a strategy point for military in
the developed countries to secure their country from
unexpected attack.

Supercomputers were developed in the 1960s at


Control Data Corporation (CDC) by Seymour Cray and
later on known as Cray Research. At the beginning level
supercomputers used only few processors but at the end
of the 20th century it started using thousands of processors by using 60,000 [4] processors in supercomputer that
along with parallel supercomputers [2]. reached to petaflop performance levels.
Fig. 1 CDC 6600 [4]
Each country contributes in supercomputing in
different ways for its various application. In Japan it The evolution of supercomputers includes 4 stages
concentrates on both development and application. The those are Budded stage (1960-1975), Vector stage (1976-
government of Japan develops supercomputers and 1989), MPP stage (1990-2000), Massive Parallel
commercial companies develop its application [1]. Processor (MPP) & Cluster stage (2000-2010) [1]. Each
stage has different performances that are Mflop/s (106),
Super Computer Technologies of Mathematical Modeling (SCTEMM-2013), Yakutsk, Russia, during 8-11 July 2013, organized by M.K.
Ammosov North-Eastern Federal University, Yakutsk, Russia, ISBN–978-5-7513-1834-5.

Gflop/s (109), Tflop/s (1012), and Pflop/s (1015) Supercomputers are used in various fields like weather
respectively, where flop/s means Floating Point forecasting for global climate changes, quantum
Operations / Second. mechanics to study physical systems at atomic level. The
other uses are in military, chemical composition and
In India, PARAM 8000 was the first supercomputer polymer research [5]. Currently it is also used in
developed by ―Centre for Development of Advanced aerospace and cosmology, energy security, healthcare and
Computing‖ (C-DAC) at Pune at 1990s and installed in medicine, manufacturing, environment protection, etc. [1].
1991 [9]. After that the improved PARAM series was
developed one by one which are listed below. The supercomputers are used to predict and analyse
global weather patterns by the national weather service
 PARAM 8600 and also have been used to determine the impact they
 PARAM 9900/SS would have in particular region by simulation nuclear
 PARAM 10000 bomb detonation. [7]
 PARAM Padma
IV. CONFIGURATION OF CRAY SUPERCOMPUTER
 PARAM Yuva
 PARAM Yuva II The basic configurations of cray-1 supercomputer
consist of CPU, one or more minicomputer console,
A. PARAM Yuva II power and cooling equipments and mass storage disk
PARAM Yuva II is the latest addition of PARAM series. subsystem. The CPU holds the I/O section, computation
It was developed in C-DAC in a period of 3 months at a and memory of the computer. A minicomputer uses for
cost of 16 Crore. It was unveiled on 8th February 2013. either as a job entry station or maintenance control unit
The PARAM Yuva II released with 524 Tflop/s [22] [16].
which is 10 times faster than the PARAM Yuva. It uses
35% [22] energy less than the PARAM Yuva. It ranked at When the supercomputer was introduced in 1960s, it
33rd in the November 2012 list of Top Green 500 used parallel computing to achieve superior
Supercomputers of the world in terms of energy computational peak load [8]. Later on based on
efficiency. [20] increasing demand it started using massively parallel
system. In parallel supercomputing the process is
PARAM Yuva II will be used for research in space, divided into similar part and then solved in parallel.
bioinformatics, weather forecasting, seismic data analysis, While the massively parallel system uses multiple
aeronautical engineering, scientific data processing and processor or computers to perform a single task. Grid
pharmaceutical development [21]. It will also be used in system is an example of massively parallel system.
scientific community to gain the crunch data in a faster
way. [22] The Cray-1 supercomputer was developed in year
1976. It was first general purpose supercomputer which
This computer is a stepping stone towards building the used Vector Processor machines from Cray Research Inc
future Pflop/s. C-DAC said that currently meteorologist [10]. Later on the addition of Cray-1 was developed that
are able to access data within 6 kilometres. With the up are Cray-XMP and Cray-2. They were used to solve
gradation of performance the meteorologists can access large scale problems in science and engineering. The Fig.
data within 10 kilometres [22]. 2 shows the hardware design of Cray-1 supercomputer.

The working of PARAM Yuva II is based on hybrid


computer technology which uses hardware coprocessors
and accelerators. It uses InfiniBand network which
provides efficiency in data transfer. The storage capacity
of this system is 200 tera bytes. It also provides a tool for
complex programs that can be very easily managed by it.
The PARAM Yuva II stands on 62nd position in world’s
Top 500 supercomputers [22].
III. REQUIREMENT OF SUPERCOMPUTER
According to users’ point of view, supercomputer
requires solving high level of complex problems and
without that problem there is no need of supercomputers
[2]. As well as an organization also needs that problem
gets solved very fast. So, in this way user define Fig. 2 Cray – 1 [14]
supercomputer.
Super Computer Technologies of Mathematical Modeling (SCTEMM-2013), Yakutsk, Russia, during 8-11 July 2013, organized by M.K.
Ammosov North-Eastern Federal University, Yakutsk, Russia, ISBN–978-5-7513-1834-5.

At that time, Cray-1 was the fastest supercomputer B. Input / Output


whose computational rate was 138 million floating-point Cray-1 supercomputer has 24 channels for input and
operations per second [12]. output. From that 12 are used for input and 12 for output.
A. Architecture At the time of input/output, any channel can be kept
active. For 16-bit channel, data transfer rates of 160
Cray-1 supercomputer uses register oriented vector million bits per second can be achieved, and the higher
processor which provides a great performance in science rates are dependent on peripheral devices. I/O and CPU
and engineering for certain types of calculation. The data share a memory using single port [16].
transmission in it is done from memory to ALU through
vector registers. So, we can say that vector registers are C. Computation Section
used as data cache between memory and functional unit 1) Functional Unit: The cray-1 supercomputer used 12
(ALU). Vector registers are prepared to hold up to 64 bit functional units (CPU) at a time which allowed parallel
vector elements [13]. The performance depends on how processing. It means that the CPU fetches the next data as
fast the data transfer occurs through registers. well as run the current task.

1) Module: The Cray-1 uses modules that were laid Because of CPU allowed parallel processing, it
horizontally and stacked in tower formation. This is increased process speed and CPU dead time was
shown in the fig. 2. Each module has a 5 layered circuit minimized [12]. These 12 functional units were divided
board [12]. These 5 layers are divided into two parts, first into 4 groups those are Address unit, Scalar Unit, Vector
part has 2 outer layers and second part has 3 inner layers. Unit and Floating-point Unit [16]. The first three groups
are used to conjunct with one of the primary register type
The cray-1 module used up to 288 IC’s. Because, the to support modes of processing of address, scalar and
module consists number of IC’s; it generated enormous vector unit. The fourth group is used to support either
heat [12]. There was a problem of signal transmission scalar or vector operation and it will accept the operand
with cray-1. Cray-1 passes the standing waves and that’s from it then deliver it to scalar or vector accordingly.
why, it could not reach up to the top of the level and thus Following is the list of functional unit with its usage.
reflected with weak signals.
TABLE II
2) Cooling: Because, the module generated more LIST OF TOP FUNCTIONAL UNIT WITH USAGE [16]
amount of heat, the new cooling technology was No. Of Functional Use For
developed which used available metal conductor. The Unit
vertical aluminium/stainless steel bars lined each column 3 Integer Addition
wall in each chassis. This technology was Freon based 1 Integer Multiply
technology and it had 40 tone cooling capacity. It is 2 Shift
flowing from top to bottom in each of the tower and 2 Logical
therefore taking the heat away. 1 Floating Addition
1 Floating Multiply
1 Reciprocal approx.
1 Population Count

All functional units execute its algorithm in fix time.


Once the operands have been delivered, delays are not
possible. After the completion of operand execution it
sends back to the functional unit which is known as
―functional unit time‖ and measured in 12.5 nano seconds
[16].

2) Data structure: The cray-1 use ASCII character


Fig. 3 Cray-1 Module [15] representation with 64-bit word means 8 characters at a
time. The numeric representation is either in 64-bit
3) Maintenance: Initially, the cray-1 supercomputer floating-point form using sign bit and biased exponent or
Mean Time between Failure (MTBF) was order of 50 in 2’s complements form (24-bit or 64-bit).
hours. It requires 2 hour maintenance daily and the
additional time was devoted in the weekend. With such
extensive maintenance it also gives more results than D. Memory
other computers running full time. The cray-1 memory was organized in 16 banks; each
bank had 72 modules [12]. Up to 5, 24,288 words can be
Super Computer Technologies of Mathematical Modeling (SCTEMM-2013), Yakutsk, Russia, during 8-11 July 2013, organized by M.K.
Ammosov North-Eastern Federal University, Yakutsk, Russia, ISBN–978-5-7513-1834-5.

arranged in 8 banks and a word consists of 64 data bits &


check bits [16]. The bank cycle time is 50 nano second. It 1) Good
is the time required to remove or insert an element of data  8 compute blades have two 2.4 GHz Intel
in memory. X5640 processors
 8 core per blade(64 cores total),
A single-error-correction double error detection  12 GB RAM per blade
(SECDED) feature used to make sure that the data written  InfiniBand Network 1
into memory can be return to the computation section
with consistent precision. There are 8 check bit per word 2) Better
[16].  8 compute blades have two 2.66 GHz Intel
X5650 processors
E. Operating register  12 cores per blade(96 cores total)
The cray-1 has 5 registers. From that 3 are primary  24 GB RAM per blade
registers and 2 are intermediate registers. Primary  InfiniBand Network 1
registers are used by functional unit. Intermediate 3) Best
registers are not accessible by functional unit but are used  8 compute blades have two 2.93 GHz Intel
as buffer in between functional unit and memory. In X5670 processors,
addition, there are supporting register available in CPU.  12 cores per blade(96 cores total),
For example, channel address register and channel limit  48 GB RAM per blade,
register for each I/O Channel [16].  InfiniBand Network 1
VI. FUTURE OF SUPERCOMPUTER
F. Hardware Design As per the supercomputer community, an exascale
It was hand-wired and its circuits were arranged in a (1018 FLOPs) supercomputer will be available in 2018.
three-quarters circle (see Fig. 2). As a result, it helped to Currently the research on exascale supercomputer is
increase the speed at which signals travel from one part to being carried out across the world. The Japanese HPC
another part of the computer. Hefty power supplies are community has identified the following 6 issues in its
located below each of the circuit bays and padding them technical roadmap to overcome the difficulties toward
suggested a piece of lounge furniture. exascale supercomputing [18].

 Improving Energy-efficiency
V. APPLICATION OF SUPERCOMPUTER
 Using memory hierarchy to reduce the traffic of
The supercomputers are widely used in following areas: off-chip memory
Scientific computing, coexistences of scientific  Exploiting parallelism of millions of processing
computing and network centric. Currently supercomputer cores
applications are being developed in two directions:  Heterogeneous computing for accelerating the
Capability Computing and Capacity Computing [1]. performance
 Dependability of the millions of processor cores
Capability computing target is to focus on the critical and their interconnections
scientific challenges to reduce cost and time for execution
 Productivity for the complicated system
[1].
The general purpose supercomputing has to face key
Capacity computing focuses on communication
challenges that are given as follows [19].
intensive applications, which means that finishing as
many tasks as possible in the specified time domain [1].
1) Maintaining good vector/scalar performance
balance: This balance depends on high
The ANSYS application is an example of
performance of a wide variety of applications,
supercomputer application which uses Cray cX1
algorithm and programming styles.
supercomputer. Cray cX1 system is mainly a cluster
2) Supporting scalability: It is evident that future
having 8 blades and that is in dedicated networks. Each
supercomputers will require increasing number of
blade has two Intel processors. That configured with
processors. So, it must be scalable in future.
either Windows HPC Server 2008 or Linux Operating
System. One blade is designed as a "head node" or "login
node" which has different properties then remaining
1
blades and that remaining blades are called as "compute It is used in high-performance computing and enterprise data
nodes" [17]. centres and it use a switched fabric communications link for
networking purpose. It is just like fibre channel, PCI express,
Serial ATA.
Super Computer Technologies of Mathematical Modeling (SCTEMM-2013), Yakutsk, Russia, during 8-11 July 2013, organized by M.K.
Ammosov North-Eastern Federal University, Yakutsk, Russia, ISBN–978-5-7513-1834-5.

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